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JPS6328540B2 - - Google Patents
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JPS6328540B2 - - Google Patents

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Publication number
JPS6328540B2
JPS6328540B2 JP6315082A JP6315082A JPS6328540B2 JP S6328540 B2 JPS6328540 B2 JP S6328540B2 JP 6315082 A JP6315082 A JP 6315082A JP 6315082 A JP6315082 A JP 6315082A JP S6328540 B2 JPS6328540 B2 JP S6328540B2
Authority
JP
Japan
Prior art keywords
signal
channel
offset
amplification degree
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6315082A
Other languages
Japanese (ja)
Other versions
JPS58181199A (en
Inventor
Hironori Odagiri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP6315082A priority Critical patent/JPS58181199A/en
Publication of JPS58181199A publication Critical patent/JPS58181199A/en
Publication of JPS6328540B2 publication Critical patent/JPS6328540B2/ja
Granted legal-status Critical Current

Links

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  • Arrangements For Transmission Of Measured Signals (AREA)
  • Time-Division Multiplex Systems (AREA)

Description

【発明の詳細な説明】 本発明はテレメータ計測装置等のアナログ信号
入力形時分割多重化に有益なマルチチヤンネルエ
ンコーダ装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multichannel encoder device useful for time division multiplexing of analog signal inputs, such as telemeter measurement devices.

従来、この種の時分割多重化方式によるテレメ
ータ計測装置は第1図に示すように、入力範囲の
異なる多数の入力端子1より入力された信号を、
シグナルコンデイシヨナ2で一定のブルスケール
に変換し、マルチプレクサ3に入力し、時分割化
を行なつてフルスケールの合つた時分割信号4を
得た後、この信号4を符号器5でデータ信号で適
当な処理を行ない同期信号を加えるとともに現在
受信しているデータ(例えば1a)のときには次
のデータ1bを選択すべくチヤンネル切換信号6
をマルチプレクサ3に供給するとともに送信機
8、アンテナ9を介して送信している。即ち、シ
グナルコンデイシヨナは計測用のセンサ特性によ
り生ずるオフセツトと、ゲイン補償を行なう。し
たがつてシグナルコンデイシヨナは入力信号数に
比例して増加するので、多チヤンネル伝送の場
合、小型、軽量化が困難であつた。
Conventionally, a telemeter measurement device using this type of time division multiplexing system, as shown in FIG.
The signal conditioner 2 converts it into a constant bull scale, inputs it to the multiplexer 3, performs time division to obtain a time division signal 4 with matching full scale, and then converts this signal 4 into data by an encoder 5. Appropriate processing is performed on the signal, a synchronization signal is added, and when the currently received data (for example, 1a) is selected, the channel switching signal 6 is sent to select the next data 1b.
is supplied to the multiplexer 3 and transmitted via the transmitter 8 and antenna 9. That is, the signal conditioner compensates for the offset and gain caused by the characteristics of the measurement sensor. Therefore, since the number of signal conditioners increases in proportion to the number of input signals, it has been difficult to reduce the size and weight of the signal conditioner in the case of multi-channel transmission.

本発明は、アナログ信号入力形時分割多重化方
式において、複数個のシグナルコンデイシヨナを
1個にし、予め既知の任意のオフセツト量、増幅
度をD/A変換器、ラダーネツトワーク型減衰器
を用い、時分割多重化信号と同期し、順次切換え
ることにより上記従来の欠点を除去した、小型、
軽量化を可能とするマルチチヤンネルエンコーダ
装置を提供するものである。
In an analog signal input type time division multiplexing system, the present invention combines a plurality of signal conditioners into a single signal conditioner and transmits a pre-known arbitrary offset amount and amplification degree to a D/A converter and a ladder network type attenuator. This is a small, compact system that eliminates the above-mentioned drawbacks of the conventional technology by synchronizing with the time-division multiplexed signal and switching sequentially.
The present invention provides a multi-channel encoder device that can be lightweight.

次に本発明の一実施例について第2図を参照し
て説明する。
Next, an embodiment of the present invention will be described with reference to FIG.

入力信号端子10a,10b,10c…,10
nより入力されたフルケールの異なる信号はマル
チプレクサ11で入力信号に比例した(一般的に
はフルスケールの合わない)時分割信号13であ
り、シグナルコンデイシヨナ12に入力される。
シグナルコンデイシヨナ12は、オフセツト設定
用と増幅度設定用の2回路により構成され、オフ
セツト設定用はアドレスカウンタ14と各チヤネ
ルオフセツト情報を記録したP―ROM15、
D/Aコンバータ16、オフセツト増幅器17よ
り成り、入力信号のオフセツトを決定する。前記
の如くオフセツト量は予めセンサの特性を調べる
ことにより測定できるからこのオフセツト量を各
センサー対応に定めてP―ROMに記憶する。ま
た増幅度設定用は、アドレスカウンタ18と各チ
ヤネルの増幅度情報を記録したP―ROM19、
減衰用ラダーネツトワーク20、増幅器21より
増幅度を決定する。このP―ROM19に記憶さ
れる増幅度情報も予め測定できるから補償のため
のデータとしてP―ROM19に記憶される。オ
フセツト設定及び増幅度設定を各チヤネルごとに
指定するチヤネル切替信号24を符号器23より
受けとり操作される。その結果、シグナルコンデ
イシヨナ出力22は各チヤネルに合せフルスケー
リングされた時分割振幅信号となり、符号器23
で符号化した信号25を取り出し、送信機26を
通し、アンテナ27で送信される。
Input signal terminals 10a, 10b, 10c..., 10
A signal having a different full scale inputted from the multiplexer 11 is converted into a time division signal 13 proportional to the input signal (generally the full scale does not match), and is inputted to the signal conditioner 12.
The signal conditioner 12 is composed of two circuits, one for setting offset and the other for setting amplification level.
It consists of a D/A converter 16 and an offset amplifier 17, and determines the offset of the input signal. As mentioned above, the amount of offset can be measured by checking the characteristics of the sensor in advance, so this amount of offset is determined for each sensor and stored in the P-ROM. Also, for setting the amplification degree, an address counter 18 and a P-ROM 19 which records the amplification degree information of each channel,
The degree of amplification is determined by the attenuation ladder network 20 and the amplifier 21. Since the amplification information stored in the P-ROM 19 can also be measured in advance, it is stored in the P-ROM 19 as data for compensation. A channel switching signal 24 that specifies offset settings and amplification settings for each channel is received from the encoder 23 and operated. As a result, the signal conditioner output 22 becomes a time-division amplitude signal that is fully scaled for each channel, and the encoder 23
The encoded signal 25 is extracted, passed through a transmitter 26, and transmitted by an antenna 27.

本発明は以上に説明したように、マルチプレク
サを通過した信号をチヤネルに合せ、オフセツ
ト、増幅度を切替えることにより多数のシグナル
コンデイシヨナを1個にする事ができ、小型軽量
化の効果がある。又、P―ROM制御以外に、コ
ンピユータ等の制御も可能である。
As explained above, the present invention makes it possible to combine many signal conditioners into one by matching the signal passed through the multiplexer to the channel and switching the offset and amplification level, which has the effect of reducing size and weight. . In addition to P-ROM control, it is also possible to control a computer, etc.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のマルチチヤネルエンコーダ装置
のブロツク図、第2図は本発明の一実施例を示す
ブロツク図である。 1a〜1n,10a〜10n…入力信号端子、
2,12…シグナルコンデイシヨナ、3,11…
マルチプレクサ、4,22…フルスケールの合つ
た時分割信号、5,23…符号器、6,24…チ
ヤネル切換信号、7,25…符号化信号、8,2
6…送信機、9,27…アンテナ、13…フルス
ケールの合わない時分割信号、14…アドレスカ
ウンタ、15…オフセツト情報を記録しれP―
ROM、16…D/Aコンバータ、17…オフセ
ツト増幅器、18…アドレスカウンタ、19…増
幅度情報を記録したP―ROM、20…減衰用ラ
ダーネツトワーク、21…増幅器。
FIG. 1 is a block diagram of a conventional multi-channel encoder device, and FIG. 2 is a block diagram showing an embodiment of the present invention. 1a to 1n, 10a to 10n...input signal terminals,
2,12...signal conditioner, 3,11...
Multiplexer, 4, 22... Time division signal with matching full scale, 5, 23... Encoder, 6, 24... Channel switching signal, 7, 25... Coded signal, 8, 2
6...Transmitter, 9, 27...Antenna, 13...Time-division signal whose full scale does not match, 14...Address counter, 15...Record offset information P-
ROM, 16...D/A converter, 17...offset amplifier, 18...address counter, 19...P-ROM recording amplification information, 20...attenuation ladder network, 21...amplifier.

Claims (1)

【特許請求の範囲】[Claims] 1 所定の制御信号により複数個のチヤンネル入
力端子から一つの入力端子を出力端子に選択接続
するスイツチと、このスイツチの出力端子に接続
され、前記各チヤンネルに対応して定まるオフセ
ツト補償用のオフセツト情報と増幅度補償用の増
幅度情報とが記憶され、前記スイツチの動作によ
り選択されたチヤンネル対応のデータ毎に前記オ
フセツト情報と増幅度情報とを用いて前記データ
にオフセツト補償処理と増幅度補償処理とを行な
うシグナルコンデイシヨナと、このシグナルコン
デイシヨナの出力に対して所定の符号化処理を行
ない、次に選択すべきチヤンネル対応の前記入力
端子を接続させる前記制御信号を送出する符号器
とを備えて成ることを特徴とするマルチチヤンネ
ルエンコーダ装置。
1. A switch that selectively connects one input terminal from a plurality of channel input terminals to an output terminal in response to a predetermined control signal, and offset information for offset compensation that is connected to the output terminal of this switch and is determined corresponding to each channel. and amplification degree information for amplification degree compensation are stored, and offset compensation processing and amplification degree compensation processing are performed on the data using the offset information and amplification degree information for each data corresponding to the channel selected by the operation of the switch. a signal conditioner that performs the following; and an encoder that performs a predetermined encoding process on the output of the signal conditioner and sends out the control signal that connects the input terminal corresponding to the channel to be selected next. A multi-channel encoder device comprising:
JP6315082A 1982-04-15 1982-04-15 Multichannel encoder Granted JPS58181199A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6315082A JPS58181199A (en) 1982-04-15 1982-04-15 Multichannel encoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6315082A JPS58181199A (en) 1982-04-15 1982-04-15 Multichannel encoder

Publications (2)

Publication Number Publication Date
JPS58181199A JPS58181199A (en) 1983-10-22
JPS6328540B2 true JPS6328540B2 (en) 1988-06-08

Family

ID=13220919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6315082A Granted JPS58181199A (en) 1982-04-15 1982-04-15 Multichannel encoder

Country Status (1)

Country Link
JP (1) JPS58181199A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63310098A (en) * 1987-06-12 1988-12-19 Fuji Electric Co Ltd Multipoint input signal converter
US4779535A (en) * 1987-10-16 1988-10-25 Nagatoshi Maki Slug assembly for shotgun shotshell
JP2002298279A (en) * 2001-01-26 2002-10-11 Texas Instruments Inc State response detection system and method

Also Published As

Publication number Publication date
JPS58181199A (en) 1983-10-22

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