JPS6329322B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a tape recorder, and in particular, after a tape playback running command (hereinafter referred to as a playback command) is issued, the head comes into contact with the tape, and the muting state is released after the tape is in a stable running state. It was designed so that

Conventionally, tape recorders have been subjected to muting to prevent them from emitting harsh and unstable playback sounds, particularly when the tape starts running when it is changed from a stopped state to a playback state. However, in this conventional tape recorder, muting is canceled after a predetermined period of time is delayed from the playback command, so the time it takes for the head to contact the tape varies depending on the tape recorder. Since the delay time of mutating is constant, there are disadvantages in that it may be too short or too long.

The present invention eliminates these conventional drawbacks, and one embodiment thereof will be described below with reference to the drawings.

_S1 is a recording command switch that switches the electric circuit to the recording state, _S2 is a playback command switch, and _S3 is a stop command switch. Reference numeral 1 designates a control circuit comprised of flip-flops, etc., which inverts and maintains the output levels of output terminals 2 and 3 when each of the command switches is closed for a short period of time. Note that in the stopped state, output terminal 2 is kept at H level, and output terminal 3 is kept at L level.

_S4 is a switch that is controlled by, for example, a head board, and is closed after the head contacts the tape and the tape is running, that is, in the playback state.Of course, it opens in the stop state, and this causes the inverter to close in the stop state. A voltage is supplied to the input of the inverter ₅ through the resistor R1, and the output of the inverter 5 is at L level.

When the NAND gate 6 receives the output from the output terminal 3 of the control circuit 1 and the output from the inverter 5 as its input, its output goes to the H level due to the L level from the output terminal 3 and the L level from the inverter 5 in the stopped state. There is. On the other hand, the NAND gate 4, which receives the output from the output terminal 2 of the control circuit 1 and the output from the NAND gate 6, receives the H level from the output terminal 2 and the H level from the NAND gate 6 in the stopped state.
Depending on the level, its output is at L level.

The output of the NAND gate 4 is the NAND gate 7
is supplied to one input side of the
The output of the NAND gate 4 is also supplied to a time constant circuit 8 consisting of a resistor R ₂ , a capacitor C, a resistor R ₃ , and a transistor Q ₁ .
The collector output of _Q1 is supplied to the other input side of the NAND gate 7.

Q ₂ is a muting transistor for controlling the muting of the recording/playback signal on the output side of the amplifier 9 where the recording/playback signal is amplified or controlled, and the output of the NAND gate 7 is used to control the mutating transistor Q ₂ . It's getting old. In the stopped state, the output of the NAND gate 7 is at the H level due to the L level from the NAND gate 4 and the H level input supplied via the resistor _R4 due to the transistor _Q1 being in the OFF state. Therefore, the muting transistor _Q2 is in the ON state, and the recording/playback signal path is in the muting state in the stopped state.

With the above-mentioned configuration, when the recording command switch _S1 is closed in the stopped state, the electric circuit of the tape recorder is switched to the recording state, and therefore becomes the source monitor state. At the same time, the output terminal 2 of the control circuit 1 changes from the H level to the L level as shown in FIG.
As a result, the output of the NAND gate 4 shifts from L level to H level.

The H level output of the NAND gate 4 is
It is supplied to one input side of the NAND gate 7 and is also supplied to the time constant circuit 8, so that the collector of the transistor _Q1 is at L level for a time _T1 determined by the time constant circuit 8.
Since the input of the NAND gate 7 is still supplied with H and L level inputs during time _T1 , its output is at the H level and the muting transistor
_Q2 is turned on. And after time T ₁ has elapsed
Since the collector of transistor _Q1 is at H level, the output of NAND gate 7 shifts to L level,
This makes the mutating transistor _Q2
It becomes the OFF state and the muting operation is canceled.

Therefore, close the recording command switch S ₁ and turn T ₁
Since the muting state of the recording/reproducing signal path is released after the time elapses, noise generated from the circuit system switched by the recording command will not appear on the monitor output.

When the stop command switch _S3 is closed in the mutating release state, the output terminal 2 of the control circuit 1 immediately shifts from the L level to the H level, and therefore
Both inputs of the NAND gate 4 become H level and its output becomes L level, and the output of NAND gate 7 also quickly changes from L level to H level. This turns on the muting transistor _Q2 ,
It becomes a mutating state.

Next, when the reproduction command switch _S2 is closed from the stopped state, the output terminal 3 of the control circuit 1 shifts from the L level to the H level. At the same time, the head board advances and the tape starts running at a constant speed. However, since the switch _S4 remains open at least until the head comes into contact with the tape, the output terminal 3 becomes H.
Even if it shifts to high level, its output remains at H level,
Therefore, the output of NAND gate 4 is also at L level. and the time from when the regeneration command switch _S2 is closed until the switch _S4 is closed.
After T ₂ , the output of NAND gate 6 shifts from H level to L level, so the output of NAND gate 4 shifts from L level to H level, and then the output of NAND gate 7 changes over time as in the previous case. Transition from H level to L level with a delay of _T1 .

As a result, the muting of the recording/playback signal path is canceled after a time delay (T ₂ +T ₁ ) after the playback command switch S ₂ is closed. Even if the head contacts the tape and the tape is not running stably yet, muting is applied, so that unstable playback will not occur.

Then, from the reproducing state, the stop command switch _S3
When the output terminal 3 of the control circuit 1 is closed, the output terminal 3 of the control circuit 1 immediately shifts from the H level to the L level, so that the muting transistor is immediately switched on as in the case described above.
Q ₂ turns on and mutating operates. In this case, the timing at which the switch _S4 opens is completely irrelevant.

As is clear from the above embodiments, in the present invention, when the recording command switch is operated, muting is canceled after the delay time determined by the time constant circuit has elapsed, so that the harsh clicking sound that occurs when the switch is switched is not output. Furthermore, when the playback command switch is operated from a stopped state, muting is canceled after the head contacts the tape and a delay time determined by the time constant circuit has elapsed, so at least the head Muting is not canceled before contact with the tape, and therefore no harsh playback sound is output. Furthermore, since the delay operation is performed by a common time constant circuit during recording and playback, there is a large cost advantage.

Further, the present invention is highly effective because it eliminates the unstable condition at the start of reproduction due to fluctuations in ambient temperature, power supply voltage, variations in parts, etc.

[Brief explanation of the drawing]

FIG. 1 is a partial block circuit diagram showing one embodiment of the present invention, and FIG. 2 is an explanatory diagram of the same operation. 1... Control circuit, 4, 6, 7... NAND gate, 5... Inverter, 8... Time constant circuit, S ₁ ...
...Play command switch, S ₂ ...Record command switch,
S ₃ ... Stop command switch, S ₄ ... Switch, Q ₂
...mutating transistor.

Claims (1)

[Claims] 1.Equipped with a playback command operating section, a recording command operating section, a delay means, a muting means, and a means for detecting contact between the head and the tape during playback, the signal is output after a certain delay time by the delay means has elapsed from the start of the recording command operation. At the same time as canceling the muting means of the signal line, in the case of a regeneration command, the muting means of the signal line is canceled after the detection operation of the detection means is completed after the start of operation and further after a certain delay time by the delay means has elapsed. A tape recorder made up of