JPS6333232B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital audio disc player, and more particularly to a rotation control circuit provided for rotating a disc at a constant linear velocity.

Digital audio disc players play back discs on which digitized audio signals and synchronization signals are optically recorded at a constant linear velocity, and have the excellent feature of providing high-fidelity reproduction signals. ing. In this case, the most important thing in performing fidelity playback is to control the rotation of the spindle motor according to the position of the pick-up so that the rotation of the disk during playback will accurately maintain a constant linear velocity. .

Here, the rotation control of the spindle motor is performed by two systems: a coarse adjustment system and a fine adjustment system, and the coarse adjustment system uses a signal obtained by frequency-voltage conversion of the spectrum of the reproduced signal. The fine adjustment system uses the output of a phase comparison between a bit clock generated in synchronization with the data included in the reproduced signal and a crystal-accurate reference clock. Usually, the rotation of the spindle motor is controlled using a signal obtained by adding a control signal for the coarse adjustment system and a control signal for the fine adjustment system.

However, in the spindle motor rotation control circuit configured as described above, the spectrum varies greatly depending on the content of the data contained in the reproduced signal, particularly in the lead-in portion and between songs. As a result, rotational fluctuations of the spindle motor increase, and in extreme cases, the phase lock control range of the spindle motor may be exceeded.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a digital audio disc player having a spindle motor rotation control circuit that can perform accurate rotation control even when the spectrum of a reproduced signal varies. Hereinafter, it will be explained in detail using the drawings.

The figure is a circuit diagram showing one embodiment of a digital audio disc player according to the present invention, and particularly shows a rotation control circuit of a spindle motor. In the figure, reference numeral 1 denotes a frequency/voltage conversion circuit that converts the spectrum of a reproduced signal supplied from a pickup (not shown) into a voltage signal, and its output signal is sent out via a first level adjustment circuit 2. Reference numeral 3 denotes a bit clock generating circuit which generates a bit clock synchronized with the data bits included in the reproduced signal A using a phase lock loop configuration. This bit clock generation circuit 3 is a voltage controlled oscillation circuit (hereinafter referred to as VCO).
) 4, a frequency dividing circuit 5 that divides the output signal of the VCO 4 by two, and an output with a level corresponding to the phase difference between the output signal of this frequency dividing circuit 5 and the data bit signal included in the reproduced signal A. The phase comparator 7 generates a signal and supplies this output signal to the VCO 4 as an oscillation control signal B via a loop filter 6, and outputs the output signal of the VCO 4 as a bit clock signal C. . Reference numeral 8 denotes a frequency-to-voltage conversion circuit which performs F-V conversion on the bit clock signal C output from the bit clock generation circuit 3, and its output signal is outputted via the second level adjustment circuit 9. Reference numeral 10 denotes a lock detection circuit for detecting the lock state of the bit clock generating circuit 3 having a phase lock loop configuration. The lock detection circuit 10 is configured to extract, for example, a ripple portion of the oscillation control signal B, and generate a detection output when the level becomes below a set level, indicating that the phase lock loop is in a locked state. . 11 selects the output of the first level adjustment circuit 2 in the normal state, and the lock detection circuit 10
An analog switch 12 selects and outputs the output signal of the second level adjustment circuit 9 when an output is generated, and 12 adds the output signal of the analog switch 11 and the phase lock loop control signal D of the motor, and uses the output signal to control rotation. Addition circuit that sends out a signal, 1
3 is a spindle motor 1 corresponding to the rotation control signal.
This is a motor drive circuit that drives 4.

In the circuit configured in this way, the reproduced signal A
is supplied, this reproduction signal A is converted into a voltage signal of a level corresponding to the spectrum in the frequency/voltage conversion circuit 1, thereby coarsely adjusting the rotation of the spindle motor 14 to a constant linear velocity. output as a control signal. and,
The output signal of this frequency/voltage conversion circuit 1 is
Analog switch 11 via level adjustment circuit 2
is supplied to Here, at the start of supply of the reproduced signal A, since the phase lock loop constituting the bit clock generating circuit 3 is not locked, the output of the lock detecting circuit 10 is off. Therefore, the analog switch 11 selects the output signal of the first level adjustment circuit 2 and applies it to the adder circuit 12.
The adder circuit 12 supplies the analog switch 11 with
The rough adjustment signal supplied from the motor and the motor phase lock loop control signal D are added and output. The motor control signal 13 is controlled to approximately a prescribed linear velocity by controlling the rotation of the spindle motor 14 in response to the output signal of the adder circuit 12.

On the other hand, the bit clock generation circuit 3 outputs the reproduced signal A.
The internal phase lock loop has a lock-in range of approximately 10% with respect to the reference frequency. If the reproduction signal exceeds the range, the lock will not be applied and the state will become unstable. Therefore, during the period until the spindle motor 14 reaches approximately the prescribed rotational speed by the output signal of the frequency/voltage conversion circuit 1 described above, the phase comparator 7
The oscillation control signal B supplied to the VCO 4 via the loop filter 6 is a signal that fluctuates greatly and contains many ripples. The ripple amount of this oscillation control signal B is detected in the lock detection circuit 10, and if this ripple amount exceeds a reference value, the bit clock oscillation circuit 3
The signal selection of the analog switch 11 is maintained at the output side of the frequency/voltage converter 1 assuming that the phase lock loop is in the unlocked state.

Here, when the reproduced signal A is included in the lock-in range of the phase lock loop constituting the bit clock generation circuit 3, this phase lock loop enters the locked state, and accordingly, the output signal C of the VCO 4 becomes the reproduced signal. The oscillation control signal B is synchronized with the bit signal A, and the oscillation control signal B is stabilized to have extremely small ripples. When the ripple included in the oscillation control signal B becomes less than the reference value, the lock detection circuit 10 locks the phase lock loop constituting the bit clock oscillation circuit 3 and outputs a bit clock signal synchronized with the bit signal included in the reproduced signal. An output signal is supplied to the analog switch 11 assuming that C is being generated. When the analog switch 11 receives the output signal from the lock detection circuit 10, it switches the selective reception of the signal to the second level adjustment circuit 9 side. In this case, the bit clock generation circuit 3 generates a bit clock signal C synchronized with the bit signal of the reproduced signal A, and this bit clock signal C is converted into a voltage signal in the frequency/voltage conversion circuit 8. The output signal of the frequency-voltage conversion circuit 8 is level-matched with the output signal of the frequency-voltage conversion circuit 1 output from the first level adjustment circuit 2 in the second level adjustment circuit 9. The signal is supplied to the analog switch 11. Therefore, when the phase lock loop constituting the bit clock generation circuit 3 is locked, the output signal of the frequency/voltage conversion circuit 8 corresponding to the frequency of the bit signal included in the reproduced signal A is level-matched. It is then supplied to the adder circuit 12 via the analog switch 11. The adder circuit 12 adds the output signal of the analog switch 11 corresponding to the bit signal period of the reproduced signal A and the phase lock control signal D of the spindle motor, and supplies the result to the motor drive circuit 13, thereby regulating the rotation of the spindle motor 14. to exactly match the linear velocity of

In this manner, when the phase lock loop constituting the bit clock generating circuit 3 is locked, even if the data of the reproduced signal A changes in the lead-in section and the inter-track section, the bit clock generating circuit 3 remains locked. Bit clock C generated from 3
is not affected in any way, and this bit clock C is extremely stable, subject to only slight fluctuations due to disk flutter. Therefore, this stable bit clock signal C
By controlling the rotation of the spindle motor 14 using the output signal of the frequency/voltage conversion circuit 8 that performs F-V conversion of the signal, the rotation control becomes extremely accurate and stable.

Next, when the phase lock loop of the bit clock generation circuit 3 becomes unlocked due to the reproduction signal A being disturbed for some reason, the lock detection circuit 10 detects this state and adjusts the analog switch 11 to the first level. Switching to the circuit 2 side, the rotation control is returned to the spectrum of the reproduced signal A. When the reproduced signal A is returned to the specified frequency and the phase lock loop of the bit clock generation circuit 3 is locked, the analog switch is switched by the output signal of the lock detection circuit 10, and the rotation is again controlled by the bit clock signal C. It is returned to stabilize.

As explained above, the digital
An audio disc player is equipped with a bit clock generation circuit using a phase lock loop configuration that generates a bit clock signal synchronized with the bit signal included in the playback signal, and performs an unlocking process until the bit clock generation circuit locks onto the bit signal included in the playback signal. During the period, rotation control is performed using a signal obtained by F-V conversion of a reproduced signal, and during a lock period, rotation control is performed using a signal obtained by F-V conversion of a bit clock signal. Therefore, the rotation control during the lock period is completely unaffected by the data contained in the reproduced signal, and malfunctions in the lead-in section and between songs are prevented and the spindle motor is controlled. It has an excellent effect of allowing stable rotation control.

[Brief explanation of the drawing]

The figure is a circuit diagram showing one embodiment of a rotation control circuit for a spindle motor used in a digital audio disc player according to the present invention. 1, 8... Frequency/voltage conversion circuit, 2, 9...
1st and 2nd level adjustment circuits, 3... bit clock generation circuit, 4... voltage controlled oscillator circuit (VCO),
5... Frequency divider, 6... Loop filter, 7... Phase comparator, 10... Lock detection circuit, 11... Analog switch, 12... Adder, 13... Motor drive circuit, 14... Spindle motor.

Claims (1)

[Claims] 1. A first frequency/voltage conversion circuit that frequency-voltage converts the spectrum of the reproduced signal supplied from the pickup and outputs the frequency-voltage conversion circuit, and a bit clock generation circuit that generates a bit clock signal synchronized with the reproduced signal using a phase lock loop configuration. A second frequency/voltage conversion circuit converts the frequency of the bit clock signal into voltage and outputs the result, a lock detection circuit detects the lock state of the phase lock loop constituting the bit clock generation circuit, and the second frequency/voltage converter circuit converts the frequency to voltage of the bit clock signal and outputs the result. 1. The output signal of the second frequency/voltage conversion circuit is input, and in response to the output signal of the lock detection circuit, the selection of the input signal is switched to the output side of the second frequency/voltage conversion circuit when lock is detected. A digital audio disk player characterized in that it is provided with an analog switch for controlling the spindle motor, and the rotation of the spindle motor is controlled by the output signal of the analog switch.