JPS6333326B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a peak detection circuit for detecting the peak position of input voltage.

Conventionally, this type of circuit has a configuration as shown in Figures 1 and 2. Figure 1 is used to detect a one-time peak position, and Figure 2 is used to detect a continuous peak position of alternating current. It is used to do.

The conventional peak detection circuit shown in Figure 1 connects the output terminal of operational amplifier OP1 to the anode of diode D, and connects the cathode of diode D to one terminal of capacitor C and the non-inverting input terminal of operational amplifier OP2. Then, the other terminal of the capacitor C is connected to the common terminal (earth), a discharge switch S is provided between the terminals of the capacitor, and the inverting input terminal and output terminal of the operational amplifier OP2 are connected to form a buffer. This output terminal is connected to the inverting input terminal of the operational amplifier OP1. Then, an input voltage ei is applied between the non-inverting input terminal of the operational amplifier OP1 and the common terminal (earth), and an output voltage eo is taken out between the output terminal of the operational amplifier OP1 and the common terminal (earth).

In addition, the cathode of diode D and capacitor C
Let Q be the connection point between one terminal of OP2 and the non-inverting input terminal of operational amplifier OP2.

In such a circuit, when a pulse-like voltage ei as shown in FIG. 3a is input, the voltage at point Q in FIG.
The peak of input voltage ei changes as shown by eo, P ₁
The position of is detected by the output voltage eo. However, at the input voltage ei, as shown by the broken line in Figure 3a, when a second peak _P2 with a smaller amplitude than peak _P1 follows the first peak _P1 , the charge in the capacitor C is discharged. Since the voltage is not restricted, the operational amplifier OP1 does not operate, and the second peak _P2 is not detected as the output voltage eo. For this reason, the switch S must be closed in a timely manner by a discharge starting circuit (not shown) to discharge the charge in the capacitor C immediately after the first peak _P1 is detected. Therefore, the circuit of FIG. 1 has the disadvantage that a discharge starting circuit is required.

Furthermore, in the circuit of Fig. 1, as shown by ei' in Fig. 3d, a negative DC voltage is superimposed on the input pulse voltage, and when the peak P is a negative voltage, the diode D becomes reverse biased. It has the disadvantage that it becomes non-conductive and the peak P is not detected.

Next, we will explain the circuit in Figure 2. The difference between the circuit in Figure 2 and the circuit in Figure 1 is that instead of a discharge switch S connected in parallel to the capacitor C,
This is because a resistor R is connected in parallel to the capacitor C. When a repeating signal with a period T is inputted as the input voltage ei in FIG. 2, as shown by ei in FIG. 4a,
If the time constant CR of the capacitor C and the resistor R is sufficiently large compared to the period T, the voltage at point Q in Figure 2 will be the fourth
It will look like Q in Figure b. This is because when the input voltage ei has a positive slope, the output impedance of the operational amplifier OP1 is low, so it quickly charges the capacitor C and becomes almost the same waveform as the input voltage, but when the input voltage ei passes through the peak P, the input voltage ei becomes low. Therefore, the diode D is reverse biased and becomes non-conductive due to the voltage due to the charge stored in the capacitor C, and the capacitor C is discharged according to the discharge characteristic determined by the time constant CR of the capacitor C and the resistor R.

As a result, the output voltage eo has a waveform such as eo in FIG. 4c, and the position of the peak P is detected.

Here, increase the period T of input voltage ei and set the time constant
As we approach CR, the waveform at point Q in Figure 2 approaches the input voltage ei (see Figure 4a) near the peak, as shown by Q' in Figure 4d.
The output voltage eo causes a delay error of time t in the position of the detected peak P, as shown by the signal eo' in FIG. 4e. This shows that there is a drawback that the period T of the input voltage ei must be within a certain range with respect to the time constant CR.

Furthermore, when the input voltage ei occurs in the negative voltage range as shown by ei' in Figure 4f, the diode D becomes non-conducting because it is always reverse biased, as in the case of Figure 1, and the peak P The disadvantage is that the position is not detected.

The present invention solves these shortcomings and provides a peak detection system that has low frequency dependence, can handle pulsed input and repeated input voltage, and can detect the peak position even when the input voltage is a negative voltage below zero volts. The purpose is to obtain a circuit.

The present invention will be described below based on embodiments shown in the drawings.

FIG. 5 shows a first embodiment of the present invention, in which the output terminal of the operational amplifier OP1 is connected to the anode of the diode D1, and the cathode of the diode D1 is connected to one terminal of the capacitor C, the anode of the diode D2, and the anode of the operational amplifier OP1. Connect to the inverting input terminal, connect the other terminal of capacitor C to the common terminal (ground), and connect the cathode of diode D2 to the operational amplifier.
The non-inverting input terminal of the operational amplifier OP2 is connected to the non-inverting input terminal of the operational amplifier OP1, and the inverting input terminal of the operational amplifier OP2 is connected to its output terminal. In the circuit shown in Fig. 5, input voltage ei is applied between the non-inverting input terminal of operational amplifier OP1 and the common terminal, and the operational amplifier
Output voltage from between the output terminal of OP1 and the common terminal
Take out eo. Note that the cathode of diode D1, one terminal of capacitor C, and diode D2
Let Q be the connection point between the anode of and the inverting input terminal of the operational amplifier OP1.

In the circuit described above, as the input voltage ei, Fig. 6a
When a repeated signal ei such as is input, the operational amplifier
Needless to say, the same voltage as the input voltage ei is generated at the output terminal of OP2. Operational amplifier on the other hand
In OP1, the charge on capacitor C starts from zero, so
The diode D1 becomes conductive and the Q point increases with the same amplitude as the input voltage ei, as shown in FIG. 6b. Operational amplifier up to the point where the input voltage ei reaches the peak P
The output voltage eo of OP1 is the forward voltage of diode D1 with respect to the input voltage ei, as shown in Figure 6c.
Vf changes at a higher voltage by ₁ minute. Furthermore, since the voltages across the diode D2 are each the same value as the input voltage ei, the diode D2 does not contribute to the operation at all. When the input voltage ei passes the peak P, the capacitor C is charged to the peak voltage, so the inverting input terminal of the operational amplifier OP1 also becomes the peak voltage. Subsequently, the input voltage ei begins to decrease, so
The voltage at the non-inverting input terminal of operational amplifier OP1 is lower than the voltage at the inverting input terminal, and its output voltage eo
decreases to the negative saturation voltage Vs of the operational amplifier OP1, as shown in FIG. 6c. As a result, diode D1 becomes reverse biased and non-conducting.
Then the input voltage ei is further reduced and the operational amplifier
When the voltage at the output terminal of OP2 drops below the voltage at point Q to the forward voltage Vf ₂ of diode D2, diode D2 begins to conduct, and the charge in capacitor C is discharged to the output terminal of operational amplifier OP2 through diode D2, and then , the voltage at point Q is the input voltage ei
The voltage changes by ₂ minutes higher than Vf. This situation is shown in FIG. 6b. The two-dot chain line in the same figure shows the conventional CR discharge characteristics (see FIG. 4b).

In this way, after passing the peak P position, unlike the conventional case, the voltage of the capacitor C follows the input voltage ei with a difference of only ₂ minutes of the forward voltage Vf of the diode D2, so there is no accumulation of excess charge. , it is now in a state where it can easily follow subsequent input changes. In other words, there is little frequency dependence.

Subsequently, when the input voltage ei begins to increase, the operational amplifier
The voltage between the inverting input terminal and the non-inverting input terminal of OP1 gradually becomes smaller than the value of the voltage Vf ₂ and finally becomes the same (point l in Fig. 6b), and when that value is exceeded, the output voltage eo of the operational amplifier OP1 rises in the positive direction, and the diode D1 becomes conductive and the diode D2 becomes non-conductive, resulting in the same state as at the beginning. In this way, the peak position P is detected.

Furthermore, even when the input voltage ei is changing as a negative voltage as a whole as shown in Figure 6d, the relative voltage between each element is the same as above, so the position of the peak P can be detected in the same way. be done. However, the output voltage eo at that time is as shown in FIG. 6e.

As described above, the circuit shown in Fig. 5 has the advantage that it is less dependent on the frequency of the input voltage, and that it is possible to detect the peak position even in the negative voltage range, which could not be detected with conventional circuits. .

In the above embodiment, a buffer provided by the operational amplifier OP2 was used, but it goes without saying that if a voltage is input from a signal source with low output impedance, a configuration as shown in FIG. 7 without using a buffer may be used. Nor. The operation of FIG. 7 showing the second embodiment of the present invention is completely the same as that of FIG. 5, so the same parts are given the same numbers and the explanation will be omitted.

In addition, in FIGS. 5 and 7, the diode D
It goes without saying that the minimum position of the input voltage can be detected by reversing the connection direction of 1 and D2.

Furthermore, as shown in Fig. 8, by adding an operational amplifier OP2' to the circuit shown in Fig. 7, the signals ei, e', ei'' in Fig. 9a can be changed as shown in Fig. 9b. The position of the peak P is detected as a rectangular wave at the output terminal of the operational amplifier OP2. FIG. 9c shows the voltage eo at the output terminal of the operational amplifier OP1.

Of course, the circuit of FIG. 9 can also be used for pulsed inputs as shown in FIG. 3a.

As described above, according to the present invention, not only can each peak position be detected even for pulsed input and repeated input, but also the frequency dependence is small, and the peak position can be detected even for signals containing a large amount of DC component. It has the advantage that it can be detected.

[Brief explanation of the drawing]

Figures 1 and 2 are circuit diagrams of conventional peak detection circuits, Figure 3 is a waveform diagram of each part in Figure 1, Figure 4 is a waveform diagram of each part in Figure 2, and Figure 5 is a diagram of the waveform of each part in Figure 2. A circuit diagram of one embodiment, FIG. 6 is a waveform diagram of each part of FIG. 5, FIGS. 7 and 8 are circuit diagrams of other embodiments of the present invention,
FIG. 9 is a waveform diagram of each part of FIG. 8. [Explanation of symbols of main parts] OP1... operational amplifier, C... capacitor, D1, D2... diode.

Claims (1)

[Claims] 1. A capacitor is connected between the inverting input terminal and the common terminal of the operational amplifier, a first diode is provided between the inverting input terminal and the output terminal of the operational amplifier, and a capacitor is connected between the inverting input terminal and the common terminal of the operational amplifier. A second diode is provided between the output terminal and the non-inverting input terminal, and the first diode and the second diode are oriented in the same direction between the output terminal and the non-inverting input terminal. A peak detection circuit characterized in that an input voltage is applied between the non-inverting input terminal and a common terminal, and an output voltage is extracted from between the output terminal and the common terminal.