JPS6333750B2 - - Google Patents
Info
- Publication number
- JPS6333750B2 JPS6333750B2 JP54037769A JP3776979A JPS6333750B2 JP S6333750 B2 JPS6333750 B2 JP S6333750B2 JP 54037769 A JP54037769 A JP 54037769A JP 3776979 A JP3776979 A JP 3776979A JP S6333750 B2 JPS6333750 B2 JP S6333750B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- average value
- amplifier
- equalizing amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
- H04L25/062—Setting decision thresholds using feedforward techniques only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Manipulation Of Pulses (AREA)
- Dc Digital Transmission (AREA)
Description
【発明の詳細な説明】
本発明は温度の変動あるいは部品などのバラツ
キに対し等化増幅器の出力のバイアスと識別再生
回路のスレツシヨルドレベルの関係を常に一定か
つ安定に保持させる機能をもつたPCM中継器の
両極性識別回路に関する。[Detailed Description of the Invention] The present invention has a function of always maintaining a constant and stable relationship between the bias of the output of the equalizing amplifier and the threshold level of the discrimination/regeneration circuit despite temperature fluctuations or variations in components. This article relates to a polarity identification circuit for a PCM repeater.
従来の回路は第１図に示すように等化増幅器の
出力のバイアスと識別再生回路のスレツシヨルド
レベルが温度などの変化により変動してもそれら
のレベルの関係が常に一定に保つ必要性により、
それらのレベルの絶対レベルが変わらないように
構成されていた。２つの入力端子をもつ等化増幅
器１３の出力端子１５，１６と平均値検出回路と
が接続されその出力を増幅器１４の入力（＋）側
に入力しさらにその出力を等化増幅器に接続され
ている。これは、等化増幅器１３の出力端子１
５，１６に接続した抵抗を使用するなどの方法で
バイアスの平均値を取り出しそれを増幅器１４の
（＋）側に入力して（−）側の基準電源２３と比
較しそれに比例した出力で等化増幅器１３の定電
流源などを制御する事によりバイアス電圧の絶対
レベルが変動しないようになつている。等化増幅
器１３は識別再生回路１９，２０に接続されこの
回路のスレツシヨルドレベルは上述のバイアスの
平均値とは、従属関係がないため基準電源１８を
もうけて識別再生回路１９，２０のスレツシヨル
ドレベルを決めている。この方法によるといくつ
かのスレツシヨルドレベルを決める際には独立し
た基準電源をもうけるなどの工夫が必要となり、
また等化増幅器の特性に影響を与えるなどの欠点
があつた。 As shown in Figure 1, in conventional circuits, the relationship between the output bias of the equalizing amplifier and the threshold level of the discrimination/regeneration circuit needs to be kept constant even if they fluctuate due to changes in temperature, etc. ,
It was configured so that the absolute levels of those levels did not change. The output terminals 15 and 16 of the equalizing amplifier 13 having two input terminals are connected to an average value detection circuit, the output thereof is inputted to the input (+) side of the amplifier 14, and the output is further connected to the equalizing amplifier. There is. This is the output terminal 1 of the equalizing amplifier 13.
5 and 16, take the average value of the bias, input it to the (+) side of the amplifier 14, compare it with the reference power supply 23 on the (-) side, and output proportionally to it. By controlling the constant current source of the bias amplifier 13, etc., the absolute level of the bias voltage is prevented from changing. The equalizing amplifier 13 is connected to the discrimination and regeneration circuits 19 and 20, and since the threshold level of this circuit has no dependent relationship with the average value of the bias described above, the threshold level of this circuit is It determines the Tsushijord level. According to this method, when determining several threshold levels, it is necessary to take measures such as providing an independent reference power supply.
It also had drawbacks such as affecting the characteristics of the equalizing amplifier.
本発明の目的はこのような欠点を除去し等化増
幅器の特性に影響を与える事がなく、各レベル間
の関係を一定に維持し、かつ安定なレベルを保持
できる両極性識別回路を提供する事にある。 An object of the present invention is to provide a bipolar discrimination circuit that eliminates such drawbacks, maintains the relationship between each level constant, and maintains a stable level without affecting the characteristics of the equalizing amplifier. It's true.
前記目的を達成するために本発明による両極性
識別回路は正相および逆相の２つの出力端子をも
つた平衡出力回路から成る等化増幅器と、前記等
化増幅器の２つの出力電圧を入力とし、その出力
電圧のバイアスの平均値を検出する平均値検出回
路と、前記平均値検出回路検出出力が変動したと
き一定の比率をもつて出力が変動する基準レベル
シフト回路と、前記基準レベルシフト回路出力を
しきい値とし前記等化増幅器の２つの出力をそれ
ぞれ入力とする２つの識別再生回路とから構成し
てある。 In order to achieve the above object, a bipolar discrimination circuit according to the present invention includes an equalizing amplifier consisting of a balanced output circuit having two output terminals of positive phase and negative phase, and two output voltages of the equalizing amplifier as inputs. , an average value detection circuit that detects the average value of the bias of the output voltage, a reference level shift circuit whose output changes at a constant ratio when the detection output of the average value detection circuit changes, and the reference level shift circuit. It is composed of two identification and reproducing circuits whose outputs are used as threshold values and whose inputs are the two outputs of the equalizing amplifier.
上記構成によれば本発明の目的は完全に達成さ
れる。 According to the above configuration, the object of the present invention is completely achieved.
次に本発明の実施例につき図面を参照して説明
する。 Next, embodiments of the present invention will be described with reference to the drawings.
第２図は本発明による両極性識別回路を示す回
路ブロツク図である。図において第１図と同一部
分は同一符号で示している。第２図において等化
増幅器１３の出力１５，１６は平均値出力回路１
７と直列に接続され、その出力はさらに基準電源
（基準レベルシフト回路）１８の入力に接続され
ている。さらに基準電源１８の出力は識別回路１
９，２０のしきい値入力端子に接続されている。
この構成によると等化増幅器１３の出力のバイア
スがある原因で変動したとすると、その変動を平
均値検出回路１７で検出し、その変動分の比率分
に相当する電圧を基準電源１８に加える事によつ
て基準電源１８の出力を変動させ識別再生回路１
９，２０のスレツシヨルドレベルを変えている。
第３図に平均値検出回路の実施例を示してある。 FIG. 2 is a circuit block diagram showing a bipolar discrimination circuit according to the present invention. In the figure, the same parts as in FIG. 1 are indicated by the same reference numerals. In FIG. 2, the outputs 15 and 16 of the equalizing amplifier 13 are the average value output circuit 1.
7 in series, and its output is further connected to the input of a reference power supply (reference level shift circuit) 18. Furthermore, the output of the reference power supply 18 is the identification circuit 1
It is connected to threshold input terminals 9 and 20.
According to this configuration, if the bias of the output of the equalizing amplifier 13 fluctuates due to a certain cause, the fluctuation is detected by the average value detection circuit 17 and a voltage corresponding to the ratio of the fluctuation is applied to the reference power supply 18. The identification reproducing circuit 1 changes the output of the reference power supply 18 by
The threshold levels of 9 and 20 are changed.
FIG. 3 shows an embodiment of the average value detection circuit.
本発明は以上の説明で明らかなように等化増幅
器での出力のバイアスの変動を検出し、基準電源
を修正する事によつて、スレツシヨルドレベルを
それと同一の比率で変えるようにしたものであ
る。従つて本発明によると、等化増幅器のレベル
の絶対レベルは変わるが、常に一定の比率を保つ
てスレツシヨルドレベルが変動するので各々レベ
ルの関係は維持される上に、等化増幅器に影響を
与える事なく、しかも基準電源が１ケ所ですむ効
果がある。また基準電源は抵抗などで構成されて
いるので複数のスレツシヨルドレベルを作る事も
可能である。 As is clear from the above description, the present invention detects fluctuations in the output bias of an equalizing amplifier and modifies the reference power supply to change the threshold level at the same ratio. It is. Therefore, according to the present invention, although the absolute level of the equalizing amplifier changes, the threshold level always changes at a constant ratio, so the relationship between the respective levels is maintained, and there is no effect on the equalizing amplifier. This has the effect of requiring only one reference power source without the need for power. Also, since the reference power source is composed of resistors, it is possible to create multiple threshold levels.
第１図は従来の両極性識別回路の電気結線図、
第２図は本発明による両極性識別回路の一実施例
を示す電気結線図、第３図は平均値検出回路の実
施例を示す回路図である。
１３……等化増幅器、１４……差動増幅器、１
７……平均値検出回路、１８，２３……基準電源
（基準レベルシフト回路）、１９，２０……識別再
生回路。
Figure 1 is an electrical wiring diagram of a conventional bipolar identification circuit.
FIG. 2 is an electrical wiring diagram showing an embodiment of the bipolarity discrimination circuit according to the present invention, and FIG. 3 is a circuit diagram showing an embodiment of the average value detection circuit. 13... Equalization amplifier, 14... Differential amplifier, 1
7... Average value detection circuit, 18, 23... Reference power supply (reference level shift circuit), 19, 20... Discrimination reproducing circuit.
Claims (1)
衡出力回路から成る等化増幅器と、前記等化増幅
器の２つの出力電圧を入力とし、その出力電圧の
バイアスの平均値を検出する平均値検出回路と、
前記平均値検出回路検出出力が変動したとき一定
の比率をもつて出力が変動する基準レベルシフト
回路と、前記基準レベルシフト回路出力をしきい
値とし前記等化増幅器の２つの出力をそれぞれ入
力とする２つの識別再生回路とから構成した両極
性識別回路。1. An equalizing amplifier consisting of a balanced output circuit having two output terminals of positive phase and negative phase, and an average value that takes the two output voltages of the equalizing amplifier as input and detects the average value of the bias of the output voltage. a detection circuit;
a reference level shift circuit whose output varies at a constant rate when the detection output of the average value detection circuit varies; and a reference level shift circuit whose output is set as a threshold value and whose inputs are the two outputs of the equalization amplifier. A bipolar identification circuit consisting of two identification reproducing circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3776979A JPS55130262A (en) | 1979-03-30 | 1979-03-30 | Bipolarity discrimination circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3776979A JPS55130262A (en) | 1979-03-30 | 1979-03-30 | Bipolarity discrimination circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55130262A JPS55130262A (en) | 1980-10-08 |
| JPS6333750B2 true JPS6333750B2 (en) | 1988-07-06 |
Family
ID=12506666
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3776979A Granted JPS55130262A (en) | 1979-03-30 | 1979-03-30 | Bipolarity discrimination circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55130262A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56152442U (en) * | 1980-04-15 | 1981-11-14 | ||
| JP2542575B2 (en) * | 1985-12-26 | 1996-10-09 | 株式会社東芝 | Wave shaping circuit |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS584274Y2 (en) * | 1976-11-11 | 1983-01-25 | 富士通株式会社 | Fiber optic digital link receiver circuit |
| JPS5535581A (en) * | 1978-09-06 | 1980-03-12 | Sony Corp | Waveform shaping circuit |
-
1979
- 1979-03-30 JP JP3776979A patent/JPS55130262A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55130262A (en) | 1980-10-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6333750B2 (en) | ||
| JPS58166412A (en) | Current identifier | |
| EP0473370A1 (en) | Gain control circuit | |
| US4396889A (en) | Nonadjusting battery life detector | |
| JPH0145242B2 (en) | ||
| JPS632888Y2 (en) | ||
| JPH0416500Y2 (en) | ||
| CA1082781A (en) | Window comparator | |
| JPH0441531B2 (en) | ||
| SU1149380A1 (en) | Differential amplifier | |
| JPH0216042B2 (en) | ||
| JP2980783B2 (en) | Current detection circuit and constant voltage power supply circuit using the same | |
| SU815866A1 (en) | Amplifier | |
| SU1171967A1 (en) | Synchronous demodulator | |
| SU773603A1 (en) | Dc voltage source | |
| JPH0326674Y2 (en) | ||
| SU413618A1 (en) | ||
| JPH0252884B2 (en) | ||
| JPH02142211A (en) | Gain variable amplifier | |
| JPS6310649B2 (en) | ||
| JPS62110307A (en) | Gain variable circuit | |
| JPH0572788B2 (en) | ||
| JPS6235268A (en) | Current detecting circuit | |
| JPH0142402B2 (en) | ||
| GB2139030A (en) | Current mirror circuit |