JPS6336230B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a type of DC-DC converter that uses field effect transistors as a rectifier circuit, and more specifically, to a DC-DC converter that has a simple configuration and a rectifier circuit that generates less loss. It concerns DC converters.

Using field effect transistors in rectifier circuits
A conventional circuit of a DC-DC converter is shown in FIG. 1, and its operating waveforms are shown in FIG. 2.

In FIG. 1, 1 is a DC power supply, 2 is a square wave oscillator, 3 is a transformer, 4 and 5 are each a rectifying field effect transistor, 6 is a smoothing filter, 7 is an output terminal, 8 and 9 are each a field effect transistor 4 , 5 are the parasitic diodes, n ₁ is the primary winding of the transformer 3, and n ₂₁ and n ₂₂ are the secondary windings.

In FIG. 2, a is the voltage of the transformer winding _n1 , b, c, and d are the gate-drain voltage, source-drain voltage, and source-drain voltage of the rectifying field effect transistor 4, respectively, and e,
f and g are respectively rectifying field effect transistors 5
These are the gate-drain voltage, source-drain voltage, and source-drain voltage of.

In the circuit of FIG. 1, the period during which the rectifying field effect transistor 4 is to be turned on (t ₀ to _{t 2} in FIG. 2,
During the period t ₀ to _{t 1} (t ₃ to _{t 4} ), the gate bias voltage b is applied and the on-voltage d between the drain and source increases.
can be lowered, but the period t ₁ - t ₂ and t ₃ -
During period t ₄ , the gate drive voltage b is not applied, so the field effect transistor 4 is not turned on, and the parasitic PN diode 8 is turned on, so the voltage drop is equal to the source-drain voltage d when the field effect transistor is turned on.
be higher than Rectifying field effect transistor 5
Also, t ₁ to _{t 2} of the period t ₁ to _{t 4} to be turned on
Since the gate drive voltage e is not applied during the period _t3 to _t4 , the source-drain voltage g becomes high.
The use of field effect transistors in rectifier circuits is
The purpose is to reduce loss by keeping the on-voltage as low as 0.1 to 0.2V, but in conventional circuit configurations, there are periods when no drive voltage is applied, so the effect of reducing loss in such a rectifier circuit is not sufficient. The drawback was that it could not be fully demonstrated.

The period during which no driving voltage is applied is due to the fact that the output waveform of the rectangular wave oscillator 2 has a zero period in addition to positive and negative periods, as shown in Figure 2a. In the rectangular wave oscillator 2, it is practically impossible to make this zero period itself zero. That is, if you do such a thing, there is a risk of destroying the transistor elements that make up the square wave oscillator 2, and in a normal DC-DC converter, the zero period in the square wave is This is because the magnitude of the output voltage is variably controlled by adjusting the length.

The present invention has been made in order to eliminate the drawbacks of the conventional circuits as described above, and therefore, an object of the present invention is to ensure that the rectifying field effect transistor remains on throughout the period in which the rectifier field effect transistor should be turned on. It is an object of the present invention to provide a DC-DC converter that can sufficiently exhibit the effect of reducing the loss of a rectifier circuit by obtaining the driving voltage necessary for turning on the DC-DC converter.

The main point of the configuration of the present invention is that a rectangular wave with positive, negative, and zero periods from a rectangular wave oscillator using DC as a power source is connected to the primary winding of a transformer, and the secondary winding with a center tap is connected to the primary winding of the transformer. A DC-DC system in which the output obtained from one end of the line is rectified by a first field effect transistor, the output obtained from the other end is rectified by a second field effect transistor, and the rectified output is passed through a smoothing filter to obtain a DC output. In the converter, the transformer is provided with a third winding with a center tap, both ends of the winding are connected to the inputs of separate inverter circuits, and the outputs of the respective inverter circuits are connected to the first and second windings. are connected to the gate terminals of field effect transistors, respectively.

Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 3 is a circuit diagram showing one embodiment of the present invention. In the figure, 1 is a DC power supply, 2 is a square wave oscillator, 3 is a transformer, 4 and 5 are rectifying field effect transistors, 6 is a smoothing filter, 7 is an output terminal, 8 and 9 are field effect transistors 4 and 9, respectively. The parasitic diodes 10 and 11 of 5 are a CMOS-IC inverter circuit having the characteristics shown in FIG.
It is. That is, the inverter circuits 10 and 11 are
It has the characteristic that when the input is positive, it outputs a zero or negative value, and when the input is zero or negative, it outputs a positive value in either case. In addition, n ₁ is the primary winding of the transformer 3, n ₂₁ and n ₂₂ are the secondary windings, and n ₃₁ and n ₃₂ are the third driving windings.

Moreover, FIG. 5 is a waveform diagram showing the operating waveforms of the circuit of FIG. 3, where a is the voltage of the transformer winding _n1 , b,
c and d are rectifying field effect transistors 4, respectively.
gate-drain voltage, source-drain current, source-drain voltage, e, f, g are the gate-drain voltage, source-drain voltage, source-drain voltage of the rectifying field effect transistor 5, respectively, h is the transformer winding The voltage of n ₃₁ , i is the voltage of winding n ₃₂ .

Next, the operation will be explained. At time t ₀ in Fig. 5, if a positive voltage occurs on the side of the transformer winding n ₁ marked with
Since a positive voltage on the + side is generated in the windings n ₃₁ and n ₃₂ , the output of the inverter circuit 10 is positive, the output of the inverter circuit 11 is zero (or negative), and the rectifying field effect transistor 4 is on, the rectifying field effect transistor 5 turns off, and the transformer winding n ₂₁
is transmitted to the output terminal 7 via the smoothing filter 6. When the voltage of the transformer winding n ₁ becomes zero at time t ₁ , the voltage of the windings n ₃₁ and n ₃₂ becomes zero, so the outputs of both inverter circuits 10 and 11 become positive, and the rectifying field effect transistors 4 and 5 Turn on together. In this state, the current supplied from the smoothing filter 6 divides the transformer windings n ₂₁ and n ₂₂ . At time t ₂ , when a negative voltage is generated on the side of the transformer winding n ₁ marked with ・, the windings n ₃₁ and n ₃₂ of the transformer 3 have ・
Since a negative voltage is generated on the sign side, the output of the inverter circuit 10 is zero (or negative), and the output of the inverter circuit 1 is zero (or negative).
1 is positive, the rectifying field effect transistor 4 is turned off, the rectifying field effect transistor 5 is turned on, and the voltage of the transformer winding _n22 is transmitted to the output terminal 7 via the smoothing filter 6. When the voltage of transformer winding n ₁ becomes zero at time t ₃ , t ₁ - t ₂
In the same operation as in the period, both the rectifying field effect transistors 4 and 5 are turned on, and the current of the smoothing filter 6 is shunted through the transformer windings n ₂₁ and n ₂₂ . After time _t4 , the operation from _t0 is repeated.

By such an operation, the on-voltage of the rectifying field effect transistor is held to a low value throughout the on-period as shown in FIGS. 5d and 5g, and a rectifying circuit with low loss can be constructed.

As explained above, according to the present invention, DC-
In a DC converter, by detecting the winding voltage of a transformer and driving the rectifying field effect transistor by an inverter circuit, the rectifying field effect transistor is turned on for the entire period when the rectifying field effect transistor should be turned on. Since the necessary voltage can be applied to the gate, the on-voltage drop can be kept low throughout the on-period.
This has the advantage that a rectifier circuit with low loss can be constructed.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing a conventional example of a DC-DC converter using field effect transistors in a rectifier circuit, Fig. 2 is a waveform diagram showing its operating waveforms, and Fig. 3 is a circuit showing an embodiment of the present invention. Figure 4 is the third
FIG. 5 is a waveform diagram showing operating waveforms of the circuit shown in FIG. 3. Explanation of symbols, 1... DC power supply, 2... Square wave oscillator, 3... Transformer, 4, 5... Field effect transistor for rectification, 6... Smoothing filter, 7... Output terminal, 8, 9... Electric field Parasitic diode of effect transistor, 10, 11... Inverter circuit, a...
... Voltage of transformer winding n ₁ , b... Gate-drain voltage of rectifying field effect transistor 5, c...
Source-drain current of the rectifying field-effect transistor 5, d... Source-drain voltage of the rectifying field-effect transistor 5, c... Gate-drain voltage of the rectifying field-effect transistor 6, f... Rectifying field-effect transistor g...source-drain voltage of the rectifying field effect transistor 6, h...voltage of the winding _n31 of the conversion transformer 4, i...voltage of the winding _n32 of the conversion transformer 4.

Claims (1)

[Claims] 1 Positive and
A square wave having negative and zero periods is connected to the primary winding of a transformer, and the output obtained from one end of the center-tapped secondary winding of the transformer is obtained from the first field effect transistor and the other end. In the DC-DC converter, the outputs of the transformer are rectified by second field effect transistors, and the rectified outputs are passed through a smoothing filter and obtained as DC outputs. Both ends of the winding are connected to the inputs of separate inverter circuits, and the output of each of the inverter circuits is connected to the first
and the gate terminal of the second field effect transistor, respectively.
DC converter.