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JPS6336683B2 - - Google Patents
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JPS6336683B2 - - Google Patents

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Publication number
JPS6336683B2
JPS6336683B2 JP2074481A JP2074481A JPS6336683B2 JP S6336683 B2 JPS6336683 B2 JP S6336683B2 JP 2074481 A JP2074481 A JP 2074481A JP 2074481 A JP2074481 A JP 2074481A JP S6336683 B2 JPS6336683 B2 JP S6336683B2
Authority
JP
Japan
Prior art keywords
level
output
amplifier
attenuation
amplification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2074481A
Other languages
Japanese (ja)
Other versions
JPS57135513A (en
Inventor
Tomofumi Nakatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Columbia Co Ltd
Original Assignee
Nippon Columbia Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Columbia Co Ltd filed Critical Nippon Columbia Co Ltd
Priority to JP2074481A priority Critical patent/JPS57135513A/en
Publication of JPS57135513A publication Critical patent/JPS57135513A/en
Publication of JPS6336683B2 publication Critical patent/JPS6336683B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G9/00Combinations of two or more types of control, e.g. gain control and tone control
    • H03G9/02Combinations of two or more types of control, e.g. gain control and tone control in untuned amplifiers

Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は増幅度を可変になされた増幅器の、増
幅度の変化量と入力信号の音圧レベルによりラウ
ドネス特性に応じた補正を行うラウドネス補正回
路に関する。楽音信号を種々の伝送媒体(レコー
ドとかテープ録音)を通じ再生する場合録音時に
大音量で収音された信号(原音)を小音量で受聴
する際、聴感上、低音不足を感じることが良く知
られている。これは音の大きさの等感特性を示す
ラウドネス特性が原音での受聴時のものとと小音
量での受聴時のものと異なるためである。この受
聴時に音圧レベルを原音に対して減衰させること
によつて生ずる両ラウドネス特性の差は特に低域
周波数において顕著で、その差は受聴時の音圧レ
ベルと原音の音圧レベルの差に依存して変化す
る。この為従来より種々なるラウドネス補正回路
が提案されているが減衰量に応じて補正特性は一
律に定まつてしまうものである為、必ずしも入力
信号の各レベルに対して最適の補正が行われると
はいえなかつた。 そこで最近減衰量と共に入力信号のレベルも考
慮して補正特性を定める試みがなされている。即
ち第1図はS.S.STevensが“PerceivedLevel of
Noise by Mark Vlland Decibels(E)”、J.
Acoust.Soc.Am.、vol.575−601(1972).で発表
している等感特性の低域周波数での特性の一部で
ある。図においてP100、P80及びP60はそれぞれ
実線イ,ロ及びハで示す100dB、80dB及び60dB
の等感特性の40Hzにおける値で、それぞれ
115.8dB、97.9dB及び83.9dBである。今増幅度を
可変になされた増幅器で入力信号を増幅し、スピ
ーカを駆動して受聴している場合、増幅度を規定
の増幅度に設定しておくと、スピーカからの音圧
レベル即ち入力信号の音圧レベルは原音の音圧レ
ベルと等しくなるものとする。この様な状態で
80dBの等感特性ロにのつている音を20dBレベル
を減衰して受聴すれば点線ハ′の如く平行移動し
て40Hzの音は77.9dBとなる。しかるに20dB減衰
した60dBでの本来の等感特性ハにおける40Hzの
値は83.9dBであるから、上述の様に単に80dBの
等感特性を20dB平行移動しただけでは6.0dBだけ
減衰させすぎることになる。従つてこの6.0dBだ
け大きく補正してやれば聴感上の差はなくなり、
バランスのとれた再生が可能となるわけである。
逆に80dBの音(97.9dB)を20dB大きくして受聴
すれば同様に平行移動して40Hzにおいて117.9dB
となり100dBの等感特性の40Hzに対する値
115.8dBに対して2.1dBの差を生ずる。従つて40
Hzにおいては2.1dBだけ小さく補正してやれば聴
感上の差がなくなる。
The present invention relates to a loudness correction circuit that performs correction according to the loudness characteristics of an amplifier whose amplification degree is made variable based on the amount of change in the amplification degree and the sound pressure level of an input signal. When playing back musical sound signals through various transmission media (records, tape recordings), it is well known that when listening to a signal (original sound) that was collected at a high volume during recording at a low volume, a lack of bass can be felt. ing. This is because the loudness characteristics, which indicate the equal sensitivity characteristics of sound loudness, are different when listening to the original sound and when listening at a low volume. The difference in loudness characteristics caused by attenuating the sound pressure level with respect to the original sound during listening is particularly noticeable at low frequencies, and the difference is due to the difference between the sound pressure level during listening and the sound pressure level of the original sound. It depends and changes. For this reason, various loudness correction circuits have been proposed in the past, but since the correction characteristics are fixed uniformly depending on the amount of attenuation, it is not always possible to perform the optimal correction for each level of the input signal. I couldn't say yes. Therefore, attempts have recently been made to determine the correction characteristics by considering the level of the input signal as well as the amount of attenuation. In other words, in Figure 1, SSSTevens is “PerceivedLevel of
Noise by Mark Vlland Decibels(E)”, J.
Acoust.Soc.Am., vol.575−601 (1972). This is a part of the low frequency characteristics of the isosensitive characteristics announced in . In the figure, P100, P80 and P60 are 100dB, 80dB and 60dB indicated by solid lines A, B and C, respectively.
The value at 40Hz of the isosensitive characteristic of
They are 115.8dB, 97.9dB and 83.9dB. If you are currently listening by amplifying the input signal using an amplifier with variable amplification and driving the speaker, setting the amplification to the specified amplification will reduce the sound pressure level from the speaker, that is, the input signal. The sound pressure level shall be equal to the sound pressure level of the original sound. in this state
If you listen to a sound that has an 80 dB equal-sensitivity characteristic B with a 20 dB level attenuation, it will shift in parallel as shown by the dotted line C', and the 40 Hz sound will become 77.9 dB. However, since the value at 40Hz in the original isosensitive characteristic C at 60dB, which has been attenuated by 20dB, is 83.9dB, simply moving the 80dB isosensitive characteristic by 20dB in parallel as described above will over-attenuate it by 6.0dB. . Therefore, if you make a large correction by this 6.0dB, the difference in hearing will disappear,
This allows for balanced playback.
Conversely, if you listen to an 80 dB sound (97.9 dB) with 20 dB louder, it will similarly shift in parallel and become 117.9 dB at 40 Hz.
The value for 40Hz of the equal sensitivity characteristic of 100dB
This results in a difference of 2.1dB compared to 115.8dB. Therefore 40
At Hz, if you correct it by 2.1dB, the difference in hearing will disappear.

【表】 この関係を表示すれば表1の様になる。表1は
原音の音圧レベル、即ち入力信号を規定増幅度で
再生して得られる入力信号の音圧レベルの種々な
る値に対して5dB、10dB及び15dBの減衰を与え
て受聴する場合に必要な各周波数に対する補正量
を示すものである。この表1の減衰量5dBの項か
ら周波数20Hzで入力信号の音圧レベル85dB又
80dBの音を5dB減衰させた場合はそれぞれ1.6dB
又は1.8dBの補正が必要であることがわかる。尚
このことから入力信号の音圧レベル85dBの音を
10dR減衰させた場合は上述の1.6dBと1.8dBを加
えた3.4dBの補正が必要であることがわかる。こ
の様にして減衰量5dBの場合の表から減衰量
10dB、15dBあるいはそれ以上の減衰量に対する
補正量を算出することが出来るが、一応参考まで
に減衰量10dB及び15dBの場合の補正量について
も上記表中に示す。しかしながら、この様な補正
を施すにはきわめて複雑な制御回路を必要とする
欠点があつた。 本発明は上述の様なラウドネス補正の量を簡易
な回路で減衰量と入力信号の音圧レベルの両方に
基づいて定めるもので、以下実施例に従つて詳細
に説明する。 第2図は本発明の一実施例である。 図において左チヤンネルの入力端子1は加算器
5に接続されると共に、可変減衰器3を介して補
正回路21及び加算器11に接続される。右チヤ
ンネルの入力端子2は加算器5に接続されると共
に、可変減衰器4を介して補正回路24及び加算
器11に接続される。補正回路21及び24の出
力は増幅器22及び25により増幅され左及び右
のスピーカ23及び26に接続される。加算器5
及び11の出力はそれぞれフイルタ6及び12を
介して検波器7及び13に印加され、その検波出
力はそれぞれコンパレータ8及び14に接続され
る。コンパレータ8及び14は、それぞれ非反転
入力端子が共通に信号端子に接続された差動増幅
器8−1〜8−9及び14−1〜14−8と、基
準電源端子8−21及び14−21に接続された
分圧用の直列抵抗8−11〜8−19及び14−
11〜14−18とからなり、基準電源端子及び
各直列抵抗の接続点はそれぞれ各差動増幅器の反
転入力端子に順次接続された周知のものであるか
ら詳細な説明は省略する。コンパレータ8及び1
4の基準電源端子には基準電源29及び抵抗30
を介して前記検波器7の出力端子がそれぞれ接続
される。差動増幅器8−1〜8−7の出力はそれ
ぞれアンド回路群9のアンド回路9−1〜9−7
の一方の入力端子に接続され、差動増幅器8−8
及び8−9の出力はそれぞれ加算器10の加算抵
抗10−8及び10−9に接続される。各アンド
回路9−1〜9−7の出力はそれぞれ加算器10
の加算抵抗10−1〜10−7に加えられて加算
される。差動増幅器14−1〜14−8の出力は
加算器15の加算抵抗15−1〜15−8に加え
られ、各加算抵抗は共通に加算器15の差動増幅
器15−12の反転入力端子に接続されると共に
抵抗15−9を介して負電源15−11に接続さ
れる。差動増幅器15−12の非反転入力端子は
接地され、出力は抵抗15−10を介して反転入
力端子に負帰還される。差動増幅器14−1〜1
4−7の出力はそれぞれインバータ16−7〜1
6−1を介してアンド回路9−7〜9−1の他方
の入力端子に接続される。加算器10及び15の
出力は加算器18の加算抵抗19及び20に加え
られて加算され、制御出力信号17となつて補正
回路21及び24の制御端子に加えられる。 以上の構成による動作を説明する。 加算器5により加算された入力信号は次段の中
心周波数1KHz帯域幅1KHzのバンドパスフイルタ
により帯域制限されて検波器7により検波され
る。この検波出力は、コンパレータ8によりレベ
ル比較され、減衰器3及び4の減衰度がゼロの場
合に左右のスピーカ23及び26から得られる音
圧の合計レベルに換算される。音圧合計115dB以
上では差動増幅器8−1〜8−9のすべてがオン
になり、従つてアンド回路9−1〜9−7の一方
の入力端子は高レベルとなる。この状態から音圧
が5dB減ずる毎に差動増幅器8−1より順次オフ
となり、音圧が75dB以下ではすべてオフとなる。
又加算器10はアンド回路9−1〜9−9のうち
オンとなるものが増えるに従つて出力電圧はゼロ
から次第に負へ増加して、すべてがオンとなると
−2.7.Vとなる様に調整されている。 次に減衰器3及び4の出力は前述と同様に加算
され帯域制限されて検波され、コンパレータ14
に加えられ、前記左右の入力信号とレベル比較さ
れて減衰器3と4との平均減衰度が測定され、減
衰度が5dB以下であれば差動増幅器14−1〜1
4−8のすべてがオンとなる。又この状態から減
衰度が5dB増加する毎に差動増幅器は14−1か
ら順次オフとなつて、減衰度が40dB以上では差
動増幅器14−1〜14−8のすべてがオフとな
る。ここで差動増幅器14−1〜14−8はオフ
状態では接地レベル、オン状態では正電圧となる
ものとし、加算器15は上記差動増幅器14−1
〜14−8のうち次第にオンとなるものが増える
に従つて出力電圧は5.7Vから0.3Vづつ減少して
すべてがオンとなると3.6Vになる様に各抵抗1
5−1〜15−10は調整されている。 ここで減衰器3及び4の減衰量が35dB以上で
あれば、差動増幅器14−1〜14−7はオフで
ある。従つてインバータ16−1〜16−7の出
力は高レベルとなるのでアンド回路9−1〜9−
7の他方の入力端子はすべて高レベルになる。減
衰量が30dB〜35dBになると差動増幅器14−7
がオンになり、従つてアンド回路9−1の他方の
入力端子のみが低レベルとなる。この状態から減
衰量が5dBづつ低下する毎に、差動増幅器14−
6〜14−1の順序で順次差動増幅器がオンとな
つていき、減衰量が5dB以下ではすべての差動増
幅器がオンとなる。従つてアンド回路は9−2〜
9−7の順序で順次その他方の入力端子が低レベ
ルとなる。この様にアンド回路9−1〜9−7の
他方の入力端子のレベルは減衰量に応じて定まる
ことになる。 次に左右の入力信号の音圧レベルが75dB以下
では差動増幅器8−1〜8−9は低レベルである
からアンド回路出力は高レベルとならず、従つて
加算器10の出力はゼロである。上記音圧レベル
が増加するにつれて差動増幅器8−9の出力から
順次高レベルとなり、80〜85dBでは加算器10
の出力は−0.6Vとなる。ここで例えば前記減衰
量が35dB以上であれば前記各アンド回路の他方
の入力端子は高レベルとなるから、仮りに音圧レ
ベルが85dB以上となりさらに5dBづつ増加する
につれて、アンド回路9−7よりその出力が順次
高レベルとなり加算器10の出力も−0.3Vづつ
加算され、音圧レベルが115dB以上では−2.7Vと
なる。又減衰量が35dB以下となりさらに5dBづ
つ減少していく毎に、アンド回路9−1から順次
その他方の入力端子は低レベルとなり、減衰量が
5dB以下ではすべてのアンド回路の他方の入力端
子が低レベルとなる。従つて減衰量に応じて加算
器10の出力電圧の負方向の最大値は制限され
る。 こうして得られた加算器10の負出力と加算器
15の正出力は加算器18で加算されて表2に示
す様な制御電圧が得られる。 この制御電圧は補正回路21に加えられてスピ
ーカ23から得られる音声信号の周波数特性を制
御する。 ここで前記表1ついてさらに説明するに、減
[Table] If this relationship is displayed, it will look like Table 1. Table 1 is necessary when listening with attenuation of 5 dB, 10 dB, and 15 dB for various values of the sound pressure level of the original sound, that is, the sound pressure level of the input signal obtained by reproducing the input signal with a specified amplification degree. This shows the amount of correction for each frequency. From the 5 dB attenuation term in Table 1, the sound pressure level of the input signal is 85 dB or higher at a frequency of 20 Hz.
If a sound of 80 dB is attenuated by 5 dB, each will be 1.6 dB.
Or it can be seen that a correction of 1.8dB is required. Furthermore, from this, the sound pressure level of the input signal is 85 dB.
It can be seen that when attenuating by 10 dR, a correction of 3.4 dB, which is the sum of the above-mentioned 1.6 dB and 1.8 dB, is required. In this way, from the table when the attenuation amount is 5 dB, the attenuation amount is
Although it is possible to calculate the correction amount for attenuation amounts of 10 dB, 15 dB, or more, the above table also shows the correction amounts for attenuation amounts of 10 dB and 15 dB for reference. However, there is a drawback in that an extremely complicated control circuit is required to perform such correction. The present invention determines the amount of loudness correction as described above using a simple circuit based on both the attenuation amount and the sound pressure level of the input signal, and will be described in detail below with reference to embodiments. FIG. 2 shows an embodiment of the present invention. In the figure, the input terminal 1 of the left channel is connected to an adder 5, and also to a correction circuit 21 and an adder 11 via a variable attenuator 3. The input terminal 2 of the right channel is connected to an adder 5 and also to a correction circuit 24 and an adder 11 via a variable attenuator 4. The outputs of the correction circuits 21 and 24 are amplified by amplifiers 22 and 25 and connected to left and right speakers 23 and 26. Adder 5
and 11 are applied to detectors 7 and 13 via filters 6 and 12, respectively, and their detection outputs are connected to comparators 8 and 14, respectively. Comparators 8 and 14 include differential amplifiers 8-1 to 8-9 and 14-1 to 14-8 whose non-inverting input terminals are commonly connected to a signal terminal, and reference power supply terminals 8-21 and 14-21, respectively. Series resistors 8-11 to 8-19 and 14- for voltage division connected to
11 to 14 to 18, and the connection points between the reference power supply terminal and each series resistor are connected sequentially to the inverting input terminal of each differential amplifier, respectively, and are well known, so a detailed explanation will be omitted. Comparators 8 and 1
The reference power supply terminal 4 has a reference power supply 29 and a resistor 30.
The output terminals of the detectors 7 are connected to each other via the respective detectors. The outputs of the differential amplifiers 8-1 to 8-7 are outputted to the AND circuits 9-1 to 9-7 of the AND circuit group 9, respectively.
is connected to one input terminal of the differential amplifier 8-8.
and 8-9 are connected to adding resistors 10-8 and 10-9 of adder 10, respectively. The output of each AND circuit 9-1 to 9-7 is sent to an adder 10
are added to the addition resistors 10-1 to 10-7. The outputs of the differential amplifiers 14-1 to 14-8 are applied to the adding resistors 15-1 to 15-8 of the adder 15, and each adding resistor is commonly connected to the inverting input terminal of the differential amplifier 15-12 of the adder 15. It is also connected to a negative power supply 15-11 via a resistor 15-9. The non-inverting input terminal of the differential amplifier 15-12 is grounded, and the output is negatively fed back to the inverting input terminal via the resistor 15-10. Differential amplifier 14-1~1
The outputs of 4-7 are connected to inverters 16-7 to 1, respectively.
6-1 to the other input terminals of AND circuits 9-7 to 9-1. The outputs of the adders 10 and 15 are added to the adding resistors 19 and 20 of the adder 18, and are added as a control output signal 17, which is applied to the control terminals of the correction circuits 21 and 24. The operation of the above configuration will be explained. The input signal added by the adder 5 is band-limited by a bandpass filter having a center frequency of 1 KHz and a bandwidth of 1 KHz at the next stage, and then detected by a detector 7. This detection output is level-compared by a comparator 8, and converted into the total level of sound pressure obtained from the left and right speakers 23 and 26 when the attenuation degrees of the attenuators 3 and 4 are zero. When the total sound pressure exceeds 115 dB, all of the differential amplifiers 8-1 to 8-9 are turned on, and therefore one input terminal of the AND circuits 9-1 to 9-7 becomes a high level. From this state, every time the sound pressure decreases by 5 dB, the differential amplifier 8-1 is sequentially turned off, and when the sound pressure is 75 dB or less, all the differential amplifiers are turned off.
Further, as the number of AND circuits 9-1 to 9-9 that are turned on increases, the output voltage of the adder 10 gradually increases from zero to negative values, and when all of them are turned on, the output voltage becomes -2.7V. It has been adjusted. Next, the outputs of attenuators 3 and 4 are added together, band-limited, and detected in the same manner as described above, and the outputs of attenuators 3 and 4 are detected by comparator 14.
is added to the left and right input signals, and the level is compared with the left and right input signals to measure the average attenuation of attenuators 3 and 4. If the attenuation is 5 dB or less, the differential amplifiers 14-1 to 1
4-8 are all turned on. From this state, every time the degree of attenuation increases by 5 dB, the differential amplifiers 14-1 and 14-1 are sequentially turned off, and when the degree of attenuation exceeds 40 dB, all of the differential amplifiers 14-1 to 14-8 are turned off. Here, the differential amplifiers 14-1 to 14-8 are assumed to have a ground level in the off state and a positive voltage in the on state, and the adder 15 is connected to the differential amplifier 14-1.
As more and more of ~14-8 are turned on, the output voltage decreases by 0.3V from 5.7V, and when all of them are turned on, it becomes 3.6V.
5-1 to 15-10 have been adjusted. Here, if the attenuation amounts of the attenuators 3 and 4 are 35 dB or more, the differential amplifiers 14-1 to 14-7 are off. Therefore, the outputs of the inverters 16-1 to 16-7 are at a high level, so the AND circuits 9-1 to 9-
The other input terminals of 7 all go high. When the attenuation is 30dB to 35dB, the differential amplifier 14-7
is turned on, and therefore only the other input terminal of AND circuit 9-1 becomes low level. From this state, each time the attenuation decreases by 5 dB, the differential amplifier 14-
The differential amplifiers are turned on in sequence from 6 to 14-1, and all the differential amplifiers are turned on when the attenuation amount is 5 dB or less. Therefore, the AND circuit is 9-2~
The other input terminals become low level one after another in the order of 9-7. In this way, the level of the other input terminal of AND circuits 9-1 to 9-7 is determined according to the amount of attenuation. Next, when the sound pressure level of the left and right input signals is 75 dB or less, the differential amplifiers 8-1 to 8-9 are at a low level, so the AND circuit output does not become a high level, and therefore the output of the adder 10 is zero. be. As the sound pressure level increases, the output level of the differential amplifiers 8-9 becomes higher sequentially, and at 80 to 85 dB, the output of the adder 10 increases.
The output will be −0.6V. Here, for example, if the attenuation amount is 35 dB or more, the other input terminal of each AND circuit will be at a high level, so if the sound pressure level becomes 85 dB or more and further increases by 5 dB, the The output becomes high level one by one, and the output of the adder 10 is also added by -0.3V, and when the sound pressure level is 115 dB or more, it becomes -2.7V. In addition, each time the attenuation becomes 35 dB or less and further decreases by 5 dB, the other input terminals of the AND circuit 9-1 become low level, and the attenuation decreases by 5 dB.
Below 5dB, the other input terminal of all AND circuits becomes low level. Therefore, the maximum value of the output voltage of the adder 10 in the negative direction is limited depending on the amount of attenuation. The negative output of adder 10 and the positive output of adder 15 thus obtained are added by adder 18 to obtain control voltages as shown in Table 2. This control voltage is applied to the correction circuit 21 to control the frequency characteristics of the audio signal obtained from the speaker 23. To further explain Table 1 above,

【表】【table】

Claims (1)

【特許請求の範囲】[Claims] 1 増幅度が可変になされた増幅器と、該増幅器
の入力信号のレベルを検出して出力を発生する互
いに検出レベルの異なる複数のレベル検出手段
と、基準増幅度に対する上記増幅度の減少度に応
じた増幅度対応出力を得る手段と、上記複数のレ
ベル検出手段のうちの検出レベルが所定値以上に
なされているレベル検出手段の出力を上記増幅度
対応出力に応じてオンオフさせる手段と、上記複
数のレベル検出手段の出力と増幅度対応出力とを
加算して制御出力を得る手段と、上記制御出力に
より上記増幅器の低域の周波数特性を制御するこ
とを特徴とするラウドネス補正回路。
1. An amplifier with a variable amplification level, a plurality of level detection means having mutually different detection levels that detect the level of the input signal of the amplifier and generate an output, and a level detecting means that detects the level of the input signal of the amplifier and generates an output, and a level detecting means that detects the level of the input signal of the amplifier and generates an output according to the degree of decrease in the amplification level with respect to the reference amplification level. means for obtaining an output corresponding to the amplification degree, and means for turning on and off the output of the level detection means whose detection level is higher than a predetermined value among the plurality of level detection means according to the output corresponding to the amplification degree; A loudness correction circuit comprising means for obtaining a control output by adding the output of the level detection means and the output corresponding to the amplification degree, and controlling the low frequency characteristic of the amplifier by the control output.
JP2074481A 1981-02-13 1981-02-13 Loudness correcting circuit Granted JPS57135513A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2074481A JPS57135513A (en) 1981-02-13 1981-02-13 Loudness correcting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2074481A JPS57135513A (en) 1981-02-13 1981-02-13 Loudness correcting circuit

Publications (2)

Publication Number Publication Date
JPS57135513A JPS57135513A (en) 1982-08-21
JPS6336683B2 true JPS6336683B2 (en) 1988-07-21

Family

ID=12035694

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2074481A Granted JPS57135513A (en) 1981-02-13 1981-02-13 Loudness correcting circuit

Country Status (1)

Country Link
JP (1) JPS57135513A (en)

Also Published As

Publication number Publication date
JPS57135513A (en) 1982-08-21

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