JPS6338927B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power protection device, and more particularly to a power protection device suitable for a power source whose load is a pulsed current, such as a power source for a thermal recording device or a pulse motor.

Generally speaking, a current-limiting type protection system is well known as a power supply protection system. This is a method that detects the output current of the power supply and limits its maximum value.
Although it is excellent in preventing damage to the power supply transistors, which are the power supply components, if the current is lower than the output current limit point for a long time, it may damage the power supply transformers and power supply components, which are the power supply components. This method has the disadvantage that it cannot prevent power transistors and the like from overheating and being damaged. Particularly in power supplies that supply power to loads with pulsed currents such as thermal recording devices and pulse motors, current-limiting power supply protection methods alone are insufficient to keep the power supply components such as power transformers and power transistors in line with the peak current. Therefore, it is impossible to downsize the power supply and obtain sufficient reliability.

For example, in a thermal recording device, in order to give sufficient recording density to thermal recording paper, a recording current of approximately 100 mA per element is supplied in pulses at a period of several milliseconds to the heating resistors formed in large numbers in the thermal recording head. Must be. However, for example, if current pulses with abnormally long time intervals continue for a long time due to equipment failure, etc., the burden on the recording power source will be heavy, and the power transformer, power transistor, etc. that are the components of the recording power source will generate heat. In order to sufficiently withstand this type of abnormality, the power supply must be large and expensive.

In order to solve such problems, the most common method used in the past has been to use both the current limiting method and the temperature sensing method. Under normal conditions, this constitutes a recording power supply with an appropriate margin for the time-integrated power of the pulsed output, and is protected against instantaneous current exceeding the rating with a current-limiting circuit, and other This is a method of detecting an abnormality based on an abnormal temperature rise of the recording power source components and limiting the output of the recording power source. However, in the temperature detection method, due to the heat transfer time from the temperature detected element to the temperature detection element, there is an abnormality detection delay time from the occurrence of an abnormality to the detection of an abnormal temperature rise in the recording power supply components, and during this delay time. In some cases, damage to the recording power supply components cannot be prevented.

After all, the temperature detection method detects an abnormality in a power supply component caused by an abnormality in the load of the power supply, and has the drawback that the reliability of the protection function is low.

The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art in a power source that loads pulsed current,
It is an object of the present invention to provide a power supply protection device that realizes miniaturization and cost reduction of a power supply and has sufficient reliability.

In order to achieve the above object, the present invention includes an output current detection circuit and a timer circuit that detects whether the time width of the output current pulse detected by the circuit exceeds the normal pulse time width. The present invention is characterized in that the timer circuit is configured to stop the power supply or limit the output current if there is an abnormality in the time width of the output current pulse.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the basic configuration of the present invention. The output of the power supply 1 is supplied to a load 3 through a current detection circuit 2. When the output current signal f ₀ is output from the current detection circuit 2, the timer circuit 4 detects an abnormality in the pulse time width. Then, the abnormality detection signal f ₁ or f ₂ drives the gate circuit 5 and outputs the power supply stop signal f ₄ to the power supply to stop the power supply, or outputs the output current limit signal f ₃ to the load 3, Limit the output of power supply 1.

FIG. 2 shows an operation time chart of the circuit of FIG. 1. The pulse width of the current detection signal f ₀ is normally T ₀
When this exceeds the pulse time width T ₁ created by the timer circuit 4, the timer circuit outputs an abnormality detection signal f ₁ , and this signal f ₁ causes the gate circuit 5 to output during the time width T ₃ . The current of the load ₃ is limited by setting the current limit signal f3 to a low level. Due to this limitation, the output current signal f ₀ becomes a low level and the abnormality detection signal f ₁ returns to the normal level, so the output current limiting procedure time width T ₄ of the abnormality detection signal f ₁ during that time is the delay caused by the gate element. Depends only on time.

Furthermore, if an abnormality occurs in which the load cannot be controlled by the output current limit signal _f3 , and the output current signal _f0 exceeds the pulse time width _T2 generated by the timer circuit 4, the timer circuit 4 outputs a power supply stop signal f ₂ , and in response to this, the gate circuit 5 stops the power supply 1 in response to a power supply stop signal f ₄ .

Next, one embodiment of the present invention will be described. Figure 3 shows
Pulse time width T ₂ of output current signal f ₀ in Fig. 2
FIG. 3 is a diagram illustrating an example in which the power supply 1 is stopped upon detection of the power supply. The power converted by the power transformer 7 is stabilized by a power control element 8 controlled by a power control circuit 6, and is supplied to the load 3.

The voltage across the current detection element formed by the resistor 9 is detected and amplified by general-purpose operational amplifiers 14 and 17, and becomes an output current signal f ₀ to be sent to a timer circuit 18 in the next stage, such as a timer manufactured by Signetakes.
Input to ICNE555. The capacitor 23 is charged with a time constant determined by its capacitance and resistance value. When the voltage across the capacitor 23 reaches the threshold voltage of the comparator built in the timer circuit 18, _f2 of the timer circuit 18 goes low. When an abnormal pulse time width is detected in this way, the abnormality detection signal f ₂ becomes a low level as shown in FIG. As a result, the output control terminal of the power supply control circuit 6 becomes low level, and the output of the power supply is stopped.

In the current detection circuit, the output voltage of the power supply supplied to the load 3 itself becomes the common-mode input voltage of the amplifier 14 and is removed, and does not appear at the output of the amplifier 17. Also, amplifier 1 is installed in the current detection circuit.
By using resistors 4 and 17, there is an advantage that power loss due to resistor 9 can be reduced. Furthermore, since current detection can be performed at one location on the power supply side, the number of elements is extremely small compared to detection on the load side.

FIG. 4 shows another embodiment of the present invention, which is a companion to the embodiment shown in FIG. 3 above. This embodiment is an example of limiting the recording current, and is used together with the example of stopping the recording current shown in FIG.

When the thermal recording head is used as a load, the method of stopping the power supply as in the above embodiment has the disadvantage that no recording is made and the recorded contents are completely unknown. For this reason, this embodiment is a method that reduces the burden on the power supply by limiting recording without stopping recording, and also allows confirmation of recorded contents.

Signal f ₀ obtained by the current detection circuit of FIG.
is input to the timer circuit 32 in FIG. 4, which outputs an abnormality detection signal _f1 . The circuit configuration up to this point is
This is similar to the embodiment shown in FIG. The next stage timer circuit 38 is triggered by the fall of the abnormality detection signal f ₁ and outputs an output current limit signal f ₃ having a pulse of a constant time width, such as a monostable multivibrator.

The recording current flowing through the thermal recording head 43 of the load 3 is selected by the group selection circuit 42 and the individual selection circuit 44 and distributed in parallel. Therefore, if the group selection signal f ₅ that drives the group selection circuit 42 and the output current limit signal f ₃ that is the output of the timer circuit 38 are sampled by the gate circuit 41 using, for example, an AND gate, the recording current becomes Output current limit time
Restricted for T ₃ . Therefore, the pulse time width T ₄ of the abnormality detection signal f ₁ shown in FIG. 2 is determined mainly by the delay time caused by the electronic logic element from the occurrence of the abnormality to the recording current limitation.

However, if an abnormality in the output current occurs in the selection circuits 42, 44,
Alternatively, if the selection signal _f5 is used, the recording current cannot be controlled by the gate circuit 41, and the output current is not limited as shown in the pulse time width _T2 portion of the time chart of FIG. If such a serious abnormality occurs, by using the embodiment shown in FIG. 3 in combination, the power supply can be forcibly stopped and damage to the power supply can be prevented. Further, the recording current can be limited in the individual selection circuit 44 in the same manner as in the group selection circuit.

Next, FIG. 5 shows another embodiment. The same parts as in FIG. 3 are indicated by the same reference numerals. A feature of this circuit is that the timer circuit from the current detection signal f ₀ to the abnormality detection signals f ₁ and f ₂ is greatly simplified.

The current detection signal f ₀ is voltage-divided by a resistor 47 and a resistor 48 and applied to a capacitor 49, and is charged with a time constant determined by the resistor 47 and the capacitor 49.

This voltage is when the current detection signal f ₀ is at low level.
It is discharged through the backflow prevention element 46. Therefore, a voltage corresponding to this forward voltage drop remains in the gate voltage V _G , but this can be eliminated by adjusting the zero level of the current detection signal f ₀ in the current detection circuit.

Here, when the output current signal f ₀ with voltage amplitude V _{1 and} pulse time width T ₁ is applied to the timer circuit with resistance values R ₄₈ and R ₄₇ and capacitor capacity C ₄₉ , the gate voltage V _G is as follows. It appears as follows.

Also, according to this circuit, not only the current pulse width but also the current amplitude is limited, so it has both the current limiting type protection method and the pulse width limiting method which is a feature of the present invention, and has a simple circuit configuration. Become.

FIG. 6 is an operation time chart of the circuit shown in FIG. ₅ , in which the capacitor 49
can be repeatedly charged and discharged as shown by the gate voltage V _G. When this voltage reaches the threshold voltage V ₂ for turning on the transistor 53, the abnormality detection signal f ₁ becomes low level and is input to the timer circuit 38 shown in FIG. 4 to limit the output current.
In addition, if an abnormality occurs that makes it impossible to limit the current, the gate voltage V _G reaches the threshold voltage V ₃ of the trigger control element 29, and the trigger control element 2
9 is conductive, so the transistor 31 is conductive and outputs the power supply stop signal _f4 , thereby stopping the power supply. Further, the threshold voltage of the trigger control element 29 is increased by the voltage drop element 50. Thereby, the abnormal pulse time width can be changed.

According to the present invention, the abnormality time is monitored before the second stage, and the current is limited in case of a slight abnormality (T≧T ₁ ), and the current is stopped in case of a severe abnormality (T≧T ₂ ). I was able to do that. Furthermore, current detection has the advantage that it only needs to be detected at one location on the power supply side.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the basic configuration of the present invention, FIG. 2 is an operation time chart of the circuit in FIG. 1, FIG. 3 is a diagram showing an embodiment of the present invention, and FIG. 4 is a thermal recording head. Fig. 5 is a diagram showing an embodiment in which the embodiment shown in Fig. 3 is simplified, and Fig. 6 is an operation time chart of the circuit shown in Fig. 5. . 1...Power supply, 2...Current detection circuit, 3...Load, 4...
Timer circuit, 5...gate circuit, _f1 , _f2 ...abnormality detection signal, _f3 ...output current limit signal, _f4 ...power stop signal.

Claims (1)

[Claims] 1. A power supply means that repeatedly generates a pulsed current;
The pulsed current is provided to the thermal recording head, which is distributed in parallel to each selected thermal recording element under group selection or individual selection of the thermal recording elements, and detects the pulsed current that is the output of the power supply means. whether the continuous duration time of the pulsed current detected by this detection circuit is within the current limit reference time _T1 ;
A timer means for determining whether or not the current stop reference time T ₂ (T ₂ > T ₁ ) is reached, and a value of the pulsed current to the heat-sensitive head when the continuous duration time T is determined to be T≧T ₁ . control means for restricting the current for a predetermined period of time and, when determining that T≧T ₁ , controlling the power supply means to prohibit the provision of pulsed current to the heat-sensitive head;
A power protection device consisting of: