JPS6339076B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention enables each rotary switch or volume setting device for setting musical tone parameters such as timbre and effects to be operated by both a manual operator and a drive source such as a motor. based on preset data read from memory.
The present invention relates to an improvement in a preset device for an electronic musical instrument, which is capable of automatically setting each of the above setters to the contents of preset data.

A setting device such as a rotary switch or volume for setting musical sound parameters such as timbre and effects is configured to be operable by both a manual operator and a drive source such as a motor, and the presets read from memory are The drive source is operated based on the data, and each setting device is automatically set to the content indicated by the preset data, and at the same time, each setting device can be arbitrarily set to the desired content using a manual operator. Presetting devices for electronic musical instruments have been known for some time.

According to this type of preset device, the settings of each setting device required during a performance are stored in the memory in advance and read out at the necessary time during the performance, so that each setting device can be set with one touch. The desired capacity can be set at the same time, making the setting operation much easier compared to manually setting each setting device individually, and each setting device can also be operated using a manual operator. Therefore, corrections and changes after automatic settings can be easily performed, and the automatically set settings of each setting device can be directly read by the operating position of the manual operator without the need for a special display means. It has various advantages such as:

However, with such conventional devices, the musical tone was always controlled by the output data of the setting device itself, regardless of whether the settings were being changed or after the settings had been completed. When changing settings based on data, if the setting device is not moved instantaneously in response, an unintended musical sound will be generated. I need.

Such a large-capacity drive source is generally large, expensive, and generates a lot of noise. Furthermore, it is quite difficult to move each setting device instantaneously and to position it accurately.

This invention was devised in view of the above-mentioned problem, and its purpose is to immediately set the tone generation mode in the tone generation section to correspond to the content of the data at the same time as preset data is called from the memory. In both cases, the manner in which musical sounds are generated can be modified or changed arbitrarily by operating the manual controls, and in addition, a large driving force is not required when setting each setting device automatically. It is an object of the present invention to provide a presetting device which does not generate noise or the like.

In order to achieve the above object, the present invention drives each setter via a drive source such as a motor using preset data read from a memory, and at the same time converts the preset data into a musical tone. The present invention is characterized in that the preset data is instantaneously supplied to the tone generating section and the tone generating section is directly controlled by the preset data only for a predetermined period of time required for each setter to complete the setting.

Hereinafter, a preferred embodiment of the present invention will be described in detail based on the accompanying drawings.

Fig. 1 is a block diagram showing the electrical configuration of a preset device according to the present invention, Fig. 2 is a front view showing the operating section of the device, and Fig. 3 is a block diagram showing details of each setting unit of the device. , FIG. 4 is a timing chart showing the status of each timing signal.

The preset device shown in this embodiment has 64 parameter setting units U1 to U1 for setting various parameters such as the timbre or effect of musical sounds.
U64 is provided.

Each of these units Ui (i=1, 2...64) is driven by a force applied to a manual lever LVi or a force applied from a motor Mi via a clutch CRi, as shown in FIG. A setter SSi (rotary switch in this example), an encoder ECi that encodes and outputs the output of this setter SSi, and a state STi (described later) assigned to the setting unit Ui that opens and encodes the encoder ECi. Gate circuit Gi that passes the output
is provided.

Clutch CRi and motor Mi are then loaded into register RGi in state STi.
It is controlled by the CH, (A<B)i, and (A>B)i signals.

That is, the clutch CRi is released when the signal CH is "1" and is connected when the signal CH is "0", and the motor Mi is activated when the signal (A<B)i is "1".
So, when A>B is "0", the manual lever
It is rotationally driven in the direction of raising LVi, and when the signal (A>B) i is "0" and A>B is "1", it is rotationally driven in the direction of lowering the manual lever Vi. It turns out.

In addition, in this embodiment device, each of the setting devices
In order to memorize 16 types (presets) of SSi (i = 1, 2, 3...64) setting contents, 16
These memory channels CH1 to CH16 are designated by channel designation switches SC1 to CS16, and each setter SSi is connected to each memory channel.
A write switch WS is used to store the setting contents of (i=1, 2, 3...64).

The operation buttons CB1 to CB16 and WB of each of these switches CS1 to CS16 and WS are arranged on an operation panel P attached to the front of the main body of the electronic musical instrument, for example, as shown in FIG. A display DPY for displaying channel numbers is arranged above, as will be described later.

In addition, this embodiment device has the following features as shown in FIG.
Two systems of clocks φ, φ with a phase difference of 180 degrees and 64 systems of timing signals TLi (i=1,
2...64), and these signals are formed by an inverter 1, a counter 2, and a decoder 3, as shown in FIG.

Next, the configuration of this circuit will be explained in order along with its operation.

Now suppose that each setter SSi (i = 1, 2...64) is in a fixed setting state, and the settings of a series of these setters SSi are to be stored in an arbitrary memory channel CH _N. do.

In this case, write operation button WB shown in Figure 2
While keeping pressed, press the operation button CB _N corresponding to the desired memory channel CH _N.
Then, due to the output “1” of the write switch WS,
AND gate 4 becomes "open" and the output is "1" of channel designation switch C _N.
The output of gate 5 also becomes “1”, and this output “1”
is supplied to the W/ R terminal of RAM6 via AND gate 4, thereby setting RAM6 to write mode.

In addition, each channel designation switch CS1 to CS1
The output of 6 is sent to register 8 via OR gate 7.
Since it is supplied to the LD terminal, when the output of the channel designation switch _CSN becomes "1", this output "1" is loaded into the register 8.

The output of this register 8 is the output of RAM 6.
The signal is supplied to the MSB terminal, thereby specifying a series of address areas corresponding to the channel CH _N in the RAM 6.

Also, since the count output CTi of counter 2 is supplied to the LSB terminal of RAM6, a series of addresses in the specified address area are scanned in order from the first address in synchronization with clock φ in RAM6. .

On the other hand, the IN terminal of RAM6 has the first
~Time division multiplexed signal TDM1 with 64th state
is supplied, and its 1st to 64th states contain data indicating the setting contents of each setting device SS1 to SS64.
SD1 to SD64 are included respectively.

Therefore, the specified channel CH _N of RAM6
Each setter has a set of address areas corresponding to
Data SD1 to show the settings of SS1 to SS64
SD64 will be stored in order from the first address.

During the write operation to the RAM 6 described above, the comparator 9 compares the time division multiplexed signal TDM1 outputted from each setter SSi and the time division multiplexed signal TDM2 outputted from the OUT terminal of the RAM 6 so that they are in the same state. During this write operation, both signals TDM1 and TDM
The data contents in each state of 2 are the same.

Therefore, during the write operation, the outputs of the A<B and A>B terminals of the comparator 9 are "0", and the output of the A=B terminal is "1".

When the A=B output of the comparator 9 is "1", the AND gate 10 is inhibited by the output "0" of the inverter 11, so the S input terminal of the RS flip-flop (hereinafter referred to as RSFF) 12 is always connected. It becomes “0” state.

Furthermore, since the AND date 13 is "open" only in the first state shown in FIG. 4 and allows the clock φ to pass through, the R input terminal of the RSFF12 is connected to 1/2 of the first state from the start of the first state. A pulse that becomes "1" is input only during the period up to this point.

Therefore, in response to the rise of this pulse, the RSFF 12 is held in the reset state after the arrival of the first state, and the Q output becomes "0" and the Q output becomes "1".

Furthermore, since the AND gate 14 is "open" only in the 64th state shown in FIG. 4 and allows the clock φ to pass through, the T input terminal of the JK flip-flop (hereinafter referred to as JKFF) 15 is connected to the 1st flip-flop in the 64th state. /2
A pulse that becomes "1" is input only during the period from this point to the end of the 64th state.

Therefore, JKFF15 responds to the rising edge of this pulse at the end of the 64th state.
The Q and Q outputs of the RSFF 12 are read and output, and as a result, the Q output of the JKFF 15 is held at "0" and the Q output is held at "1" after the end of the 64th state.

The Q output of the JKFF 15 is supplied to the display DPY as an enable signal via an OR gate 16, and the output of the register 8 is supplied to the display DPY as display data DD.

Therefore, as mentioned above, when the A=B output of the comparator 9 becomes "1" in all states and the Q output of the JKFF 15 becomes "1", the display DPY shows the memory channel ( For example, the number of the 12th channel) is displayed as shown in FIG.

Each register Rg1 to constitute the register group 21
R64 has timing signals TL1 to TL, respectively.
64 is supplied, each register Rg1~
Data SD1 to SD64 indicating the setting contents of each of the setting devices SS1 to SS64 are loaded into Rg64. The outputs of the registers Rg1 to Rg64 are then supplied to the musical tone generator of the electronic musical instrument, thereby controlling the desired musical tone according to the settings of the setting devices SS1 to SS64.

During the write operation to the RAM 6 described above, the output of the AND gate 18 is inverted by the inverter 22 and then used as the clutch control signal CH to be sent to the registers in each setting unit U1 to U64.
The clutch control signal CH "1" is thereby loaded to each register RG1 to RG64.

Therefore, each of the clutches CR1 to CR64 is in a released state, and the setting contents of each of the setting devices SS1 to SS64 are not changed by the motors M1 to M64.

Next, a case will be described in which a state in which each of the setters SS1 to SS64 is set to an arbitrary content is changed to a predetermined preset content stored in a predetermined channel of the RAM 6 in advance.

As mentioned above, when the time division multiplex signal TDM1 output from each setter SS1 to SS64 and the time division multiplex signal TDM2 output from RAM6 match in all states, the Q output of JKFF15 is "0", The Q output becomes "1", the AND gate 18 becomes "closed", the RSFF 17 is reset, and its Q output becomes "0".

On the other hand, when both signals TDM1 and TDM2 do not match, even if the Q output of JKFF15 becomes "1", the Q output of RSFF17 remains reset, so its Q output remains "0". too
The AND gate 18 is similarly "closed".

Therefore, a new channel designation switch CS1
~CS16 is not turned on, the clutch CRi in each setting unit U1 to U64 is maintained in the released state, and the gate Gi is also "closed", so that each setter SS1 is in the musical tone generating section.
~Data from SS64 is continuously supplied.

Now, in this state, the desired memory channel
It is assumed that the channel designation switch CS _N corresponding to CH _N is pressed. Then, in the same manner as in the write operation described above, each address in the address area corresponding to the designated channel CH _N is designated in order from the first address. Also, since the output of the write switch WS is "0" at this time, RAM6
The state of the W/ R terminal becomes "0" and RAM6 is set to read mode.

Therefore, the preset data SD1' to SD64' stored in the channel CH _N are output from the RAM 6 as the time division multiplexed signal TDM2. This signal TDM2 is then compared in a comparator 9 with a signal TDM1 indicating the current setting contents.

At this time, the current setting data in signal TDM1
If SDi is smaller than the preset data SDi in signal TDM2, the output of the A<B terminal of the comparator 9 will be "1" in the state STi, and if it is larger, the output of the A>B terminal will be "1" in the state STi. STi becomes "1", and if they are equal, the output of the A=B terminal becomes "1" in the state STi. The outputs of the terminals A<B and A>B in each state STi are sequentially loaded into each register RGi in the setting unit Ui.

Also, in any of the 1st to 64th states STi, the current setting data SDi and preset data
If there is a mismatch with SDi', RSFF12 is always set in the mismatched state STi,
In response to this, at the end of that scanning cycle, JKFF1
The Q output of 5 becomes "1". Furthermore, when any channel designation switch CS _N is turned on, the Q of RSFF17 is changed by the output of OR gate 7 at that moment.
The output becomes "1".

Therefore, after the channel designation operation button CB _N is pressed in this way, each setting device SS1 to SS6 is pressed.
The output of the AND gate 18 remains at "1" until the state corresponding to each preset data SDi' read from the RAM 6 is completely set.
After this "1" output is inverted to "0" by the inverter 22, it is supplied as a clutch control signal CH to the register RGi in each setting unit Ui, and is loaded at a predetermined timing.

Therefore, in each setting unit Ui, the clutch CRi is connected in response to the clutch control signal CH "0", and the gate Gi' is "open" so that the signal (A<
B)i, (A>B)i are respectively supplied to the motor Mi, and thus each setting device SSi receives the current setting data.
It is driven in the direction of correcting the deviation between SDi and preset data SDi'.

On the other hand, when the write switch WS is off and only the channel switches CS1 to CS16 are on, the output "1" of the inverter 26 causes
The AND gate 25 is in the "open" state, and therefore, when the output of any of the channel switches CS1 to CS16 changes from "0" to "1", in response to the rising edge, the differential circuit 24 outputs a very small width " A 1" pulse is output, and the timer circuit 19 (eg, monomulti) is triggered by this "1" pulse.

The timer circuit 19 is configured to output a "1" pulse with a fixed time width T in response to a "1" pulse, and the value of this fixed time T is determined when the setting operation by the motor is completed within each setting unit. This is set slightly longer than the maximum time required.

Therefore, at the same time that the operation button CB _N for specifying any channel is pressed, the B terminal is selected in the selector 20, and the time division multiplexed signal supplied to the register group 21 is set according to the current setting of each setting device. Showing the preset contents from TDM1 showing the contents
It will instantly switch to TDM2.

Therefore, after reading a desired memory channel from RAM 6, it takes a relatively long time (for example, 100 milliseconds) until each setter SS1 to SS64 is completely set to the read preset contents.
Even if the preset data SD1', SD2', etc. are supplied to the musical tone generator from the RAM 6 at the same time as the memory channel is read, the preset data SD1', SD2', etc. can be supplied to the musical tone generating section at any time during the performance. You can quickly and automatically set effects, tones, etc.

On the other hand, when each setter SS1 to SS64 is completely set to the preset contents read from RAM6, the A>B output and A<B output of the comparator 9 become "0" in all states, and conversely, the A>B output and A<B output become "0" in all states. =
The B output becomes "1" in all states.

As a result, at the end of the 64th state,
The Q output of JKFF15 changes from “0” to “1”,
In response to the rise of this signal, RSFF 17 is reset.

Therefore, the AND gate 18 receives the Q output "0" from the RSFF 17 and is kept in the inhibited state, and this inhibited state continues until any channel designation switch CS is pressed again.

On the other hand, when time T elapses and a time-up operation is performed in the timer circuit 19, the selector 20
The output "1" of the inverter 23 is supplied to the SA terminal of the inverter 23, and the A terminal is selected in the selector 20.

Therefore, when each setter SS1 to SS64 is completely set to the new setting contents, the signal supplied to the tone generator is TDM2 output from RAM6.
Output from each setting device SS1 to SS64
Thereafter, the tone generator is controlled by the signal TDM1 from each of the setting devices SS1 to SS64.

On the other hand, the display DPY is enabled by the output "1" of the AND gate 18 until the setting is completed, and after the setting is completed, it is enabled by the Q output "1" of the JKFF15. Ru.

Therefore, the designated memory channel number will continue to be displayed on the display DPY regardless of whether the settings are completed or not.

Next, a case will be described in which the setting state is changed or corrected by operating the manual lever LVi after the above-mentioned automatic setting is completed.

When the manual lever LVi is operated and the data SDi indicating the setting state of the setting device SSi corresponding to the manual lever LVi does not match the preset data SDi' of the setting device SSi output from the RAM 6, the comparator 9 The A=B output of is the corresponding setting device.
It becomes “0” in the state STi corresponding to SSi, and after the above-mentioned process, the Q output of JKFF15 becomes the 64th
It becomes "0" after the end of the state.

As a result, the value of the enable signal supplied to the display DPY becomes "0" and the display DPY turns off.
It is possible to visually display that the setting contents are different from the preset contents read out from the RAM 6.

In addition, when the contents of any of the setting devices SSi are changed or modified by operating the manual lever LVi as described above, the changed or modified setting data is sent to the musical tone generator via the A terminal of the selector 20. will be supplied.

Thus, according to the preset device according to this embodiment, after operating the manual levers LV1 to LV64 to set the respective setters SS1 to SS64 to desired contents, the writing operation button WB and the corresponding memory channel are pressed. When the operation button CB _N is pressed, the specified channel number is displayed on the display DPY, and the address area corresponding to the channel in RAM 6 is filled with each setting device SS1 to SS64 in order from the first address. Data SD1 to SD64 indicating the setting contents will be stored, that is, desired data can be written into RAM6 using ordinary manual levers LV1 to LV64 without using any special dedicated controls. .

Also, after the above write operation, if you press the operation button CB _N corresponding to the desired memory channel,
Each preset data SD output from RAM6
Each motor M1 to M64 corresponds to 1' to SD64'.
This causes each setter SS1 to SS64 to set each preset data SD within, for example, 100 milliseconds.
It is automatically set to the contents shown in 1' to SD64',
On the other hand, during the fixed time required for each setter SS1 to SS64 to complete the setting from the time when CB _N of the operation button is pressed, each setter SS
Setting data from 1 to SS64 Preset data read from RAM6 instead of SD1 to SD64
SD1' to SD64' will be supplied.

In this way, in the device of this embodiment, from the time the preset data is read out from the memory,
At least in each setting device SS1 to SS64, the motor M1 to M64 extends from one end of the movable range of the operator to the other.
The time required for each operator to be driven is measured by a timer circuit 19, and this timer circuit 19
The musical tone is controlled based on the preset data until the timer circuit 19 times up, and after the timer circuit 19 times up, the musical tone is controlled based on the output of each setting device SS1 to SS64.
Even if the time required to complete the settings of SS1 to SS64 is somewhat long, it will not interfere with musical tone generation.

Therefore, compared to conventional models that required instantaneous setting completion, the driving force is reduced by that amount, making it possible to downsize the drive source, reduce noise, simplify control, and reduce costs. Become.

In addition, instead of confirming that the setting devices SS1 to SS64 actually complete the setting, the timer circuit 19 measures the time required to complete the setting, and switches as the time elapses, so it is not necessary to actually confirm the completion of the setting. The circuit configuration can be significantly simplified compared to the case where

In addition, once the automatic setting is completed,
Setting data SD1~ from each setting device SS1~SS64
Since the musical tone generation section is directly controlled by the SD64, if the settings of the setting devices SS1 to SS64 are changed or corrected by operating the manual levers LV1 to LV64, the musical tone will be generated according to the corrected setting data. The generator is controlled, that is, even after the automatic setting is completed, any settings can be changed or corrected using the manual lever.

On the other hand, when the operation button CB _N corresponding to any channel is pressed, the designated channel number will be displayed on the display DPY, and this display can be changed by operating manual levers LV1 to LV64. If you change or modify the settings on the setting device SSi, the light will turn off.

Therefore, based on this display, the operator can confirm whether the current setting contents of the setting devices SS1 to SS64 are automatically set or manually set.

As is clear from the above description, according to the present invention, from the time when preset data is read out from the memory, the driving means moves the operator from one end of the movable range of the operator to the other at least in each setting device. The time required for driving is measured by a timer, and the musical tone is controlled based on the preset data until the time is up, and after the time is up, the musical tone is controlled based on the output of each setting device. Even if the time required to complete the settings is a little longer, there will be no problem in generating musical tones.

Therefore, compared to conventional models that require instant setup completion, the driving force is reduced accordingly, making it possible to downsize the drive source, reduce noise, simplify control, and reduce costs. becomes.

In addition, since the setting device does not directly confirm that the setting is completed, but indirectly confirms it through the timer time, there is an advantage that the circuit configuration can be simple.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the electrical configuration of a preset device according to the present invention, Fig. 2 is a front view showing the operating section of the device, and Fig. 3 is a block diagram showing details of each setting unit of the device. , FIG. 4 is a timing chart showing the status of each timing signal. SSi...Setting device, Mi...Motor, LVi...Manual lever, DPY...Display, 6...RAM, 19...
...Timer circuit, 20...Selector.

Claims (1)

[Claims] 1. Each setting device for setting musical tone parameters such as timbre and effects can be driven by both a manual operator and a drive source such as a motor, and the setting contents of each setting device are stored in memory. In the electronic musical instrument, data indicating the data is stored, and each drive source is operated based on the data read from the memory to automatically set each setting device to the content indicated by the data, wherein the data is read out. a timer means for measuring the time required for the operating element to be driven by the driving means from one end to the other of the movable range of the operating element in at least each setting device; A presetting device for an electronic musical instrument, comprising: control switching means for controlling musical tones based on data, and controlling musical tones based on outputs of each of the setting devices after time-up of the timer means.