JPS6339101B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention is an IC that exhibits diode characteristics between terminals.
The present invention relates to a method and apparatus for detecting contact failure between a chip and a circuit pattern connected thereto.

As is well known, IC elements are used after electrical contact is made between the pads of the IC chip and the circuit pattern, and sealing is performed. At this time, the contacts may become defective as shown in FIGS. 3a to 3e.

Conventionally, before sealing work, a worker used a microscope to observe the contact status between the circuit pattern on the circuit board or film and each terminal of the IC chip.
I was checking to see if there were any defects in the drawings. This method takes time and does not have a good defect detection rate. Furthermore, after sealing, all contact parts are covered with resin, etc., making visual inspection impossible.

Furthermore, as described in Japanese Patent Application Laid-open No. 50-107864, the stage of the bonding device and the capillary are connected so as to serve as input terminals of the leakage current detector, and the quality of the results is verified immediately after the bonding is completed. There is a method, but this method can only detect the quality of each connected electrode, and
This method has the disadvantage that it cannot detect complex contact failures such as leaks between chip terminals.

The present invention utilizes the characteristics of an IC element such as a CMOS-LSI that exhibits diode characteristics inside an IC chip to prevent contact failures between terminals and circuit patterns and contact failures between adjacent terminals. An object of the present invention is to provide a method and apparatus for detecting.

Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic diagram of an embodiment using a contact failure detection method using the present invention. 1 is
An IC chip, 2 is a wire bonded between the IC chip and a circuit pattern, 3 and 4 are circuit patterns, and the above 1 to 4 are mounted on a substrate 5, and these constitute an IC element. IC probe head placed opposite this IC element (not shown)
In this case, the plurality of probes correspond to the circuit patterns one-to-one, and come into contact with and leave the corresponding circuit patterns all at once.During contact, that is, during contact failure detection work, 1
As shown, each circuit pattern 3, 4 is connected to a switching device 6. 7 is a constant current source, and its two output terminals are connected to the switching device 6. The switching device 6 includes the constant current source 7
and each circuit pattern 3, 4 is selectively switched in sequence, and one IC chip terminal 3 exhibiting diode characteristics is arbitrarily selected between the A side output terminal of the constant current source 7 and other IC chip terminals 4. and connect to other
The IC chip terminal 4 is connected to a constant voltage Vdd, here the E side output terminal which is grounded, and this selection is sequentially switched.
8 is a window comparator, its measurement input terminal i is connected to the A side output terminal of the constant current source 7, and the low voltage judgment input terminal l is connected to one output terminal of the low voltage reference power supply _VL , and the high voltage judgment input terminal The terminals h are each connected to one output terminal of a high voltage reference power source _VH , and the output terminals on _the other side of each of the reference power supplies VL _{and VH} are grounded. The output of the window comparator 8 is sent to a display device 9 and also to one input terminal of an AND gate 11 through an inverter 10.

The timing of selection switching of the switching device 6 is regulated by the clock signal C. That is,
The clock signal C is input to the control terminal of the switching device 6, and the switching device 6 is selectively switched for each clock signal in a preset order and combination. The clock signal C is also input to a counter 12 and an AND gate 11, the output of the counter 12 is sent to a display device 9 and used to indicate which measurement step is being taken, and the output of the AND gate 11 is Used for abnormal shutdown of detection equipment.

The operation of the embodiment shown in FIG. 1 will be explained below.

A minute current IC, which does not destroy the diode inside the IC chip, is applied from the constant current source 7 to the selected one circuit pattern 3. At this time, circuit patterns 4 other than this one circuit pattern are at a constant voltage Vdd (usually 0V) as described above, whereas A
From the diode characteristics inside the IC chip shown in FIG. 2, the dot indicates a certain diode forward voltage V _F if the wires of the selected circuit pattern 3 are wire-bonded normally. The reference voltages of the reference power supplies V _L and V _H mentioned above are based on the diode characteristics seen from the terminals in the IC chip to be measured and the constant current source 7.
Considering the current value and maximum voltage value, the second
Set in advance as V _L and V _H in the figure. Therefore, when the diode forward voltage V _F is input to the window comparator 8, the display device 9 displays normality.

However, if the wire of the selected circuit pattern 3 is disconnected as shown in Figure 3a, the current will be
Since the voltage does not flow into the IC chip, point A indicates the maximum voltage value of the constant current source 7.

In addition, if the wire of the pattern of interest is shot to the substrate or the adjacent wire as shown in Figure 3 b to e, it will flow to Vdd before flowing into the diode inside the IC chip, and the IC shown in Figure 2 The diode forward voltage V _F shown in the diode characteristics inside the chip does not occur. Therefore, in the case of such a contact failure, the voltage at point A is
The voltage becomes higher than V _H or lower than V _L in FIG. A measurement stop signal is output.

In the embodiments described above, the switching device 6 may be an electronic switching device such as a multiplexer or a group of mechanical relay switches. Instead of applying a constant potential Vdd to all but one selected circuit pattern, the switch selection is made between adjacent circuit patterns that are particularly susceptible to substrate and shorting, and furthermore, this adjacent circuit pattern is connected to the selected one circuit pattern. If there is no diode characteristic between them, the third auxiliary circuit pattern may be selected and set to Vdd. Furthermore, in the above embodiment,
Although the detection of contact failures in wire-bonded IC chips has been described, the present invention can also be implemented in detection of contact failures in IC chips using other contact means.

As described above, according to the present invention, appropriate reference voltages V _L and V _H are set based on the diode characteristics inside the IC chip, and a voltage is set between one circuit pattern and another circuit pattern that are sequentially selected. Apply current to the IC
By inspecting the number of wire bonds between the pads of the chip and the circuit patterns, it is possible to detect all wire bonding defects between the IC chip and the circuit patterns, as well as wire bonding defects between adjacent terminals. With a high defect detection rate, it can reduce the burden on the operator and also detect contact defects after sealing.
Moreover, contact failure can be detected in a short time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a defect detection device for wire bonding of an IC element according to the present invention, FIG. 2 is a graph showing diode characteristics inside an IC chip, and FIGS. FIG. 2 is an enlarged view of a main part showing an example of a wire bonding failure of an element. 1...IC chip, 2...wire bonded between IC chip and circuit pattern, 3...
A selected circuit pattern, 4... Circuit pattern, 5... Board having the circuit pattern, 6... Switching device, 7... Constant current source, 8... Window comparator, 9... Display device, 10
...Inverter gate, 11...And gate,
12...Counter.

Claims (1)

[Claims] 1 An IC probe head that contacts each of a plurality of terminals of an IC chip whose terminals exhibit diode characteristics with a circuit pattern corresponding to the plurality of terminals, a constant current source, and an output terminal of the constant current source that contacts the probe head. a switching device selectively connected to each of the probes; a window comparator for measuring the voltage between the output terminals of the constant current source; and a diode forward direction input connected to the window comparator and generated by the constant current source. a low-voltage reference power source that supplies the window comparator with a lower limit voltage value that is set lower than the voltage value and higher than the ground level; and a high voltage reference power source that supplies the window comparator with an upper limit voltage value set lower than the maximum voltage value of the source, and the switching device connects one output terminal of the constant current source to any one of the probe head. 1. A contact failure detection device for an IC element, characterized in that the device is configured to selectively switch adjacent to a probe.