JPS634153B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for displaying a detection signal on an XY display screen in an underwater detection device that detects in a wide range of directions.

As an underwater detection device that detects a wide range of directions, a device has been proposed in which transducers with different pointing directions are arranged in a wide range of directions, and the reflected waves returning from each direction are extracted and displayed in chronological order at high speed. .

In this case, a cathode ray tube display device is used as the display device. When displaying the detection signal, the electron beam of the cathode ray tube is swept in a spiral pattern in synchronization with the above-described time-series operation. In the case of a spiral sweep, the size of each pixel differs depending on the sweep position. Therefore, it is extremely inconvenient when performing various image processing on the display screen.

For example, when displaying letters, numbers, etc. representing the depth, distance, etc. of a detection signal on a display screen, the letters, numbers, etc. are often displayed distorted because the pixel size differs for each sweep position. Also, in the case of spiral sweep, the displayed characters, numbers, etc. are always
Since the display faces toward the center of the sweep, it is very inconvenient to read characters, numbers, etc.

This invention allows the screen to be displayed in a spiral pattern.
Provided is a device that facilitates various image processing by converting and displaying the image on an XY orthogonal coordinate display screen.

This will be explained below with reference to the embodiments shown in the drawings.

In FIG. 1, reference numeral 1 denotes a wave transmitting/receiving section, which is composed of a large number of wave transmitting/receiving devices having different directivity directions arranged, for example, in a circumferential manner.

In the wave transmitting/receiving unit 1, each of the wave transmitting/receiving devices is simultaneously excited by the transmitter 2 and transmits ultrasonic pulses in a wide range of directions. The reflected waves returning from each direction are received by transducers oriented in the respective directions, and then sent to the time series circuit 3. The time series circuit 3 converts the reflected waves in each direction into a time series at high speed, and then sends the result to the AD converter 4. The AD converter 4 converts the analog levels of the reflected waves in each direction into digital values and sends them out. Then, the converted digital values are sent to storage circuits 51 to 54.

On the other hand, the transmitter 2 excites the wave transmitting/receiving section 1 and at the same time activates the clock pulse source 6 to send out a pulse train to the azimuth counter 7. The azimuth counter 7 counts the pulse train and causes the time series circuit 3 to send out a reflected wave in the azimuth corresponding to the counted value. moreover,
The azimuth counter 7 sends out an output pulse every time it counts a number according to the direction in which the transducers are arranged, and repeats the counting. The output pulses of the azimuth counter 7 are sent to a distance counter 8 and counted.

Count value θ of direction counter 7 and distance counter 8
The count value γ is guided to the storage circuits 51 to 54 via the switching devices 91 to 94. Switches 91 to 94
The count values θ and γ respectively sent from are used for addressing the memory circuits 51 to 54,
The time series signal of the time series circuit 3 and the count values θ and γ are stored in corresponding memory elements.

The storage circuits 51 to 54 store only time-series signals corresponding to predetermined address designation values among the address designation values designated by the azimuth counter 7 and the distance counter 8. That is, as shown in FIG. 2, when the detection area is divided into four along the XY axes, the storage circuit 51 stores the detection signal in response to the address designation value within the area. Note that the wave transmitting/receiving unit 1 is arranged at the intersection 0 of the XY axes. Furthermore, the storage circuit 52 stores detection signals corresponding to addressing values within the divided areas. Similarly, the storage circuits 53 and 54 respectively store the detection signals corresponding to the addressing values within the respective divided areas. Therefore, when the count value of the distance counter 8 reaches a certain value, the reflected waves within a predetermined distance are stored in each of the storage circuits 51 to 54, and then the distance counter 8 sends an output pulse to the clock pulse source 6. stop the operation.

After the detection signals in each direction are stored as described above, the stored contents are read out based on the polar coordinate address circuit 10. The polar coordinate address circuit 10 reads out the contents of each of the memory circuits 51 to 54 simultaneously and in parallel. And the memory circuit 51
The read storage contents are transferred to the storage circuit 111. Furthermore, the storage contents of the storage circuits 52, 53, and 54 are stored in the storage circuits 112, 113, and 114, respectively. The locations of the storage circuits 111 to 114 are specified by the XY coordinate address circuit 12.

The XY coordinate address circuit 12 converts the pulse train sent by the clock pulse source 121 into the X-axis counter 12.
Count at 2. The X-axis counter 122 is XY
This is to specify the position in the X-axis direction on the coordinates, and the position in the X-axis direction within the divided area shown in FIG. 2 is specified. The X-axis counter 122 sends out an output pulse every time a position in the X-axis direction within the divided area is specified. This output pulse is counted by the Y-axis counter 123, and the Y-axis counter 123 specifies the position in the Y-axis direction within the divided area. Then, when the Y-axis counter 123 counts up to a specific value, it sends out an output pulse and stops the operation of the clock pulse source 121. Therefore,
When the Y-axis counter 123 finishes counting, each point within the divided area is designated by each count value of the X-axis counter 122 and Y-axis counter 123. The address specification value within this divided area is determined by the switch 13.
1 and is sent to the storage circuit 111.

The XY coordinate address circuit 12 is an X-axis counter 1
22 and the Y-axis counter 123 to specify each position within the divided area, and at the same time specify other divided areas,
, also specify each position.

In Figure 2, any one point Q within the divided area
1 (x, y), and if a point Q2 symmetrical to the point Q1 with respect to the Y axis is taken as a divided area, the position of the point Q2 is expressed as (-x, y). Similarly, if a point Q3, which is symmetrical to Q2 with respect to the X-axis, is taken in the divided area, its position is expressed as (-x, -y). Furthermore, if a point Q4 symmetrical to point Q3 with respect to the Y axis is taken in the divided area, the position of Q4 is expressed as (x, -y). Therefore, when a position within a divided area is specified, each position of the other divided areas can be represented by appropriately inverting the sign of the designated value within the divided area.

Based on this, the inverted value of the X-axis counter 122 and the counted value of the Y-axis counter 123 are led to the storage circuit 112 via the switching circuit 132, and address designation within the divided area is performed. Then, the memory circuit 113 stores the inverted numerical value of the X-axis counter 122 and the Y-axis counter 123 through the switching circuit 133.
The inverted numerical value of is derived, and the position of the divided area is specified based on this. Further, the count value of the X-axis counter 122 and the inverted value of the Y-axis counter 123 are led to the storage circuit 114 via the switch 134, thereby specifying a position within the divided area.

While the position on the XY coordinates is specified as described above, the counts of the X-axis counter 122 and the Y-axis counter 123 are also sent to the converter 101 of the polar coordinate address circuit 10. The converter 101 stores in advance the position on the polar coordinates corresponding to the position on the XY coordinates of each position in the divided area,
When the position designation value is derived by the X-axis counter 122 and Y-axis counter 123, the corresponding position (γ, θ) on polar coordinates is sent out. converter 1
The converted position (γ, θ) of 01 is sent to the storage circuit 51 via the switch 91. Then, the storage contents of the storage element corresponding to the designated values (γ, θ) are read out. Further, the polar coordinate address circuit 10 specifies a polar coordinate position within a divided area, and at the same time designates a corresponding polar coordinate position within another divided area.

In Figure 2, if the position of an arbitrary point Q1 (x, y) on the XY coordinates in the divided area converted to polar coordinates is Q' ₁ (γ, θ), then the position Q in the divided area is
The transformation position of 2(-x, y) is Q' ₂ (γ, -θ+π)
It is expressed as Similarly, position Q3 within the divided area
The transformation position of (-x, -y) is Q′ ₂ (γ, θ+π),
Further, the transformed position of the position (x, -y) within the divided area is represented by Q' ₄ (γ, -θ+2π), respectively.

Therefore, each polar coordinate position of the divided area, , is displayed by appropriately inverting the sign of the displayed value θ of the transformed position Q ₁ '(γ, θ) in the divided area, and at the same time adding an appropriate constant to each of them. Is possible. The inversion circuit 102 inverts the sign of the converted value θ of the converter 101 and sends it to the addition circuit 103 . The addition circuit 103 adds a constant π sent from the constant circuit 105 to the inverted value -θ. Then, the added value (-θ+π) is sent to the storage circuit 5 along with the converted value γ of the converter 101 via the switch 92.
2 and read its memory contents. Further, the adder circuit 104 adds a constant 2π sent from the constant setting circuit 105 to the inverted value -θ, and the added value (-θ+2π) is used together with the converted value γ.
It is sent to the storage circuit 54 via the switch 94. Further, the addition circuit 106 adds the set value π of the constant setter 105 to the converted value θ of the converter 101, and then
The added value (θ+π) is sent to the storage circuit 53 via the switch 93.

As a result of the above, the polar coordinate address circuit 10 reads out in parallel the respective storage contents of the polar coordinate positions stored in the storage circuits 51 to 54, and then sends them to the corresponding storage circuits 111 to 114, respectively. Memory circuits 111 to 114 are XY coordinate address circuits 12
Since addressing is performed by , the read storage contents on the polar coordinates are converted to positions on the XY coordinates and stored.

The storage signals transferred to the storage circuits 111 to 114 are the count values x and y sent from the X-axis read counter 14 and the Y-axis read counter 15, which are guided to the respective storage circuits 111 to 114 via the switchers 131 to 134. When the count value x, y
The storage contents of the storage element corresponding to are read out. The read storage signal is converted into an analog signal in the DA conversion circuit 16 and then guided to the brightness terminal of the cathode ray tube display 17.

The cathode ray tube display 17 sweeps the electron beam in the XY-axis directions according to the deflection voltages of the X-axis deflection circuit 18 and the Y-axis deflection circuit 19. X-axis deflection circuit 18
deflects the electron beam to a position corresponding to the count value of the X-axis readout counter 14. Similarly, the Y-axis deflection circuit 19 deflects the electron beam to a position corresponding to the count value of the Y-axis read counter 15. Note that the X-axis read counter 14 counts the clock pulse train of the clock pulse source 20. and,
The X-axis readout counter 14 sends an output pulse to the Y-axis readout counter 15 every time the electron beam is swept one time in the X-axis direction. Therefore, the cathode ray tube 17
The electron beam corresponds to each count value of the X-axis readout counter 14 and the Y-axis readout counter 15.
Swept in the XY axis direction. Then, when the sweep for one screen of the cathode ray tube display 17 is performed, Y
Axis read counter 15 sends an output pulse to stop clock pulse source 20 from operating.

In the above, the storage operation of the storage circuits 51 to 54 and the transfer to the storage circuits 111 to 114, the display operation of the cathode ray tube display 17, etc. are performed based on the controller 21.

That is, the controller 21 first drives the transmitter 2, causes the wave transmitting/receiving section 1 to transmit and receive ultrasonic pulses, and stores the detection signals in the storage circuits 51 to 54.

Thereafter, the controller 21 drives the clock pulse source 22 of the XY coordinate address circuit 12. Therefore, data is transferred from the storage circuits 51 to 54 to the storage circuits 111 to 114 by the polar coordinate address circuit 10 and the XY coordinate address circuit 12.

Further, the controller 21 controls the clock pulse source 20.
The contents stored in the memory circuits 111 to 114 are displayed on the cathode ray tube display 17. Here, the controller 21 controls the transfer from the storage circuits 51 to 54 to the storage circuits 111 to 114 within the retrace time of the electron beam of the cathode ray tube display 17, and
A control operation is performed so that the ultrasonic pulse in the wave transmitting/receiving section 1 is within the idle time.

As described above, according to the present invention, addresses can be converted from XY coordinates to polar coordinates using a relatively small capacity storage circuit. or,
A memory circuit is provided separately for each divided area obtained by dividing polar coordinates or XY coordinates into four, and the memory contents of each memory circuit are transferred in parallel.
Coordinate transformation to XY coordinates is performed at extremely high speed.

[Brief explanation of the drawing]

FIG. 1 shows an embodiment of the present invention, and FIG. 2 shows a diagram for explaining the coordinate transformation thereof.

Claims (1)

[Claims] 1. Ultrasonic pulses are transmitted in a wide range of directions, the reflected waves returning from each direction are received by receivers oriented in the respective directions, and the received signals are displayed on an XY display screen. In the display position device for displaying, a first storage element that stores each of the returning reflected waves in a storage element corresponding to the returning azimuth distance.
a cathode ray tube display in which the electron beam is deflected in the XY axis directions; a second memory circuit having a memory element corresponding to each pixel on the XY coordinates of the cathode ray tube display; a readout circuit that reads out the memory contents of the second memory circuit in synchronization with the XY axis deflection operation and displays the readout on each corresponding pixel of the cathode ray tube display; and a readout circuit that aligns the center of the cathode ray tube display screen with the origin of the XY coordinates. a position conversion memory circuit that stores a pixel position of the first memory circuit that corresponds to a pixel in an arbitrary divided area among which the display screen is divided into four; a first transfer circuit that sequentially reads the memory contents of the memory elements of the memory circuit corresponding to the memory elements of the second memory circuit and transfers them to the second memory circuit; and a transfer operation of the first transfer circuit. Interlockingly, in the other four divided areas, a second memory element is read out separately from the memory element at the memory address in each area corresponding to the memory address of the read memory element, and is transferred to the second memory circuit. , a third and a fourth transfer circuit.