JPS6346871B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a loop calculation control method in a digital signal processing device.

Generally, a general-purpose digital signal processor (DSP)
Loop operations are often used to repeatedly perform the same arithmetic processing. In such a loop operation, normally one block of data stored in the RAM is sequentially read out each time one loop of operation processing is executed. FIG. 1 shows a general-purpose digital signal processing device using a conventional loop arithmetic control method. The general-purpose DSP 1 in Figure 1 includes:
Program ROM11, decoder 12, RAM1
3. Arithmetic device 14 and loop arithmetic control circuit 15
is provided. The loop calculation control circuit 15 is
Loop counter 151 and end detection circuit 152
has.

The manner in which loop operations are executed in the DSP 1 of FIG. 1 will be described below.

In the area of the program ROM 11 in which the loop calculation program is stored, data specifying the number of repetitions of the loop is stored at the beginning. The decoder 12 sequentially reads out the programs stored in the program ROM 11, and depending on the contents of the program, reads the data stored in the RAM 13 and causes the arithmetic unit to execute digital signal processing. If a loop operation is programmed, the decoder 12 supplies the loop operation control circuit 15 with the number of repetitions stored at the beginning of the program. Next, the decoder 12 sequentially reads data from the RAM 13 according to the programmed instructions and causes the arithmetic unit 14 to execute digital processing.

When the decoder 12 receives the loop end instruction from the program ROM 11, the decoder 12
A loop end signal is supplied to the loop calculation control circuit 15. In the loop arithmetic control circuit 15, a loop end signal from the decoder 12 is counted by a loop counter 151, and an end detection circuit 152 detects whether the counted number has reached the specified number of repetitions. If the count does not reach the specified number, program ROM11
In this case, the program returns to the beginning of the loop calculation program and is sequentially supplied to the decoder. Therefore, the decoder 12 executes the same program on new data in the RAM 13 until the loop end instruction is reached. In this way, the loop operation is repeatedly executed, and when the count number of the loop counter 151 reaches the specified number of times,
The program ROM 11 exits the loop and starts executing a new program.

In the loop calculation control in the DSP shown in FIG.
Therefore, when applying it to a small processor such as a microprocessor unit,
Another problem is that it is disadvantageous when the processor itself is made smaller.

The main object of the present invention is to make it possible to perform loop arithmetic control with a very small-scale circuit in a general-purpose digital signal processing device, thereby making it possible to perform loop calculation control in a general-purpose digital signal processing device. The object of the present invention is to provide a loop calculation control method that can be downsized.

In the present invention, in a loop calculation control method that switches between restarting and ending loop calculations in a digital signal processing device, a bit for loop control is added to each word of RAM that stores data used in the loop calculation. , a loop calculation control system is provided, characterized in that each time the loop calculation is completed, the loop control bit is determined to issue a command to restart or terminate the loop calculation.

A digital signal processing device (DSP) using a loop arithmetic control method as an embodiment of the present invention is shown in FIG. The DSP 2 in FIG. 2 is provided with a program ROM 21, a decoder 22, a RAM 23, an arithmetic unit 24, and a loop arithmetic control circuit 25. The loop calculation control circuit 25 includes a loop end detection flag circuit 251 and an AND circuit 25.
1.

In the DSP 2 shown in FIG. 2, as in the case of FIG. The data is supplied and predetermined arithmetic processing is executed in the arithmetic unit 24.

When executing a loop operation in the DSP2 shown in Figure 2, unlike the case in Figure 1, the program
There is no need to store data specifying the number of repetitions at the beginning of the loop program stored in the ROM 21. Data to be processed in the loop operation is stored in RAM 22 in advance. in this case,
One bit of data stored in RAM 22 is used as a loop control bit. When writing data to the RAM 22, "0" is first written to the loop control bit. Next, "1" is written to the loop control bit of the data used in the final loop operation.

The loop calculation program is in program ROM2.
1 to the decoder, the decoder 22
After clearing the output of the loop end detection flag circuit 251, the programmed instructions are sequentially executed. The loop control bits of the data read from the RAM 23 during the execution of this instruction are transmitted to the loop control circuit 25. In the loop control circuit 25, if at least one of the transmitted loop control bits is "1",
The output of the loop end detection flag circuit 251 is set to "1". When the loop operation is completed and a loop end command is provided to decoder 22, decoder 22 provides a loop end signal for loop control. This loop end signal and the output signal of the loop end detection flag circuit 251 are output to the AND circuit 2.
52.

Therefore, when the loop calculation is completed and the loop end detection flag is set, the AND circuit 252 outputs a signal of "1". When "1" is output from the AND circuit 252, it commands the end of the loop and the program
The ROM 21 supplies the next new program to the decoder. On the other hand, if the loop end detection flag is not set, the output of the AND circuit 252 is "0", and in this case, the program
The ROM 21 returns to the beginning of the loop and supplies the same loop program to the decoder again. In this way, in the DSP shown in Figure 2, RAM
The data written in 23 controls the termination or restart of the loop operation.

Flag circuit 251 for loop end detection in FIG.
can be realized, for example, by a simple flip-flop circuit as shown in FIG.

According to the present invention, in a general-purpose digital signal processing device, it is possible to perform loop calculation control with a very small-scale circuit, thereby making it possible to downsize the general-purpose digital signal processing device.

[Brief explanation of drawings]

Figure 1 shows a block circuit of a digital signal processing device using a conventional loop arithmetic control method.
The figure shows a block circuit of a digital signal processing device using a loop arithmetic control method as an embodiment of the present invention, and FIG. 3 shows a circuit showing one configuration example of a flag circuit for loop end detection in the circuit of FIG. It is a diagram. (Explanation of symbols), 1...Digital signal processing device, 11...Program ROM, 12...Decoder, 13...RAM, 14...Arithmetic unit, 15...
... Loop calculation control circuit, 151 ... Loop counter, 152 ... End detection circuit, 2 ... Digital signal processing device, 21 ... Program ROM, 22
... Decoder, 23 ... RAM, 24 ... Arithmetic device, 25 ... Loop calculation control circuit, 251 ... Flag circuit for loop end detection, 252 ... AND circuit, NA1, NA2, NA3 ... Nandogade,
IV...Inverter.

Claims (1)

[Claims] 1. In a loop operation control method that switches between restarting and terminating a loop operation in a digital signal processing device, a bit for loop control is added to each word of RAM that stores data used in the loop operation, and the loop operation is restarted and terminated. 1. A loop calculation control method, characterized in that the loop control bit is determined each time the loop calculation is completed, thereby instructing restart or termination of the loop calculation.