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JPS6347356B2 - - Google Patents
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JPS6347356B2 - - Google Patents

Info

Publication number
JPS6347356B2
JPS6347356B2 JP16693882A JP16693882A JPS6347356B2 JP S6347356 B2 JPS6347356 B2 JP S6347356B2 JP 16693882 A JP16693882 A JP 16693882A JP 16693882 A JP16693882 A JP 16693882A JP S6347356 B2 JPS6347356 B2 JP S6347356B2
Authority
JP
Japan
Prior art keywords
layer
active layer
inp
type
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP16693882A
Other languages
Japanese (ja)
Other versions
JPS5956783A (en
Inventor
Masaaki Ooshima
Katsuhiko Muto
Noryuki Hirayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57166938A priority Critical patent/JPS5956783A/en
Publication of JPS5956783A publication Critical patent/JPS5956783A/en
Publication of JPS6347356B2 publication Critical patent/JPS6347356B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、化合物半導体を用いた新規な横モー
ドの安定した、かつ低しきい値のレーザ素子に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a novel laser device that uses a compound semiconductor and has a stable transverse mode and a low threshold.

従来例の構成とその問題点 半導体レーザの基本モード化は、光フアイバー
通信における広帯域、長距離伝送や低歪アナログ
変調等を可能とするために不可欠のものである。
Conventional configurations and their problems Converting semiconductor lasers into fundamental modes is essential to enable broadband, long-distance transmission, low-distortion analog modulation, etc. in optical fiber communications.

そのための発振モードの制御は、最初、光の損
失とむだな再結合を最小にする特定領域に光エル
ギ及び注入電流をとじ込める、いわゆる電極スト
ライプレーザで実現された。その後、各種のスト
ライプレーザが開発され現在に至つているが、い
ずれも、それぞれの欠点を有し特性上不満足なも
のである。たとえば、電極ストライプレーザ等単
に電流分布のみ閉じ込めた場合にはレーザ光は主
として利得分布によりストライプ方向に導かれる
が、この利得による導波路作用は不安定であり、
電流を増加してゆくと容易に高次横モード発振を
起し更には電流−光出力特性が歪む場合も多い。
これは、これは、電極ストライプレーザが活性層
の横方向に対してキヤリア及び光を閉じ込める構
造となつていないためである。
Control of the oscillation mode for this purpose was first achieved with so-called electrode stripe lasers, which confine optical energy and injection current to specific regions to minimize optical loss and wasteful recombination. Since then, various striped lasers have been developed and are still available today, but all of them have their own drawbacks and are unsatisfactory in terms of characteristics. For example, when only the current distribution is confined, such as in an electrode stripe laser, the laser light is mainly guided in the stripe direction by the gain distribution, but the waveguide effect due to this gain is unstable.
When the current is increased, high-order transverse mode oscillation easily occurs, and furthermore, the current-optical output characteristics are often distorted.
This is because the electrode stripe laser does not have a structure that confines carriers and light in the lateral direction of the active layer.

そこで上記の欠点をおぎなう試みとして第1図
に示すような、埋め込みヘテロ構造が作られた。
以下に例としてInP/InGaAsP半導体を挙げ説明
する。第1図において1はn−InP基板、2はn
−InP第1クラツド層、3はInGaAsP活性層(例
えば1.3μm発光波長相当)、4はP−InP第2クラ
ツド層、5はInGaAsP(例えば1.05μ発光波長相
当)キヤツプ層である。このような4層構造エピ
タキシヤルウエーハを、ホトリソグラフイの手段
によつてマスクをとりつけ、化学エツチングによ
つて逆メサ状に不用部分をとりのぞき、第2のエ
ピタキシヤル成長によつて、P−InP埋込み層
6、n−InP埋め込み層7を形成する。
Therefore, in an attempt to overcome the above-mentioned drawbacks, a buried heterostructure as shown in FIG. 1 was created.
InP/InGaAsP semiconductors will be explained below as an example. In Figure 1, 1 is an n-InP substrate, 2 is an n-InP substrate, and 2 is an n-InP substrate.
-InP first cladding layer, 3 an InGaAsP active layer (for example, corresponding to a 1.3 μm emission wavelength), 4 a P-InP second cladding layer, and 5 an InGaAsP cap layer (for example, corresponding to a 1.05 μm emission wavelength). A mask is attached to such a four-layer structure epitaxial wafer by means of photolithography, unnecessary portions are removed in the shape of an inverted mesa by chemical etching, and P- An InP buried layer 6 and an n-InP buried layer 7 are formed.

このような構造においては、活性層は上下・左
右共に、バンドギヤツプが大きく屈折率の小さい
InP層でおおわれ、かつ、活性層幅W1が2μm前
後と狭く、横方向に光及びキヤリアのとじ込め効
果があり、横モードの安定な半導体レーザが得ら
れる。しかるに、上記埋め込みヘテロレーザで
は、第1回目のエピタキシヤル成長において活性
層がすでに成長され、これを選択的に、化学エツ
チしたり、空気中にさらされる。さらに、この露
出した活性層は、第2の埋め込みエピタキシヤル
成長の際、炉中で高温にさらされ、熱劣化の危険
が伴う。また、電極での電気抵抗を極力減少させ
るために、第1図のように、W1<W2であり、エ
ツチングでこの形を形成する際オーバエツチすれ
ば活性層から上はなくなつてしまい、また、エツ
チングが足りなければ、W1が充分狭くならいた
め高次モードが発生することになる。以上のよう
に、埋め込みヘテロレーザは製造工程における不
安定さ、結晶成長過程での本質的な結晶性の低
下、製作歩留りの低下、等多くの問題点を含んで
いる。
In such a structure, the active layer has a large band gap on both the top and bottom and left and right sides, and has a small refractive index.
It is covered with an InP layer and has a narrow active layer width W 1 of around 2 μm, which has the effect of confining light and carriers in the lateral direction, making it possible to obtain a semiconductor laser with a stable transverse mode. However, in the buried hetero laser, the active layer is already grown in the first epitaxial growth and is selectively etched chemically or exposed to air. Furthermore, this exposed active layer is exposed to high temperatures in the furnace during the second buried epitaxial growth, with the risk of thermal degradation. In addition, in order to reduce the electrical resistance at the electrode as much as possible, as shown in Figure 1, W 1 < W 2 , and if this shape is overetched, the area above the active layer will disappear. Furthermore, if etching is insufficient, W 1 will not become narrow enough and higher-order modes will occur. As described above, buried hetero lasers have many problems such as instability in the manufacturing process, a reduction in essential crystallinity during the crystal growth process, and a reduction in manufacturing yield.

発明の目的 この発明は、上記のような従来からの埋め込み
ヘテロ構造の欠点をなくし、歩留りのよい、かつ
横モードの制御を可能とした新規なるDHレーザ
構造の半導体レーザを提供するものである。
OBJECTS OF THE INVENTION The present invention provides a semiconductor laser with a novel DH laser structure that eliminates the drawbacks of the conventional buried heterostructure as described above, has a high yield, and enables control of the transverse mode.

発明の構成 かかる目的を達成するために、n型結晶基板上
に、n型、P型、n型の3層のエピタキシヤル層
を設け、このエピタキシヤル基板上に少なくとも
P型層までの厚み以上の深さに、逆メサストライ
プ状に、化学エツチング等の手段によつて、ウエ
ーハを加工し、これに、第2の液相エピタキシヤ
ル成長によつて活性層、P型とじ込め層及びP型
キヤツプ層を成長させる。
Structure of the Invention In order to achieve the above object, three epitaxial layers of n-type, p-type, and n-type are provided on an n-type crystal substrate, and an epitaxial layer with a thickness at least as thick as the p-type layer is formed on the epitaxial substrate. The wafer is processed by means such as chemical etching into an inverted mesa stripe to a depth of Grow the cap layer.

実施例の説明 第2図に示すごとくn型(001)InP基板11
上にn型InP層12を厚さ4μm、P型InP層9を
厚さ2μm、n型InP層10を厚さ2μmと、順次、
液相エピタキシヤル成長させた。次にこのような
エピタキシヤルウエーハの(110)方向に100μm
間隔のストライプ状にSiO2をとりつけ、1HBr:
1HNO3:5H2Oからなるエツチング液を用いて選
択的に逆メサ状に不用の部分をとりのぞいた。こ
の様子を第3図に示す。上記エツチング液の使用
によつて第3図における度θは約55゜すなわちエ
ツチ面は(111)となる。なお8はSiO2酸化膜マ
スクである。ここで重要なのは、活性層成長后、
わずかに未飽和溶液にふれさせることによつて活
性層の一部をとりのぞくことである。すなわち、
逆メサ状のウエーハ上に活性層を液相エピタキシ
ヤル成長すると、メサの周辺部では、その他の平
担な部分に比べきわめて成長速度が速く、このよ
うな成長層を、未飽和溶液にふれさせると、メサ
周辺部の厚い部分のみを残し、他の部分をとりの
ぞくことがきわめて容易におこなえる。このよう
にして形成された活性層は、従来のような薄板状
のものから、三角柱状のものとなり、回析による
ビーム広がり角を小さくするとともに、発光スポ
ツトをほぼ円形とし、きわめて安定な横モードの
発振を得るための構造となりうる。
Description of the embodiment As shown in FIG. 2, an n-type (001) InP substrate 11
On top, an n-type InP layer 12 with a thickness of 4 μm, a P-type InP layer 9 with a thickness of 2 μm, and an n-type InP layer 10 with a thickness of 2 μm are sequentially formed.
It was grown by liquid phase epitaxial growth. Next, 100 μm in the (110) direction of such an epitaxial wafer.
Attach SiO 2 in stripes at intervals of 1HBr:
Using an etching solution consisting of 1HNO 3 :5H 2 O, unnecessary portions were selectively removed in an inverted mesa shape. This situation is shown in FIG. By using the above-mentioned etching solution, the degree θ in FIG. 3 becomes approximately 55°, that is, the etched plane becomes (111). Note that 8 is a SiO 2 oxide film mask. What is important here is that after the active layer grows,
Part of the active layer is removed by exposure to a slightly unsaturated solution. That is,
When an active layer is liquid-phase epitaxially grown on an inverted mesa-shaped wafer, the growth rate is extremely faster at the periphery of the mesa than in other flat areas, and it is necessary to expose such a growing layer to an unsaturated solution. This makes it extremely easy to leave only the thick part around the mesa and remove the other parts. The active layer formed in this way changes from the conventional thin plate shape to a triangular prism shape, which reduces the beam spread angle due to diffraction, makes the light emitting spot almost circular, and creates an extremely stable transverse mode. This structure can be used to obtain oscillation.

このような活性層を、さらに、P型とじ込め
層、P型キヤツプ層を形成して、レーザ素子用エ
ピタキシヤルウエーハとする。このように加工さ
れたウエーハを第2の液相エピタキシヤル成長に
よつてまずn型の活性層15をとりつける。この
際、活性層15は、第4図に示すごとく平坦部A
と角部Bとでは、厚みが著しく異なる。本実施例
においてはIn2gに対してAsを4.64atm%、Gaを
0.83atm%Pを0.14atm%からなる溶液を用い成
長開始温度640℃より0.5℃/minの降温速度で3
秒の成長を行つたところ、第4図に示す平坦部A
においては、厚みが約0.2μmであつたが角部Bに
おける最も厚い部分は、0.65μmとなつた。厚み
の比B/Aは、第3図におけるエツチング角θが
55゜のとき最も大きかつた。なお、この成長層の
組成はIn0.74Ga0.26As0.57P0.43である。
Such an active layer is further formed with a P-type confinement layer and a P-type cap layer to form an epitaxial wafer for a laser device. First, an n-type active layer 15 is attached to the thus processed wafer by second liquid phase epitaxial growth. At this time, the active layer 15 has a flat portion A as shown in FIG.
The thickness of the corner portion B and the corner portion B are significantly different. In this example, 4.64 atm% of As and Ga were used for In2g.
Using a solution containing 0.83 atm% P and 0.14 atm%, the temperature was lowered from the growth starting temperature of 640°C at a cooling rate of 0.5°C/min.
When the second growth was performed, the flat area A shown in Fig. 4
The thickness was approximately 0.2 μm, but the thickest portion at corner B was 0.65 μm. The thickness ratio B/A is determined by the etching angle θ in Figure 3.
It was largest at 55°. Note that the composition of this grown layer is In 0.74 Ga 0.26 As 0.57 P 0.43 .

このような成長層を形成したあと、In2gに対
してAsを約2atm%含む溶液に2秒間接触させ
た。この溶液に接触しメルトバツクすることによ
つて第5図に示すように、活性層平坦部Aはとり
去られ角部Bにのみ活性層15′を残すことがで
きる。図からわかるように、この活性層15′の
形状は、ほぼ三角形となつている。この部分の拡
大図の例を第6図に示した。aは約0.8μm、bは
約0.5μmである。活性層をメルトバツクによつて
順次P−InP層13、P−In0.89Ga0.11As0.23P0.77
層14を成長させ第7図に示すようなウエーハを
得た。
After forming such a growth layer, it was brought into contact for 2 seconds with a solution containing about 2 atm % of As based on In2g. By contacting with this solution and melting back, the flat part A of the active layer is removed, leaving only the active layer 15' at the corner part B, as shown in FIG. As can be seen from the figure, the shape of this active layer 15' is approximately triangular. An example of an enlarged view of this part is shown in FIG. a is approximately 0.8 μm, and b is approximately 0.5 μm. P-InP layer 13, P-In 0.89 Ga 0.11 As 0.23 P 0.77
Layer 14 was grown to obtain a wafer as shown in FIG.

このウエーハよりSiO2酸化膜8をとりはずし
第8図のように成長層側にAu−Zn5%オーミツ
ク電極16をとりつけ、基板側にAu−Sn10%オ
ーミツク電極17をとりつけた。このようなウエ
ートより共振器長約300μm幅200μmのチツプに
へき開によつて切り出しAuメツキしたCuヘツダ
ーにInによつてマウントした。このような素子の
Au−Zn側に+、基板側を−として電流を流すと
常温においてしきい値20mAで、波長1.29μmの
発振を示した。25mA以上においては、縦及び横
モード共に単一となつた。さらにビーム広がり角
は、通電方向に垂直、直角ともに約20゜でありき
わめて円形に近いものであつた。なお上記実施例
ではInP、InGaAsPについて述べたが、GaAsや
GaAlAs系でも可能である。
The SiO 2 oxide film 8 was removed from this wafer, and as shown in FIG. 8, an Au-Zn 5% ohmic electrode 16 was attached to the growth layer side, and an Au-Sn 10% ohmic electrode 17 was attached to the substrate side. From this weight, a chip with a resonator length of approximately 300 μm and width of 200 μm was cut out by cleavage and mounted on a Cu header plated with Au using In. of such an element
When a current was passed with the Au-Zn side set as + and the substrate side set as -, oscillation at a wavelength of 1.29 μm was exhibited at room temperature with a threshold value of 20 mA. At 25 mA or more, both the longitudinal and transverse modes became single. Furthermore, the beam divergence angle was approximately 20° both perpendicular to and perpendicular to the current direction, which was very close to a circle. In the above example, InP and InGaAsP were described, but GaAs and
It is also possible to use GaAlAs.

発明の効果 以上述べたように、本発明の半導体レーザは、
低しきい値でかつモードが安定しており、ビーム
の広がり角が小さいという効果がある。
Effects of the Invention As described above, the semiconductor laser of the present invention has
It has the advantage of having a low threshold value, a stable mode, and a small beam divergence angle.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の一実施例の埋め込みレーザの構
成図、第2図から第8図は本発明の一実施におけ
る半導体レーザの構造と製造工程を示す図であ
る。 8……SiO2層、9……P型InP層、10……n
型InP層、11……n型InP基板、12……n型
InP層、13……P−InP層、14……P−In0.89
Ga0.11As0.23P0.77層、15……n型の活性層。
FIG. 1 is a block diagram of a conventional buried laser according to an embodiment, and FIGS. 2 to 8 are diagrams showing the structure and manufacturing process of a semiconductor laser according to an embodiment of the present invention. 8...SiO 2 layer, 9...P-type InP layer, 10...n
type InP layer, 11... n-type InP substrate, 12... n-type
InP layer, 13...P-InP layer, 14...P-In 0.89
Ga 0.11 As 0.23 P 0.77 layer, 15...n-type active layer.

Claims (1)

【特許請求の範囲】 1 (001)基板面上に、第一のエピタキシヤル
成長層を堆積し、該基板上の一部に、(111)面を
構成し、(001)基板面と(111)面となす角部に、
活性層を埋め込んだことを特徴とする半導体レー
ザ。 2 上記エピタキシヤル層は、n型半導体によつ
て少なくとも一つのp型半導体層がはさまれてい
ることを特徴とする特許請求の範囲第1項記載の
半導体レーザ。
[Claims] 1. A first epitaxial growth layer is deposited on a (001) substrate surface, a (111) plane is formed on a part of the substrate, and the (001) substrate surface and (111) ) surface,
A semiconductor laser characterized by an embedded active layer. 2. The semiconductor laser according to claim 1, wherein the epitaxial layer includes at least one p-type semiconductor layer sandwiched between n-type semiconductors.
JP57166938A 1982-09-25 1982-09-25 semiconductor laser Granted JPS5956783A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57166938A JPS5956783A (en) 1982-09-25 1982-09-25 semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57166938A JPS5956783A (en) 1982-09-25 1982-09-25 semiconductor laser

Publications (2)

Publication Number Publication Date
JPS5956783A JPS5956783A (en) 1984-04-02
JPS6347356B2 true JPS6347356B2 (en) 1988-09-21

Family

ID=15840427

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57166938A Granted JPS5956783A (en) 1982-09-25 1982-09-25 semiconductor laser

Country Status (1)

Country Link
JP (1) JPS5956783A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63214779A (en) * 1987-03-03 1988-09-07 Mita Ind Co Ltd Developer supply mechanism

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0770779B2 (en) * 1985-09-04 1995-07-31 株式会社日立製作所 Semiconductor laser manufacturing method
JP2674592B2 (en) * 1996-04-22 1997-11-12 株式会社日立製作所 Semiconductor laser

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63214779A (en) * 1987-03-03 1988-09-07 Mita Ind Co Ltd Developer supply mechanism

Also Published As

Publication number Publication date
JPS5956783A (en) 1984-04-02

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