JPS6348447B2 - - Google Patents
Info
- Publication number
- JPS6348447B2 JPS6348447B2 JP57020368A JP2036882A JPS6348447B2 JP S6348447 B2 JPS6348447 B2 JP S6348447B2 JP 57020368 A JP57020368 A JP 57020368A JP 2036882 A JP2036882 A JP 2036882A JP S6348447 B2 JPS6348447 B2 JP S6348447B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- detectors
- signal
- outputs
- operational amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 20
- 230000010355 oscillation Effects 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 5
- 208000019300 CLIPPERS Diseases 0.000 description 2
- 208000021930 chronic lymphocytic inflammation with pontine perivascular enhancement responsive to steroids Diseases 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
【発明の詳細な説明】
本発明は周波数変調器の自動発振周波数を制御
するために用いられる周波数弁別器、さらに詳し
く云えば電源投入時の立ち上がりおよび周波数弁
別特性を改善した周波数弁別器に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency discriminator used to control the automatic oscillation frequency of a frequency modulator, and more particularly to a frequency discriminator with improved start-up and frequency discrimination characteristics upon power-on.
一般に周波数変調器にはそれ自体で高い周波数
安定度を得ることの難しい自励発振器が用いられ
る。そのため、通常、周波数弁別器を用いて変調
用自励発振器の周波数を自動的に安定制御する方
法がとられている。上記周波数弁別器としては位
相比較機能が十分に集積回路化され、回路定数が
変動しても中心周波数の変動しない周波数弁別器
が昭和52年特許願第27571号に示されている。 Generally, a self-excited oscillator, which is difficult to obtain high frequency stability by itself, is used as a frequency modulator. Therefore, a method is usually adopted in which the frequency of the modulation self-excited oscillator is automatically and stably controlled using a frequency discriminator. As the above-mentioned frequency discriminator, a frequency discriminator in which the phase comparison function is sufficiently integrated into a circuit and whose center frequency does not change even if the circuit constant changes is disclosed in Patent Application No. 27571 of 1972.
第1図はこの従来の回路を示したもので2つの
入力信号の位相を比較し、一方の位相に対する他
方の位相の進みおよび遅れに対応してそれぞれ
別々の出力端子から前記2つの入力信号の位相差
に比例したパルス幅の信号を出力するデイジタル
位相比較器と位相比較器の2つの出力端子に別々
に直列に接続された1対の低域通過波器と高域
通過波器と、前記波器のそれぞれの出力を入
力とする2つの検波器と検波器の出力に別々に接
続された2つの貫通コンデンサと貫通コンデンサ
の出力を入力とする演算増幅器により構成され
る。 FIG. 1 shows this conventional circuit, which compares the phases of two input signals, and outputs the two input signals from separate output terminals in response to the lead or lag of one phase with respect to the other. a digital phase comparator that outputs a signal with a pulse width proportional to the phase difference; a pair of low-pass waveforms and a high-pass waveform connected separately in series to two output terminals of the phase comparator; It is composed of two wave detectors that receive the outputs of the wave detectors as inputs, two feedthrough capacitors that are separately connected to the outputs of the wave detectors, and an operational amplifier that receives the outputs of the feedthrough capacitors as inputs.
第1図において、端子aには周波数変調器の公
称周波数に相当する基準周波数fRなる入力が加え
られ、端子bには周波数変調用の自励発振器の出
力周波数に相当するfVなる入力が加えられる。こ
れら2つの入力は、それぞれクリツパ回路101
および102において矩形波に整形され、それぞ
れ出力1および2となる。出力1および2は位相
比較器103の2つの入力に加えられる。位相比
較器103では出力2の位相に対して出力1の位
相が0〜360度進んでいるときはその進み期間だ
け端子dにパルスを出力し、出力2の位相に対し
て出力1の位相が0〜360度遅れているときはそ
の遅れ期間だけ端子cにパルスを出力する。端子
cおよびdに導びかれた出力3および4は別々に
直列に接続された1対の低域通過波器と高域通
過波器104,106よび105,107を通
りそれぞれ検波器108および109に加えられ
る。検波器108および109ではそれぞれの入
力信号を直流電圧に変換する。検波器108,1
09の出力5および6は貫通コンデンサC1およ
びC2を通り演算増幅器110の反転または非反
転のそれぞれの入力端子に加えられる。演算増幅
器110では出力7および8の差を反転増幅し、
その出力9を端子eに導びく。出力9は先に述べ
た周波数変調用の自励発振器の発振周波数を制御
するための端子に加えられる。 In Figure 1, a reference frequency f R corresponding to the nominal frequency of the frequency modulator is applied to terminal a, and an input f V corresponding to the output frequency of a self-excited oscillator for frequency modulation is applied to terminal b. Added. These two inputs are connected to the clipper circuit 101, respectively.
and 102, the signals are shaped into rectangular waves, resulting in outputs 1 and 2, respectively. Outputs 1 and 2 are applied to two inputs of phase comparator 103. In the phase comparator 103, when the phase of output 1 is ahead of the phase of output 2 by 0 to 360 degrees, a pulse is output to terminal d for the period of advance, and the phase of output 1 is ahead of the phase of output 2. When there is a delay of 0 to 360 degrees, a pulse is output to terminal c for the delay period. Outputs 3 and 4 led to terminals c and d pass through a pair of low-pass and high-pass waveforms 104, 106 and 105, 107, respectively, connected in series to detectors 108 and 109, respectively. added to. Detectors 108 and 109 convert their respective input signals into DC voltages. Detector 108,1
Outputs 5 and 6 of 09 are applied to respective inverting or non-inverting input terminals of operational amplifier 110 through feedthrough capacitors C 1 and C 2 . The operational amplifier 110 inverts and amplifies the difference between outputs 7 and 8,
Its output 9 is led to terminal e. The output 9 is applied to a terminal for controlling the oscillation frequency of the self-excited oscillator for frequency modulation mentioned above.
ここで貫通コンデンサC1およびC2は検波器1
08,109側からの高周波成分のリークを切る
ことを目的としているのでC1,C2の容量値は大
きく、電源投入時に検波器108,109の出力
である直流電圧に立ち上がるまでの充電に比較的
時間がかかる。 Here feedthrough capacitors C 1 and C 2 are detector 1
Since the purpose is to cut off the leakage of high frequency components from the 08 and 109 sides, the capacitance values of C 1 and C 2 are large, and compared to charging until the DC voltage rises to the output of the detectors 108 and 109 when the power is turned on. It takes a lot of time.
貫通コンデンサC1,C2の充電のための立ち上
がりの遅れは、この周波数弁別器を自動周波数制
御回路に用いた場合、電源投入時の変調用自励発
振器の公称周波数への引き込み範囲を非常に狭く
する。 When this frequency discriminator is used in an automatic frequency control circuit, the start-up delay due to charging of the feedthrough capacitors C 1 and C 2 greatly reduces the pull-in range to the nominal frequency of the self-excited oscillator for modulation at power-on. Make it narrower.
また周波数弁別器の2つの入力信号の位相差が
0のとき検波器108,109の出力5,6は演
算増幅器110のオフセツト電圧に相当するが、
従来の周波数弁別器では、外乱の入力によつて演
算増幅器110のオフセツト電圧にゆらぎを生じ
やすい。このゆらぎは、変調用自励発振器の発振
周波数のゆらぎへつながる。 Furthermore, when the phase difference between the two input signals of the frequency discriminator is 0, the outputs 5 and 6 of the detectors 108 and 109 correspond to the offset voltage of the operational amplifier 110;
In the conventional frequency discriminator, the offset voltage of the operational amplifier 110 tends to fluctuate due to disturbance input. This fluctuation leads to fluctuation in the oscillation frequency of the modulation self-excited oscillator.
本発明の目的は自動周波数制御回路において、
電源投入時の立ち上がりが急速で、変調用自励発
振器の公称周波数への引き込みが安定な、しかも
自励発振周波数のゆらぎが少ない周波数弁別器を
提供することにある。 The object of the present invention is to provide an automatic frequency control circuit,
To provide a frequency discriminator that has a rapid start-up when power is turned on, stable pull-in of a self-excited oscillator for modulation to the nominal frequency, and less fluctuation in the self-excited oscillation frequency.
前記目的を達成するために本発明による周波数
弁別器は基準周波数である第1入力信号と自動周
波数制御回路の自励発振器の周波数である第2入
力信号の位相を比較し、一方の信号の位相に対す
る他方の信号の位相の進みおよび遅れに対応して
それぞれ別々の出力端子から前記第1、第2入力
信号の位相差に比例したパルス幅の信号を出力す
るデイジタル位相比較器と、前記デイジタル位相
比較器の2つの出力にそれぞれ接続された、低域
通過波器および高域通過波器よりなる第1、
第2の直列回路と、前記第1、第2直列回路のそ
れぞれの出力を入力としたダイオード2本からな
る倍電圧整流回路の第1、第2検波器と、前記第
1、第2検波器の出力に別々に接続された第1、
第2貫通コンデンサと、前記第1と第2貫通コン
デンサの出力の差を増幅し、その出力が前記自励
発振器の発振周波数制御信号に用いられる演算増
幅器とからなる周波数弁別器において、前記演算
増幅器の電源電圧の極性に対応させて前記第1、
第2検波器の各ダイオードの向きを定め、前記電
源とアース間に接続した抵抗の分圧点を前記第
1、第2検波器に接続することにより前記第1、
第2検波器に演算増幅器のオフセツト電圧相当分
を与えるとともに電源投入時、前記各ダイオード
を通して前記各貫通コンデンサを充電するように
構成してある。 To achieve the above object, a frequency discriminator according to the present invention compares the phases of a first input signal having a reference frequency and a second input signal having a frequency of a self-excited oscillator of an automatic frequency control circuit, and determines the phase of one of the signals. a digital phase comparator that outputs a signal with a pulse width proportional to the phase difference between the first and second input signals from separate output terminals in response to a phase lead or lag of the other signal; and a first consisting of a low-pass waver and a high-pass waver connected respectively to the two outputs of the comparator;
a second series circuit, first and second detectors of a voltage doubler rectifier circuit consisting of two diodes inputting the respective outputs of the first and second series circuits; and the first and second detectors. the first, separately connected to the output of
In a frequency discriminator comprising a second feedthrough capacitor and an operational amplifier that amplifies the difference between the outputs of the first and second feedthrough capacitors and whose output is used as an oscillation frequency control signal of the self-excited oscillator, the operational amplifier The first,
By determining the direction of each diode of the second wave detector, and connecting the voltage dividing point of the resistor connected between the power source and the ground to the first and second wave detectors, the first and second wave detectors are connected.
The second detector is provided with a voltage equivalent to the offset voltage of the operational amplifier, and is configured to charge the feedthrough capacitors through the diodes when the power is turned on.
前記構成によれば、周波数弁別特性が安定とな
り、本発明の目的は完全に達成される。 According to the above configuration, the frequency discrimination characteristic becomes stable, and the object of the present invention is completely achieved.
以下、図面を参照して本発明をさらに詳しく説
明する。第2図aは本発明による周波数弁別器の
第1の実施例を示すブロツク図である。図におい
て、第1図と同じ部分には同じ符号が付してあ
り、倍電圧整流器である検波器108,109は
演算増幅器110の正電源に対応した構成されて
いる。すなわちダイオードD1,D4のアノードは
それぞれコンデンサC3,C4を介して波器10
6,107の出力側に、カソードはそれぞれ貫通
コンデンサC1,C2の入力側に接続され、ダイオ
ードD2,D3のカソードはそれぞれダイオードD1,
D4のアノードに接続され、ダイオードD2,D3の
アノードは互に接続されている。演算増幅器11
0の正電源とアース間には可変抵抗Rが接続され
ており、その分圧点は上記ダイオードD1,D4の
アノード接続点が接続されている。 Hereinafter, the present invention will be explained in more detail with reference to the drawings. FIG. 2a is a block diagram showing a first embodiment of a frequency discriminator according to the invention. In the figure, the same parts as in FIG. In other words, the anodes of diodes D 1 and D 4 are connected to wave generator 10 via capacitors C 3 and C 4 , respectively.
6, 107, the cathodes are connected to the input sides of feedthrough capacitors C 1 and C 2, respectively, and the cathodes of diodes D 2 and D 3 are connected to diodes D 1 and D 3 , respectively.
It is connected to the anode of D 4 , and the anodes of diodes D 2 and D 3 are connected to each other. Operational amplifier 11
A variable resistor R is connected between the positive power source 0 and the ground, and its voltage dividing point is connected to the anode connection point of the diodes D 1 and D 4 .
電源が投入されたとき、貫通コンデンサC1お
よびC2の充電のため電流がダイオードD1〜D4を
通して流れるため貫通コンデンサC1およびC2は
矢印Aの方向に急速に充電される。 When the power is turned on, the feedthrough capacitors C1 and C2 are rapidly charged in the direction of arrow A because current flows through the diodes D1 to D4 to charge the feedthrough capacitors C1 and C2 .
可変抵抗Rを介してダイオードD2,D3のアノ
ードの接続点に加えられる電圧は演算増幅器11
0のオフセツト電圧に相当する。このオフセツト
電圧が加えられているため、図示しない変調用自
励発振器の自動発振周波数のゆらぎは従来に比較
し大幅に減少する。具体的には5分の1程度まで
減少した。 The voltage applied to the connection point of the anodes of diodes D 2 and D 3 via the variable resistor R is applied to the operational amplifier 11.
Corresponds to an offset voltage of 0. Since this offset voltage is applied, fluctuations in the automatic oscillation frequency of the modulation self-exciting oscillator (not shown) are significantly reduced compared to the conventional one. Specifically, it has decreased to about one-fifth.
第2図bは本発明の第2の実施例を示すブロツ
ク図である。この例は演算増幅器110の電源が
負の場合で、検波器108,109の各ダイオー
ドの向きは第2図aの場合の逆になつている。し
たがつて、電源投入時の貫通コンデンサC1,C2
への充電電流は矢印Bの方向に流れ、貫通コンデ
ンサC1,C2は急速に充電される。 FIG. 2b is a block diagram showing a second embodiment of the invention. In this example, the power supply of the operational amplifier 110 is negative, and the directions of the diodes of the detectors 108 and 109 are opposite to those shown in FIG. 2a. Therefore, the feedthrough capacitors C 1 , C 2 at power-on
The charging current flows in the direction of arrow B, and feedthrough capacitors C 1 and C 2 are rapidly charged.
以上、詳しく説明したように本発明によれば電
源投入時、貫通コンデンサは急速に充電されるの
で本発明回路を用いる自動周波数制御回路の変調
用自励発振器の公称周波数への引き込みが安定と
なる。なお従来は、電源投入時、その立上がりが
確実になるように自動周波数制御回路には遅延回
路等を用いているが、それらを省略できる。また
本発明回路によつて変調用自励発振器の自動発振
周波数のゆらぎを小さくできる。 As explained in detail above, according to the present invention, when the power is turned on, the feedthrough capacitor is rapidly charged, so that the self-excited oscillator for modulation of the automatic frequency control circuit using the circuit of the present invention is stably pulled to the nominal frequency. . Conventionally, a delay circuit or the like is used in the automatic frequency control circuit to ensure that the power starts up when the power is turned on, but these can be omitted. Furthermore, the circuit of the present invention can reduce fluctuations in the automatic oscillation frequency of the self-excited oscillator for modulation.
第1図は従来の周波数弁別器のブロツク図、第
2図aは本発明による周波数弁別器の実施例を示
すブロツク図、第2図bは本発明の他の実施例を
示すブロツク図である。
101,102……クリツパ回路、103……
デイジタル位相比較器、104,105,10
6,107……低域通過波器または高域通過
波器、108,109……検波器、110……演
算増幅器、C1,C2……貫通コンデンサ、C3〜C6
……コンデンサ、D1〜D4……ダイオード、R…
…可変抵抗。
FIG. 1 is a block diagram of a conventional frequency discriminator, FIG. 2a is a block diagram showing an embodiment of a frequency discriminator according to the present invention, and FIG. 2b is a block diagram showing another embodiment of the present invention. . 101, 102... Clipper circuit, 103...
Digital phase comparator, 104, 105, 10
6,107...Low pass wave generator or high pass wave generator, 108,109...Detector, 110...Operation amplifier, C1 , C2 ...Feedthrough capacitor, C3 to C6
...Capacitor, D1 to D4 ...Diode, R...
...variable resistance.
Claims (1)
制御回路の自励発振器の周波数である第2入力信
号の位相を比較し、一方の信号の位相に対する他
方の信号の位相の進みおよび遅れに対応してそれ
ぞれ別々の出力端子から前記第1、第2入力信号
の位相差に比例したパルス幅の信号を出力するデ
イジタル位相比較器と、前記デイジタル位相比較
器の2つの出力にそれぞれ接続された、低域通過
波器および高域通過波器よりなる第1、第2
の直列回路と、前記第1、第2直列回路のそれぞ
れの出力を入力としたダイオード2本からなる倍
電圧整流回路の第1、第2検波器と、前記第1、
第2検波器の出力に別々に接続された第1、第2
貫通コンデンサと、前記第1と第2貫通コンデン
サの出力の差を増幅し、その出力が前記自励発振
器の発振周波数制御信号に用いられる演算増幅器
とからなる周波数弁別器において、前記演算増幅
器の電源電圧の極性に対応させて前記第1、第2
検波器の各ダイオードの向きを定め、前記電源と
アース間に接続した抵抗の分圧点を前記第1、第
2検波器に接続することにより前記第1、第2検
波器に演算増幅器のオフセツト電圧相当分を与え
るとともに電源投入時、前記各ダイオードを通し
て前記各貫通コンデンサを充電するように構成し
たことを特徴とする周波数弁別器。1 Compare the phases of the first input signal, which is the reference frequency, and the second input signal, which is the frequency of the self-excited oscillator of the automatic frequency control circuit, and correspond to the lead or lag in the phase of one signal with respect to the phase of the other signal. a digital phase comparator that outputs a signal with a pulse width proportional to the phase difference between the first and second input signals from separate output terminals; A first and a second waveform consisting of a bandpass waveform and a highpass waveform.
a series circuit, and first and second detectors of a voltage doubler rectifier circuit consisting of two diodes inputting the respective outputs of the first and second series circuits;
The first and second detectors are connected separately to the output of the second detector.
In a frequency discriminator comprising a feedthrough capacitor and an operational amplifier that amplifies the difference between the outputs of the first and second feedthrough capacitors and whose output is used as an oscillation frequency control signal of the self-excited oscillator, the power supply of the operational amplifier The first and second electrodes correspond to the polarity of the voltage.
By determining the direction of each diode of the wave detector and connecting the voltage dividing point of the resistor connected between the power source and the ground to the first and second wave detectors, the offset of the operational amplifier can be applied to the first and second wave detectors. A frequency discriminator characterized in that the frequency discriminator is configured to apply a voltage equivalent and charge each of the feedthrough capacitors through each of the diodes when the power is turned on.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57020368A JPS58137310A (en) | 1982-02-09 | 1982-02-09 | Frequency discriminator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57020368A JPS58137310A (en) | 1982-02-09 | 1982-02-09 | Frequency discriminator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58137310A JPS58137310A (en) | 1983-08-15 |
| JPS6348447B2 true JPS6348447B2 (en) | 1988-09-29 |
Family
ID=12025130
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57020368A Granted JPS58137310A (en) | 1982-02-09 | 1982-02-09 | Frequency discriminator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58137310A (en) |
-
1982
- 1982-02-09 JP JP57020368A patent/JPS58137310A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58137310A (en) | 1983-08-15 |
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