JPS6349407B2 - - Google Patents
Info
- Publication number
- JPS6349407B2 JPS6349407B2 JP8279979A JP8279979A JPS6349407B2 JP S6349407 B2 JPS6349407 B2 JP S6349407B2 JP 8279979 A JP8279979 A JP 8279979A JP 8279979 A JP8279979 A JP 8279979A JP S6349407 B2 JPS6349407 B2 JP S6349407B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- capacitor
- switching circuit
- output
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 56
- 238000007599 discharging Methods 0.000 claims description 2
- 230000002265 prevention Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/28—Modifications for introducing a time delay before switching
Landscapes
- Pulse Circuits (AREA)
- Electronic Switches (AREA)
Description
【発明の詳細な説明】
(利用分野)
本発明は電源投入時より遅延時間を持たせて出
力を反転する遅延回路に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Application) The present invention relates to a delay circuit that inverts an output with a delay time after power is turned on.
(従来技術の問題点)
一般にこの種遅延回路は第5図に示す如く、直
流電源イと直列接続したスイツチロを投入すると
抵抗ハを通してコンデンサニが充電されこのコン
デンサニの電圧がスイツチング回路ホの直電源イ
の電圧を抵抗ヘと抵抗トとで分圧したしきい値よ
り上つた際に比較器チの出力を反転させるものが
あつた。(Problems with the Prior Art) In general, in this type of delay circuit, as shown in Figure 5, when a switch connected in series with a DC power supply A is turned on, a capacitor N is charged through a resistor C, and the voltage of this capacitor N is directly connected to the switching circuit H. There was one in which the output of comparator H was inverted when the voltage of power supply A exceeded a threshold value divided by resistor A and resistor G.
而して上記の如きのものであると、コンデンサ
ニには漏れ電流があるので、この漏れ電流より充
電する電流が小さくなるとコンデンサニの電圧が
上がらずこの電圧がスイツチング回路ホのしきい
値より小さい場合はスイツチング回路ホの比較器
チの出力は反転せず故障となると共に、このコン
デンサニは漏れ電流の少ないものを用いなければ
ならず、さらにこのコンデンサニの漏れ電流の為
に充電電流を決定する抵抗ハは小さい値としなく
てはならないので短時間の遅延時間しか望めなか
つた。 If the capacitor is as described above, there is a leakage current in the capacitor, so if the charging current is smaller than this leakage current, the voltage on the capacitor will not rise and this voltage will fall below the threshold of the switching circuit. If it is small, the output of comparator H in switching circuit E will not be reversed and a failure will occur, and this capacitor N must have a low leakage current, and the charging current must be reduced due to the leakage current of this capacitor N. Since the determined resistance C must be a small value, only a short delay time can be expected.
(発明の目的)
本発明は上記の様な点に鑑み、漏れ電流の少な
いコンデンサを用いなくとも十分な遅延時間が望
めると共に而もこの漏れ電流により出力が反転し
ないという問題をなくすことを目的としたもので
ある。(Objective of the Invention) In view of the above-mentioned points, an object of the present invention is to provide a sufficient delay time without using a capacitor with low leakage current, and to eliminate the problem of the output not being reversed due to this leakage current. This is what I did.
(実施例)
以下本発明を一実施例として掲げた図面第1図
及び第2図に基いて説明すると、1は正極1aと
負極1bとを有する直流電源、2は直流電源1と
直列接続した正極1b側のスイツチ、3はコンデ
ンサであつて一端を直流電源1の負極1bに接続
している。4は第2のスイツチング回路(以下単
にスイツチング回路と呼ぶ)であつて直流電源1
とスイツチ2との直列回路に分圧抵抗5,6と比
較器7の電源入力とを並列接続し且つ分圧抵抗
5,6の分圧点Aに比較器7の入力(+)を接続
し且つ比較器7の入力(−)をコンデンサ3の他
端Bに接続すると共に比較器7の出力をスイツチ
ング回路4の出力4aとしている。尚、抵抗8は
コンデンサ3と並列接続してコンデンサ3の電荷
を放電するものであつて、必要に応じて用いられ
る。即ち、このスイツチング回路4は分圧点Aと
負極1bとの間の電圧をしきい値としコンデンサ
3の電圧に応じて出力4aを反転する。9は充電
回路であつて、直流電源1とスイツチ2との直列
回路に負極1b側に充電用コンデンサ10を接続
した限流用抵抗11との直列回路と分圧抵抗1
2,13と第1のスイツチング回路としての比較
器14の電源入力とを並列接続し、さらに分圧抵
抗12,13の分圧点Cに比較器14の入力
(+)を接続し且つ限流用抵抗11と充電用コン
デンサ10との接続点Dに比較器14の入力
(−)を接続すると共に比較器14の出力14a
とコンデンサ3の他端Bとの間に逆流防止用ダイ
オード15と限流用抵抗16との直列回路を接続
しており、比較器14は分圧点Cと負極1bとの
間の電圧をしきい値とし充電用コンデンサ10の
電圧に応じて出力14aを反転する。即ち、充電
回路9はスイツチン2の投入時からコンデンサ3
の電圧がスイツチング回路4のしきい値より高い
電圧になるまで充電してコンデンサ3への充電を
停止する様になつている。尚、比較器7と比較器
14とは、入力(+)の電位が入力(−)の電位
より低い場合には出力を電流電源1の負極1bと
ほぼ同電位とし、入力(+)の電位が入力(−)
の電位より高い場合には出力を直流電源1の正1
aとほぼぼ同電位とする。(Embodiment) The present invention will be explained below based on FIGS. 1 and 2 showing an embodiment of the present invention. 1 is a DC power source having a positive electrode 1a and a negative electrode 1b, and 2 is a DC power source connected in series with the DC power source 1. The switch 3 on the positive electrode 1b side is a capacitor, and one end thereof is connected to the negative electrode 1b of the DC power supply 1. 4 is a second switching circuit (hereinafter simply referred to as a switching circuit), which connects the DC power supply 1
The voltage dividing resistors 5 and 6 and the power input of the comparator 7 are connected in parallel to the series circuit of the voltage dividing resistors 5 and 6, and the input (+) of the comparator 7 is connected to the voltage dividing point A of the voltage dividing resistors 5 and 6. In addition, the input (-) of the comparator 7 is connected to the other end B of the capacitor 3, and the output of the comparator 7 is used as the output 4a of the switching circuit 4. Note that the resistor 8 is connected in parallel with the capacitor 3 to discharge the charge of the capacitor 3, and is used as necessary. That is, this switching circuit 4 uses the voltage between the voltage dividing point A and the negative electrode 1b as a threshold value, and inverts the output 4a according to the voltage of the capacitor 3. Reference numeral 9 denotes a charging circuit, which includes a series circuit of the DC power supply 1 and the switch 2, a series circuit with a current-limiting resistor 11 in which a charging capacitor 10 is connected to the negative electrode 1b side, and a voltage dividing resistor 1.
2 and 13 and the power input of a comparator 14 as a first switching circuit are connected in parallel, and the input (+) of the comparator 14 is connected to the voltage dividing point C of the voltage dividing resistors 12 and 13. The input (-) of the comparator 14 is connected to the connection point D between the resistor 11 and the charging capacitor 10, and the output 14a of the comparator 14
A series circuit consisting of a reverse current prevention diode 15 and a current limiting resistor 16 is connected between the terminal B of the capacitor 3 and the other end B of the capacitor 3, and the comparator 14 thresholds the voltage between the voltage dividing point C and the negative electrode 1b. The output 14a is inverted according to the voltage of the charging capacitor 10. That is, the charging circuit 9 starts charging the capacitor 3 from the time the switch 2 is turned on.
The capacitor 3 is charged until the voltage becomes higher than the threshold voltage of the switching circuit 4, and then charging of the capacitor 3 is stopped. Note that when the potential of the input (+) is lower than the potential of the input (-), the comparators 7 and 14 make the output almost the same potential as the negative electrode 1b of the current power source 1, and the potential of the input (+) is input (-)
If the potential is higher than the positive 1 of DC power supply 1, the output is
The potential is approximately the same as that of a.
さらに第2図は第1図の直流電源1の負極1b
を基準電位とした動作時間特性図であつて、Dは
接続点Dの電圧、14aは比較器14の出力14
aの電圧、Bはコンデンサ3の他端Bの電圧、4
aはスイツチング回路4の出力4aの電圧、Vl
は分圧点Cの電圧(比較器14のしきい値)、V
2は分圧点Aの電圧(スイツチング回路4のしき
い値)を示している。 Furthermore, FIG. 2 shows the negative electrode 1b of the DC power supply 1 in FIG.
is an operating time characteristic diagram with reference potential as D, D is the voltage at connection point D, and 14a is the output 14 of the comparator
The voltage at a, B is the voltage at the other end B of capacitor 3, 4
a is the voltage of the output 4a of the switching circuit 4, Vl
is the voltage at voltage division point C (threshold value of comparator 14), V
2 indicates the voltage at the voltage dividing point A (threshold value of the switching circuit 4).
而してその動作を負極1bを基準電位として説
明すると、スイツチ2を開放している際(第2図
のa時点以前)は、コンデンサ3の電圧圧は零で
あると共にスイツチング回路4の出力4aは零で
ある。 To explain the operation using the negative electrode 1b as a reference potential, when the switch 2 is open (before time a in FIG. 2), the voltage across the capacitor 3 is zero and the output 4a of the switching circuit 4 is is zero.
さらにスイツチ2を投入した際(第2図のa時
点以後)は、充電回路9は充電用コンデンサ10
を限流用抵抗11を通して充電しこの接続点Dの
電圧が分圧点Cの電圧(比較器14のしきい値)
以上になるまで比較器14の出力14aの電圧を
直流電源1の正極1aとほぼ同電圧として出力1
4aより逆流防止用ダイオード15と限流用抵抗
16とを通してコンデンサ3を充電すると共に接
続点Dの電圧が分圧点Cの電圧(比較器14のし
きい値)以上になると比較器14の出力14aを
負極1bとほぼ同電圧としてコンデンサ3への充
電を停止する。尚、スイツチ2を投入した際(第
2図のa時点以後)にコンデンサ3の電圧がスイ
ツチング回路4の分圧点Aの電圧(スイツチング
回路4のしきい値)になるまでスイツチング回路
4の出力4aは直流電源1の正極1aの電圧と同
電圧となり、コンデンサ3の電圧が充電されてス
イツチング回路4の分圧点Aの電圧(スイツチン
グ回路4のしきい値)以上になると出力4aは負
極1bとほぼ同電圧となる。さらに充電されたコ
ンデンサ3の電圧は抵抗8或はコンデンサ3の漏
れ電流により放電されて低下しコンデンサ3の電
圧がスイツチング回路4の分圧点Aの電圧(スイ
ツチング回路4のしきい値)以下になるとスイツ
チング回路4の出力4aは反転して正極1aとほ
ぼ同電圧となり、電源投入時より遅延時間を持た
せて出力を反転する。尚、スイツチ2の投入した
際にコンデンサ3に充電されるまでの間スイツチ
ング回路4の出力4aに正極1aの電圧とほぼ同
電圧の出力が出るがこの出力が不要の際は出力4
aに積分回路を析続して消去してもよい。さら
に、スイツチング回路4の出力4aの出力電圧の
立上り時間を短くする為にこの出力4aにシユミ
ツトトリガ回路の如きスイツチング回路を接続し
てもよい。 Furthermore, when the switch 2 is turned on (after time a in FIG. 2), the charging circuit 9 is connected to the charging capacitor 10.
is charged through the current limiting resistor 11, and the voltage at this connection point D becomes the voltage at the voltage dividing point C (threshold value of the comparator 14).
The voltage of the output 14a of the comparator 14 is set to approximately the same voltage as the positive electrode 1a of the DC power supply 1 until the output 1
4a, the capacitor 3 is charged through the reverse current prevention diode 15 and the current limiting resistor 16, and when the voltage at the connection point D becomes equal to or higher than the voltage at the voltage dividing point C (threshold value of the comparator 14), the output 14a of the comparator 14 is set to approximately the same voltage as the negative electrode 1b, and charging to the capacitor 3 is stopped. Furthermore, when the switch 2 is turned on (after time a in Fig. 2), the output of the switching circuit 4 remains unchanged until the voltage of the capacitor 3 reaches the voltage at the voltage division point A of the switching circuit 4 (threshold value of the switching circuit 4). 4a becomes the same voltage as the positive electrode 1a of the DC power supply 1, and when the voltage of the capacitor 3 is charged and exceeds the voltage at the voltage division point A of the switching circuit 4 (threshold value of the switching circuit 4), the output 4a becomes the negative electrode 1b. The voltage is almost the same. Furthermore, the voltage of the charged capacitor 3 is discharged by the resistor 8 or the leakage current of the capacitor 3 and decreases, and the voltage of the capacitor 3 becomes lower than the voltage of the voltage division point A of the switching circuit 4 (threshold value of the switching circuit 4). Then, the output 4a of the switching circuit 4 is inverted and becomes approximately the same voltage as the positive electrode 1a, and the output is inverted with a delay time from when the power is turned on. Furthermore, when the switch 2 is turned on, until the capacitor 3 is charged, an output of approximately the same voltage as the voltage of the positive electrode 1a is output to the output 4a of the switching circuit 4, but when this output is not needed, the output 4
An integral circuit may be added to a and eliminated. Furthermore, in order to shorten the rise time of the output voltage of the output 4a of the switching circuit 4, a switching circuit such as a Schmitt trigger circuit may be connected to this output 4a.
而も他の実施例として掲げた図面第3図に示す
如く、スイツチング回路4をコンデンサ3に放電
を兼ねる分圧抵抗17,18を並列接続してこの
分圧抵抗17,18の分圧点にトランジスタ19
のベースを接続して、トランジスタ19のベー
ス・エミツタ間の動作電圧に相応する分圧抵抗1
7,18間の電圧をしきい値としてトランジスタ
19をスイツチング動作させトランジスタ19の
コレクタに析続した出力4aを反転させるものと
してもよい。尚、抵抗20はトランジスタ19の
コレクタに流れる電流を限流する。さらに、充電
回路9を直流電源1と直列接続したスイツチ2を
投入すると限流用抵抗21を通して充電用コンデ
ンサ22を充電し且つこの充電用コンデンサ22
の電圧を分圧抵抗23,24にて分圧しさらにこ
の分圧点に第1のスイツチング回路としてのトラ
ンジスタ25のベースを接続してトランジスタ2
5のベース・エミツタ間の動作電圧をしきい値と
してトランジスタ25をスイツチング動作させる
ことにより、スイツチング回路4のしきい値より
高い電圧まで限流用抵抗26と逆流防止用ダイオ
ード27とを通してコンデンサ3を充電し停止す
るものとしてもよい。 In addition, as shown in FIG. 3 of the drawings shown as another embodiment, the switching circuit 4 is connected in parallel to the capacitor 3 with voltage dividing resistors 17 and 18 that also serve as discharge, and the switching circuit 4 is connected to the voltage dividing point of the voltage dividing resistors 17 and 18. transistor 19
A voltage dividing resistor 1 corresponding to the operating voltage between the base and emitter of the transistor 19 is connected to the base of the transistor 19.
The voltage between 7 and 18 may be used as a threshold value to cause the transistor 19 to perform a switching operation, thereby inverting the output 4a deposited on the collector of the transistor 19. Note that the resistor 20 limits the current flowing to the collector of the transistor 19. Furthermore, when the switch 2 connecting the charging circuit 9 in series with the DC power source 1 is turned on, the charging capacitor 22 is charged through the current limiting resistor 21, and the charging capacitor 22 is charged through the current limiting resistor 21.
The voltage of the transistor 25 is divided by the voltage dividing resistors 23 and 24, and the base of the transistor 25 serving as the first switching circuit is connected to this voltage dividing point.
By switching the transistor 25 using the operating voltage between the base and emitter of the switching circuit 4 as a threshold, the capacitor 3 is charged through the current limiting resistor 26 and the reverse current prevention diode 27 to a voltage higher than the threshold of the switching circuit 4. It may also be possible to stop.
さらに他の実施例として掲げた図第4図に示す
如く、スイツチング回路4をコンデンサ3の電圧
がコンデンサ3の漏れ電流域は抵抗28により放
電されて低下しこの電圧が否定回路29のしきい
値を基準として否定回路29の出力に接続した出
力4aを反転するものとしてもよい。尚、抵抗3
0は否定回路29の入力に流れる電流を限流する
ものである。さらに、充電回路9を直流電源1と
直列接続したスイツチ2を投入すると限流用抵抗
31を通して充電用コンデンサ32を充電し且つ
この充電用コンデンサンサ32の電圧が第1のス
イツチング回路としての否定回路33のしきい値
を基準として否定回路33の出力を反転させるこ
とによりスイツチング回路4のしきい値より高い
電圧まで限流用抵抗34と逆流防止用ダイオード
35とを通して充電し停止するものでもよい。
尚、抵抗36は否定回路33の入力に流れる電流
を限流する。 As shown in FIG. 4, which is shown as another embodiment, when the voltage of the capacitor 3 in the switching circuit 4 is discharged by the resistor 28 and the leakage current range of the capacitor 3 is lowered, this voltage becomes the threshold value of the inverting circuit 29. The output 4a connected to the output of the negative circuit 29 may be inverted based on the reference value. Furthermore, resistance 3
0 limits the current flowing to the input of the negative circuit 29. Furthermore, when the switch 2 connecting the charging circuit 9 in series with the DC power source 1 is turned on, the charging capacitor 32 is charged through the current limiting resistor 31, and the voltage of the charging capacitor 32 is transferred to the negative circuit 33 as the first switching circuit. The output of the negative circuit 33 may be inverted based on the threshold value of , and the voltage may be charged through the current-limiting resistor 34 and the backflow prevention diode 35 to a voltage higher than the threshold value of the switching circuit 4, and then stopped.
Note that the resistor 36 limits the current flowing to the input of the NOT circuit 33.
(効果)
かように本発明は、電源の投入により充電を開
始する第1のコンデンサ及び第2のコンデンサと
を有し、前記第1のコンデンサの一端の電圧がし
きい値を越えると反転して前記第2のコンデンサ
へ充電を停止する第1のスイツチング回路と、前
記賃1のスイツチング回路の前記反転動作により
放電を開始する第2のコンデンサの一端の電圧
が、しきい値を下回ずと反転して出力をする第2
のスイツチング回路とで構成したので、漏れ電流
の少ないコンデンサを用いなくとも十分な遅延時
間が望めると共に而もこの漏れ電流により出力が
反転しないという問題をなくすことが出来る効果
がある。(Effects) As described above, the present invention includes a first capacitor and a second capacitor that start charging when the power is turned on, and is inverted when the voltage at one end of the first capacitor exceeds a threshold value. the voltage at one end of the first switching circuit that stops charging the second capacitor and the voltage at one end of the second capacitor that starts discharging due to the reversal operation of the first switching circuit does not fall below a threshold value. and the second output which is inverted and output.
Since the switching circuit is constructed with a switching circuit, a sufficient delay time can be obtained without using a capacitor with low leakage current, and the problem of the output not being reversed due to this leakage current can be avoided.
図面第1図及び第2図は本発明の遅延回路の一
実施例を示し、第1図は回路図、第2図は動作時
間特性図、第3図及び第4図は本発明の他の実施
例を示す回路図、第5図は従来の遅延回路の回路
図を示している。
1……直流電源、1a……正極、1b……負
極、2……スイツチ、3……コンデンサ、4……
第2のスイツチング回路、4a……出力、5,6
……分圧抵抗、7……比較器、8……抵抗、9…
…充電回路、10……充電用コンデンサ、11…
…限流用抵抗、12,13……分圧抵抗、14…
…比較器、15……逆流防止用ダイオード、16
……限流用抵抗、17,18……分圧抵抗、19
……トランジスタ、20……抵抗、21……限流
用抵抗、22……充電用コンデンサ、23,24
……分圧抵抗、25……トランジスタ、26……
限流用抵抗、27……逆流防止用ダイオード、2
8……抵抗、29……否定回路、30……抵抗、
31……限流用抵抗、32……充電用コンデン
サ、33……否定回路、34……限流用抵抗、3
5……逆流防止用コンデンサ、36……抵抗。
Figures 1 and 2 show one embodiment of the delay circuit of the present invention, Figure 1 is a circuit diagram, Figure 2 is an operating time characteristic diagram, and Figures 3 and 4 are diagrams of other delay circuits of the present invention. A circuit diagram showing an embodiment, FIG. 5 shows a circuit diagram of a conventional delay circuit. 1...DC power supply, 1a...Positive pole, 1b...Negative pole, 2...Switch, 3...Capacitor, 4...
Second switching circuit, 4a...output, 5, 6
...Voltage dividing resistor, 7... Comparator, 8... Resistor, 9...
...Charging circuit, 10...Charging capacitor, 11...
... Current limiting resistor, 12, 13... Voltage dividing resistor, 14...
... Comparator, 15 ... Backflow prevention diode, 16
... Current limiting resistor, 17, 18... Voltage dividing resistor, 19
... Transistor, 20 ... Resistor, 21 ... Current-limiting resistor, 22 ... Charging capacitor, 23, 24
...Voltage dividing resistor, 25...Transistor, 26...
Current-limiting resistor, 27...Reverse current prevention diode, 2
8...Resistance, 29...Negation circuit, 30...Resistance,
31... Current-limiting resistor, 32... Charging capacitor, 33... Inverting circuit, 34... Current-limiting resistor, 3
5... Capacitor for backflow prevention, 36... Resistor.
Claims (1)
デンサ及び第2のコンデンサとを有し、前記第1
のコンデンサの一端の電圧がしきい値を越えると
反転して前記第2のコンデンサへの充電を停止す
る第1のスイツチング回路と、前記第1のスイツ
チング回路の前記反転動作により放電を開始する
第2のコンデンサの一端の電圧が、しきい値を下
回ると反転して出力をする第2のスイツチング回
路とを具備した遅延回路。1 having a first capacitor and a second capacitor that start charging when power is turned on;
a first switching circuit that inverts and stops charging the second capacitor when the voltage at one end of the capacitor exceeds a threshold; and a first switching circuit that starts discharging by the inverting operation of the first switching circuit. and a second switching circuit that inverts and outputs an output when the voltage at one end of the second capacitor falls below a threshold value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8279979A JPS567522A (en) | 1979-06-29 | 1979-06-29 | Delay circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8279979A JPS567522A (en) | 1979-06-29 | 1979-06-29 | Delay circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS567522A JPS567522A (en) | 1981-01-26 |
| JPS6349407B2 true JPS6349407B2 (en) | 1988-10-04 |
Family
ID=13784447
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8279979A Granted JPS567522A (en) | 1979-06-29 | 1979-06-29 | Delay circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS567522A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2519607B2 (en) * | 1991-02-08 | 1996-07-31 | 宣行 杉村 | High compression type accumulator |
-
1979
- 1979-06-29 JP JP8279979A patent/JPS567522A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS567522A (en) | 1981-01-26 |
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