JPS634948B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in packages for semiconductor devices, particularly semiconductor integrated circuit devices.

Fig. 1 is a perspective view showing a conventional package called a so-called dual in line (DIL) type. A rectangular parallelepiped package body made of moisture-resistant insulator, 3 is a plurality of legs (lead legs) connected to the required locations of the chip 1, and these legs are connected perpendicularly from both sides of the package body 2. It is pulled out in parallel and bent downward at a right angle at a predetermined position. Needless to say, the semiconductor integrated circuit chip 1 is configured to transmit and receive electrical signals to and from an external circuit via the legs 3. The legs 3 are generally arranged at the above pitch so that they can be mounted on a general-purpose printed circuit board with a 2.56 mm (1/10 inch) pitch pattern.

In the conventional package, the legs 3 are arranged in a row on both sides of the package body 2 as described above, so a multi-pin (multi-leg) package has the disadvantage that the external dimensions increase and the packaging density decreases. It was hot. Therefore, currently, plug-in type packages, flat type packages, leadless type packages, or DIL type packages with narrow leg pitches are generally used for multi-pin applications. However, plug-in type packages are difficult to mold and therefore costly. Flat-type packages and leadless-type packages are not only incompatible with normal 1/10 inch pitch printed circuit boards, but also require special techniques to mount them. Furthermore, DIL type packages with narrow leg pitches are of course not compatible with printed circuit boards with 1/10 inch pitch patterns.

This invention was made in view of the above-mentioned drawbacks of the conventional products. Each lead is pulled out diagonally in parallel from the side of the package cage, and adjacent leads are bent downward at different bending positions. By positioning the tips of the wires at the lattice points of a square lattice with a predetermined pitch, it is easy to mold and can be mounted on a general-purpose printed circuit board with holes drilled at the lattice points of a 1/10-inch pattern. The object of the present invention is to provide a package for a semiconductor device that is possible to achieve high packaging density.

FIG. 2 is a perspective view showing one embodiment of the present invention, and FIG. 3 is a plan view of this embodiment seen from above.
The same reference numerals as in the conventional example in the figure indicate equivalent parts, and the explanation thereof will be omitted. As shown in the figure, in this embodiment, each lead leg 3 is pulled out diagonally from both sides of the package body 2, and adjacent ones are alternately bent downward at different positions, so that the tips of the lead legs 3 are bent downwardly at different positions. It is arranged so as to be located on the intersection of the vertical and horizontal lines of the pitch d, which intersect perpendicularly with the adjacent sides of the pitch d.

FIG. 4 is a plan view showing another embodiment of the present invention. In the embodiment shown in FIG. Located at the point.

In the embodiments shown in FIGS. 2 and 3, the legs on both sides are pulled out diagonally in the same direction, but they may be pulled out diagonally in opposite directions.

As described above, in the package according to the present invention, each lead is pulled out diagonally and parallel to each other from the side surface of the package, and adjacent leads are bent at different bending positions and bent downward so that the ends thereof form a square with a predetermined pitch. Since the holes are located at the lattice points of the lattice, a multi-legged package can be realized without hindering moldability, and the mounting density can be increased. Implementation becomes extremely easy.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing a conventional DIL type package, FIG. 2 is a perspective view showing an embodiment of the present invention,
Figure 3 is a plan view of this embodiment as seen from the top;
The figure is a top plan view of another embodiment of the invention. In the figure, 1 is a semiconductor chip, 2 is a package body, and 3 is a leg (lead leg). In addition,
The same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A semiconductor chip and a plurality of lead legs arranged parallel to each other in the vicinity thereof are sealed with resin in the shape of a rectangular parallelepiped, and the exposed portions of each lead leg are bent downward at a right angle at a predetermined position. In a semiconductor device package formed by bending the lead leg, the lead leg is pulled out from the side surface of the rectangular parallelepiped in a plane parallel to the bottom of the rectangular parallelepiped and in a direction inclined with respect to a predetermined bottom of the rectangular parallelepiped, and the bending position is Adjacent ones are different from each other, and the tips of at least the two lead legs are located at lattice points of a square lattice of a predetermined pitch on a straight line perpendicular to the side surface of the rectangular parallelepiped. Packages for semiconductor devices. 2. The semiconductor device package according to claim 1, wherein the lead leg portions are drawn out from both sides of the package body. 3. The package for a semiconductor device according to claim 1, wherein the lead legs are drawn out from four sides of the package body.