JPS634962B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a current mirror circuit used in a current coupling circuit in an electronic circuit.

A conventional general current mirror circuit is constructed as shown in FIG. In the circuit shown in FIG. 1, the ratio between the current I ₁ flowing through the input constant current source 1 and the current I ₂ flowing through the output load 2, that is, the current mirror ratio, is expressed as I ₂ /I ₁ . At this time, the current I ₂ is the transistor
When transistors with the same characteristics are used for T _r1 and T _r2 , the following equation is obtained.

I ₂ = I ₁ - (Base current of output side transistor T _r2 ) x 2 Therefore, the difference between the currents I ₁ and I ₂ is the base current (I _B )
There was a drawback that the current mirror ratio was not 1. A current mirror circuit having the configuration shown in FIG. 2 has improved this problem. In the circuit shown in Fig. 2, when transistors with the same characteristics are used, the current flowing through the input side constant current source 1 is I ₁
The difference between the current I 2 and the current flowing through the output load ₂ is 2I _b /h _fe (where h _fe is the current amplification factor), so the error in the mirror ratio is improved compared to the current mirror circuit shown in Figure 1. , error in collector current due to early voltage of output side transistor (V _CE /V _A ) I ₂ (however,
The disadvantage was that V _A was the early voltage of the output transistor, and V _CE was the voltage between the emitter and collector of the output transistor. Furthermore, the conventional current mirror circuit shown in Figure 3 has compensation for the base current and compensation for the early voltage in order to improve mirror ratio errors, but it only has one current mirror output. There were flaws.

The present invention provides a current mirror circuit having input and N output transistors whose bases are connected to each other, in which the emitter of a first transistor is connected to the collector of the input transistor, and N
The emitters of the N transistors are connected to the collectors of the respective output transistors, and the bases of the first and N transistors are connected at a first connection point, and the base of the input transistor and the base of the N transistors are connected at a first connection point. The bases of N output side transistors are connected at a second connection point, and the first and second
a multi-emitter transistor that allows the base currents of the first and N transistors to flow between the connection point of and the collector of the first transistor, as well as the base currents of the input side and the N output side transistors; By connecting a diode to the second connection point, a current mirror circuit is provided which has multiple outputs and can reduce mirror ratio errors.

The present invention will be described below with reference to embodiments shown in the drawings.

FIG. 4 is a circuit diagram showing one embodiment of the present invention. Input side transistor T _r1 , output side transistor T _r2 , T _r3 , transistors T _r4 , T _r5 , T _r6 connected to respective collectors of the input side transistor and output side transistor, T _r4 , T _r5 , T _r6 Also, a multi-emitter transistor T _rM that supplies base current to T _r1 , T _r2 , and T _r3 , and a diode Di connected between one emitter of T _rM and the bases of transistors T _r1 , T _r2 , and T _r3 . , and constitutes a two-output current mirror circuit including resistors R ₁ , R ₂ , and R ₃ connected to the respective emitters of transistors T _r1 , T _r2 , and T _r3 .

The transistor T _rM is a transistor for compensating for errors in mirror ratio due to base current. Input current when each transistor has the same characteristics
The difference between I ₁ and output current I ₂ is as shown in the following equation.

3I _b /h _fe +3I _E −I _b /h _fe ² ≈6I _b /h _fe Therefore, the error in the mirror ratio due to the base current has been improved. Transistors T _r1 , T _r2 and T _r3 are
They supply input current and output current, respectively. Transistors T _r5 and T _r6 are transistors T _r2 and T _r3
By reducing the voltage between the emitter and collector of , the influence of the Early voltage on the mirror ratio error is reduced. Transistor T _r4 and diode Di
prevents transistors T _r1 , T _r2 , and T _r3 from becoming saturated. Resistors R ₁ , R ₂ , R ₃ are transistors
This reduces the influence of errors in the mirror ratio of the current mirror due to variations in V _BE of T _r1 , T _r2 , and T _r3 .

In Fig. 4, the transistor T _rM is the current source 1
The base current flows and turns on, turning on transistor T _rM , which turns on transistors T _r1 , T _r2 ,
Base current flows in T _r3 , T _r4 , T _r5 , and T _r6 as well, turning them on. At this time, if the h _fe of the transistor T _rM is selected to be large, the input current I ₁ can be changed to the transistor T _r1 ,
The current does not flow into the bases of T _r2 , T _r3 , T _r4 , T _r5 , and T _r6 , and the ratio of the input current I ₁ to the output currents I ₂ and I ₃ , that is, the mirror ratio, can be reliably maintained. Also,
Since the emitter-collector voltage of the output transistor T _r3 is kept small by the transistor T _r6 , the error in the mirror ratio due to the early voltage of the output transistor is kept small.

FIG. 5 is a circuit diagram of a second embodiment of the current mirror of the present invention. In this figure, the same components as in FIG. 4 are given the same reference numerals. In this second embodiment, 2N transistors T _r21 , ..., T _r2N , T _r51 , ..., T _r5N are connected as output side transistors to form a current mirror having N outputs. There is. The operation and configuration are the same as in the first embodiment.

In the above embodiment, the transistor used is
Although NPN type transistors are used, it goes without saying that similar effects can be obtained using PNP type transistors.

As explained above, the present invention provides a current mirror circuit having an input transistor and N output transistors whose bases are connected to each other, in which the emitter of a first transistor is connected to the collector of the input transistor, and the N transistors are connected to each other. The emitters of the N transistors are connected to the respective collectors of the output side transistors, and the bases of the first and N transistors are connected at a first connection point, and the base of the input side transistor and the The bases of the N output side transistors are connected at a second connection point, and the first and N transistors are connected between the first and second connection points and the collector of the first transistor. Multi-emitter transistors that flow the base current and the base currents of the input side and N output side transistors are connected to the second connection point with a diode in between, thereby achieving multiple outputs and a mirror ratio. A current mirror circuit with small errors can be realized.

[Brief explanation of the drawing]

1, 2, and 3 are diagrams showing conventional current mirror circuits, FIG. 4 is a circuit diagram showing an embodiment of the current mirror circuit of the present invention, and FIG. 5 is a circuit diagram of a current mirror circuit of the present invention. FIG. 3 is a circuit diagram showing another example of the circuit. T _r1 ...Input side transistor, T _r2 , T _r3 , T _r21
~T _r2N ...Output side transistor, T _rM ...Multi-emitter transistor, T _r4 , T _r5 , T _r6 , T _r51 ...
T _r5N ...Transistor, R ₁ , R ₂ , R ₃ , R ₂₁ ~ _{R 2N}
...Resistance, Di...Diode, 1...Constant current source,
2~N+1...Load.

Claims (1)

[Claims] 1. In a current mirror circuit having an input side and N output side transistors whose bases are connected to each other, a first transistor is connected to the collector of the input side transistor.
The emitters of the N transistors are connected to the respective collectors of the N output transistors, and the emitters of the N transistors are connected to the collectors of the N output transistors.
The bases of the N transistors are connected at a first connection point, and the bases of the input side transistors and the bases of the N output side transistors are connected at a second connection point. 2 and the collector of the first transistor.
and multi-emitter transistors that flow the base currents of the N transistors and the base currents of the input side and the N output side transistors, and are connected to each other by sandwiching a diode at the second connection point. A current mirror circuit featuring: