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JPS6350936B2 - - Google Patents
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JPS6350936B2 - - Google Patents

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Publication number
JPS6350936B2
JPS6350936B2 JP56194819A JP19481981A JPS6350936B2 JP S6350936 B2 JPS6350936 B2 JP S6350936B2 JP 56194819 A JP56194819 A JP 56194819A JP 19481981 A JP19481981 A JP 19481981A JP S6350936 B2 JPS6350936 B2 JP S6350936B2
Authority
JP
Japan
Prior art keywords
output
current
relay
timer circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56194819A
Other languages
Japanese (ja)
Other versions
JPS5895929A (en
Inventor
Takaaki Kai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Electric Manufacturing Co Ltd
Priority to JP56194819A priority Critical patent/JPS5895929A/en
Publication of JPS5895929A publication Critical patent/JPS5895929A/en
Publication of JPS6350936B2 publication Critical patent/JPS6350936B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Emergency Protection Circuit Devices (AREA)

Description

【発明の詳細な説明】 この発明は母線保護継電装置に関する。[Detailed description of the invention] The present invention relates to a busbar protection relay device.

母線保護継電装置の1つに電流差動継電方式が
ある。この方式は第1図に示すように、母線
BUSに接続されている。複数の線路L1〜L6に変
流器CT1〜CT6を設け、変流器CT1〜CT6の2次
側の一端は共通接続され、この共通接続点に電流
差動継電器の動作コイルOCの一端を、その他端
には複数の抑制コイルRC1〜RC6の各一端が接続
され、これら抑制コイルRC1〜RC6の他端は変流
器CT1〜CT6の2次側の他端に各別に接続されて
構成されている。このように構成された方式の判
定式は周知のように次式となる。
One of the bus bar protection relay devices is a current differential relay system. As shown in Figure 1, this method
Connected to BUS. Current transformers CT 1 to CT 6 are provided on multiple lines L 1 to L 6 , one end of the secondary side of the current transformers CT 1 to CT 6 is commonly connected, and the operation of the current differential relay is connected to this common connection point. One end of the coil OC is connected to one end, and one end of each of a plurality of suppression coils RC 1 to RC 6 is connected to the other end, and the other ends of the suppression coils RC 1 to RC 6 are connected to the secondary sides of the current transformers CT 1 to CT 6 . They are connected to each other separately at the other end. As is well known, the determination formula for the system configured as described above is as follows.

ΣIi−KΣ|Ii|>0 但し、ΣIi…動作量、Σ|Ii|…抑制量、K…
抑制率 上記判定式が満足されているときには継電器は
動作しない。ここで、線路L2に故障(外部事故)
が発生し、事故電流IFが線路L2に流れる。この電
流IFは大電流であるため、変流器CT2は磁気飽和
してしまう。すると、みかけ上電流差動継電器に
差電流(動作量)が生じて、継電器が誤動作して
しまうおそれがある。このため、従来変流器の飽
和による誤動作の対策として電圧差動継電方式を
用いる手段がある。しかし、この方式では下記の
ような欠点があるので、電流差動継電方式が採用
されている。
ΣIi−KΣ|Ii|>0 However, ΣIi...Amount of movement, Σ|Ii|...Amount of suppression, K...
Suppression rate When the above judgment formula is satisfied, the relay does not operate. Here, there is a failure on track L 2 (external accident)
occurs, and fault current I F flows to line L2 . Since this current I F is a large current, the current transformer CT 2 becomes magnetically saturated. Then, a difference current (operation amount) is generated in the apparent current differential relay, which may cause the relay to malfunction. For this reason, there is a conventional method of using a voltage differential relay system as a countermeasure against malfunctions due to saturation of current transformers. However, this method has the following drawbacks, so a current differential relay method has been adopted.

(1) 変流器特性はすべて同一でなければならな
い。
(1) All current transformer characteristics must be the same.

(2) 変流器2次ケーブルの抵抗値に制限がある。(2) There is a limit to the resistance value of the current transformer secondary cable.

(3) 変流器2次回路の絶縁強化をしなければなら
ない。
(3) The insulation of the current transformer secondary circuit must be reinforced.

この発明は上記の事情に鑑みてなされたもの
で、外部事故時には差動継電器を動作させないよ
うにした母線保護継電装置を提供することを目的
とする。
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a busbar protection relay device that prevents the differential relay from operating in the event of an external accident.

以下図面を参照してこの発明の一実施例を説明
する。
An embodiment of the present invention will be described below with reference to the drawings.

第2図において、10は電流差動継電器で、こ
の継電器10は前述した判定式をもつたものであ
る。11は高感度の過電流継電器で、この継電器
11は第1図に示した線路L1〜L6のスカラー和
電流値がある一定値以上になると動作されるもの
である。すなわち、過電流継電器11は抑制量の
立ち上がりを検出し、これの検出出力をタイマー
回路12に与えてタイマー回路12を始動させ
る。このタイマー回路12には前記電流差動継電
器10の動作出力が与えられる。この動作出力が
タイマー回路12に与えられると、タイマー回路
12はリセツトされる。しかし、このリセツトさ
れる条件としては次の2つがある。第1は過電流
継電器11が検出した抑制量の立ち上がりから1
サイクル以上経過してタイマー回路12に動作出
力を与えたときにはタイマー回路12はリセツト
されないでタイマー出力を送出し続け、動作出力
が消滅されるとタイマー回路12はリセツトされ
る。第2は前記抑制量の立ち上がりから1サイク
ル以内のときにタイマー回路12に動作出力が与
えられたときにはタイマー回路12はリセツトさ
れる。前記電流差動継電器10の動作出力はイン
ヒビツト回路13の第1入力端に与えられ、タイ
マー回路12の出力はインヒビツト回路13のイ
ンヒビツトの第2入力端に与えられる。このイン
ヒビツト回路13は第1入力端に入力があり、第
2入力端に入力がないときに、出力端にトリツプ
指令を送出する。
In FIG. 2, 10 is a current differential relay, and this relay 10 has the above-mentioned determination formula. 11 is a highly sensitive overcurrent relay, and this relay 11 is activated when the scalar sum current value of the lines L 1 to L 6 shown in FIG. 1 exceeds a certain value. That is, the overcurrent relay 11 detects the rise of the suppression amount, and supplies the detected output to the timer circuit 12 to start the timer circuit 12. The operating output of the current differential relay 10 is applied to this timer circuit 12 . When this operational output is given to the timer circuit 12, the timer circuit 12 is reset. However, there are two conditions for this reset: The first is 1 from the rise of the suppression amount detected by the overcurrent relay 11.
When the operation output is given to the timer circuit 12 after more than one cycle has elapsed, the timer circuit 12 is not reset and continues to send out the timer output, and when the operation output disappears, the timer circuit 12 is reset. Second, when the operational output is given to the timer circuit 12 within one cycle from the rise of the suppression amount, the timer circuit 12 is reset. The operating output of the current differential relay 10 is applied to a first input of an inhibit circuit 13, and the output of the timer circuit 12 is applied to a second input of the inhibit circuit 13. This inhibit circuit 13 has an input at its first input terminal, and sends a trip command to its output terminal when there is no input at its second input terminal.

上記のように構成された実施例において、ま
ず、変流器の飽和について述べるに、変流器の飽
和はその第1次側電流が大きくなるにつれて変流
器の端子電圧が増加することから徐々に発生され
る。従つて、外部事故の際の変流器の飽和は事故
時の電流の立ち上がりから1サイクル〜数サイク
ル後に生じる。すなわち、動作量は抑制量に比較
して約1サイクル遅れて立ち上がることが知られ
ている。一方、内部事故時は動作量と抑制量は同
時に立ち上がることも知られている。
In the embodiment configured as described above, first, the saturation of the current transformer will be described. Saturation of the current transformer gradually occurs because the terminal voltage of the current transformer increases as the primary current increases. occurs in Therefore, saturation of the current transformer in the event of an external fault occurs one to several cycles after the rise of the current at the time of the fault. That is, it is known that the operating amount rises approximately one cycle later than the suppressing amount. On the other hand, it is also known that in the event of an internal accident, the amount of operation and the amount of suppression rise simultaneously.

上述の理由を利用して以下実施例の動作につい
て述べる。外部事故時には電流差動継電器10の
動作コイルOCに流れる電流は第3図Aに示すよ
うな、又抑制コイルOCには第3図Bに示すよう
な電流が流れる。一方、過電流継電器11は前述
のように抑制量の立ち上がりを検出するので、そ
の出力は第3図Dに示すような時間に現われる。
この出力がタイマー回路12に与えられるとタイ
マー回路11は始動され、その出力端には第3図
Eのような出力波形となつて現われる。前記電流
差動継電器10の動作出力は第3図Cのように抑
制量から1サイクル遅れて現われるため、タイマ
ー回路12はリセツトされないでそのまま出力を
送出し続けられ、インヒビツト回路13の第2入
力端に与えられる。このインヒビツト回路13の
第1入力端には継電器10の動作出力が与えられ
るが、その回路13の出力にトリツプ指令は送出
されない。(第3図F)従つて、外部事故が発生
した際に誤動作を生じない。
The operation of the embodiment will be described below using the above-mentioned reasons. In the event of an external fault, a current flows through the operating coil OC of the current differential relay 10 as shown in FIG. 3A, and a current as shown in FIG. 3B flows through the suppression coil OC. On the other hand, since the overcurrent relay 11 detects the rise of the suppression amount as described above, its output appears at the time shown in FIG. 3D.
When this output is given to the timer circuit 12, the timer circuit 11 is started, and an output waveform as shown in FIG. 3E appears at its output terminal. Since the operating output of the current differential relay 10 appears with a delay of one cycle from the amount of inhibition as shown in FIG. given to. The operating output of the relay 10 is applied to the first input terminal of the inhibit circuit 13, but no trip command is sent to the output of the circuit 13. (Fig. 3F) Therefore, no malfunction occurs when an external accident occurs.

一方、内部事故(第1図に示す母線に事故があ
るとき)のときに電流差動継電器10の動作及び
抑制コイルには第4図A,Bに示すような電流が
流れる。一方、過電流継電器11の出力は第4図
Dに示す時間に現われ、タイマー回路12は始動
される。又、電流差動継電器10の動作出力は抑
制量から1サイクル以内、すなわち第4図Cに示
すように現われるからタイマー回路12はリセツ
トされ、その出力は第4図Eのように消滅され
る。従つて、インヒビツト回路13の出力にはト
リツプ指令が送出される。(第4図F) 第5図はこの発明の他の実施例であり、変流器
CT1〜CT6の出力を電流・電圧変換器I/Vに入
力する。これら電流・電圧変換器I/Vの各出力
はサンプリングホールド回路S/Hを介してマル
チプレクサーMPXに入力される。このマルチプ
レクサーMPXの出力はアナログ・デジタル変換
器A/Dを介して中央処理装置CPUに入力され、
この中央処理装置CPUで入力された信号を演算
処理して前記実施例と同様に外部事故のときには
トリツプ指令を送出させないようにし、内部事故
のときにはトリツプ指令を送出させるようにす
る。なお、図中、BUSは母線、L1〜L6は線路で
ある。
On the other hand, in the event of an internal fault (when there is a fault on the bus shown in FIG. 1), currents as shown in FIGS. 4A and 4B flow through the operation and suppression coils of the current differential relay 10. On the other hand, the output of overcurrent relay 11 appears at the time shown in FIG. 4D, and timer circuit 12 is started. Also, since the operating output of the current differential relay 10 appears within one cycle from the amount of suppression, ie, as shown in FIG. 4C, the timer circuit 12 is reset and its output disappears as shown in FIG. 4E. Therefore, a trip command is sent to the output of the inhibit circuit 13. (Fig. 4F) Fig. 5 shows another embodiment of the present invention, in which a current transformer
The outputs of CT 1 to CT 6 are input to the current/voltage converter I/V. Each output of these current/voltage converters I/V is input to a multiplexer MPX via a sampling hold circuit S/H. The output of this multiplexer MPX is input to the central processing unit CPU via the analog-to-digital converter A/D.
The central processing unit CPU processes the input signals to prevent the trip command from being sent out in the case of an external accident, and to send out the trip command in the case of an internal accident, as in the previous embodiment. In addition, in the figure, BUS is a bus bar, and L 1 to L 6 are lines.

以上述べたようにこの発明によれば、変流器の
出力が入力される電流差動継電器及び抑制量の立
ち上がりを検出する過電流継電器を設け、抑制量
の立ち上がりより1サイクル以上遅れて電流差動
継電器の動作出力が生じたときにはタイマー回路
の出力を保持させ、1サイクル以内のときにはタ
イマー回路をリセツトさせ、前者の出力保持のと
きにはトリツプ指令を送出させないで、後者のリ
セツト時にトリツプ指令を送出させるようにした
ので、外部事故による大電流によつて変流器が飽
和しても誤動作させないようにし、しかも内部事
故時には確実に検出して母線保護を可能するとと
もに電流差動継電方式の利点を損うことなく変流
器の飽和対策ができる利点がある。
As described above, according to the present invention, a current differential relay to which the output of the current transformer is input and an overcurrent relay that detects the rise of the suppression amount are provided, and the current difference When the operating output of the dynamic relay occurs, the output of the timer circuit is held, and when it is within one cycle, the timer circuit is reset, and when the former output is held, the trip command is not sent, but when the latter is reset, the trip command is sent. This prevents the current transformer from malfunctioning even if it becomes saturated due to a large current caused by an external fault.In addition, in the event of an internal fault, it is reliably detected and the bus bar can be protected, and the advantages of the current differential relay system can be utilized. This has the advantage of being able to take measures against current transformer saturation without causing damage.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は電流差動継電方式の回路図、第2図は
この発明の一実施例を示すブロツク図、第3図A
から第3図F及び第4図Aから第4図Fは第2図
の作用を説明するための波形図、第5図はこの発
明の他の実施例を示すブロツク図である。 L1からL6……線路、BUS……母線、CT1から
CT6……変流器、10……電流差動継電器、11
……過電流継電器、12……タイマー回路、13
……インヒビツト回路(出力回路)。
Figure 1 is a circuit diagram of the current differential relay system, Figure 2 is a block diagram showing an embodiment of the present invention, and Figure 3A.
3F and 4A to 4F are waveform diagrams for explaining the operation of FIG. 2, and FIG. 5 is a block diagram showing another embodiment of the present invention. L 1 to L 6 ...Line, BUS...Bus bar, from CT 1
CT 6 ...Current transformer, 10...Current differential relay, 11
...Overcurrent relay, 12...Timer circuit, 13
...Inhibit circuit (output circuit).

Claims (1)

【特許請求の範囲】[Claims] 1 複数の線路に各別に設けられた変流器と、こ
れら変流器の出力が入力される電流差動継電器及
び抑制量の立ち上がりを検出する過電流継電器
と、この過電流継電器の出力により作動が開始さ
れ、抑制量の立ち上がりより数サイクル以上遅れ
て電流差動継電器が動作出力を送出したときには
出力が保持され、その動作出力が数サイクル以内
のときにはリセツトされるタイマー回路と、この
タイマー回路の出力と前記電流差動継電器の出力
が入力され、タイマー回路から保持出力が送出さ
れているときには、トリツプ指令を送出せず、タ
イマー回路から出力が送出されてないときにはト
リツプ指令を送出する出力回路とを備えてなる母
線保護継電装置。
1 A current transformer installed separately on multiple lines, a current differential relay into which the output of these current transformers is input, an overcurrent relay that detects the rise of the suppression amount, and an overcurrent relay that is activated by the output of this overcurrent relay. is started, and when the current differential relay sends an operating output with a delay of several cycles or more after the rise of the suppression amount, the output is held, and when the operating output is within a few cycles, the output is reset. When the output and the output of the current differential relay are input, and the holding output is being sent out from the timer circuit, the trip command is not sent out, and when the timer circuit is not sending out the output, the output circuit is configured to send out the trip command. A busbar protection relay device equipped with
JP56194819A 1981-12-03 1981-12-03 Bus protecting relay unit Granted JPS5895929A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56194819A JPS5895929A (en) 1981-12-03 1981-12-03 Bus protecting relay unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56194819A JPS5895929A (en) 1981-12-03 1981-12-03 Bus protecting relay unit

Publications (2)

Publication Number Publication Date
JPS5895929A JPS5895929A (en) 1983-06-07
JPS6350936B2 true JPS6350936B2 (en) 1988-10-12

Family

ID=16330778

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56194819A Granted JPS5895929A (en) 1981-12-03 1981-12-03 Bus protecting relay unit

Country Status (1)

Country Link
JP (1) JPS5895929A (en)

Also Published As

Publication number Publication date
JPS5895929A (en) 1983-06-07

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