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JPS6351541B2 - - Google Patents
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JPS6351541B2 - - Google Patents

Info

Publication number
JPS6351541B2
JPS6351541B2 JP57148545A JP14854582A JPS6351541B2 JP S6351541 B2 JPS6351541 B2 JP S6351541B2 JP 57148545 A JP57148545 A JP 57148545A JP 14854582 A JP14854582 A JP 14854582A JP S6351541 B2 JPS6351541 B2 JP S6351541B2
Authority
JP
Japan
Prior art keywords
plate
shaped portion
rod
lead wire
shaped
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57148545A
Other languages
Japanese (ja)
Other versions
JPS5939055A (en
Inventor
Shigemi Ono
Shigeo Shimada
Shinichiro Kawabuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP57148545A priority Critical patent/JPS5939055A/en
Publication of JPS5939055A publication Critical patent/JPS5939055A/en
Publication of JPS6351541B2 publication Critical patent/JPS6351541B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • H05K3/3426Leaded components characterised by the leads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/076Connecting or disconnecting of strap connectors
    • H10W72/07651Connecting or disconnecting of strap connectors characterised by changes in properties of the strap connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • H10W72/352Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/60Strap connectors, e.g. thick copper clips for grounding of power devices

Landscapes

  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 本発明は自動車用の半導体整流素子等の半導体
装置の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device such as a semiconductor rectifier for an automobile.

第1図に示す従来の自動車の交流発電機用の整
流素子は、金属容器1の中にダイオードチツプ2
を固着すると共に内部リード線3を接着し、蓋4
を容器1に固着すると共に、蓋4に一体化されて
いる外部リード線5に内部リード線3を結合する
ことによつて構成されている。この種のキヤン封
止型の整流素子は、信頼性及び電気的特性の点で
優れているが、軽量化、低コスト化を図ることが
困難であるため、最近では第2図に示すモールド
型の整流素子が使用されるようになつた。第2図
の整流素子は凹状金属基体6とリード線7との間
にダイオードチツプ8を半田で固着し、シリコー
ンワニス等のジヤンクシヨン・コーテイング・レ
ジン(JCR)による薄い内部被覆層9を設け、し
かる後、シリコーンラバー等の外部被覆層10を
設けたものである。このため、第1図の蓋4に相
当するものが不要となり、軽量化、低コスト化が
可能になる。
The conventional rectifying element for an automobile alternator shown in FIG.
At the same time, the internal lead wire 3 is glued, and the lid 4 is fixed.
is fixed to the container 1, and the internal lead wire 3 is connected to the external lead wire 5 integrated with the lid 4. This type of can-sealed rectifier is excellent in terms of reliability and electrical characteristics, but it is difficult to reduce weight and cost, so recently molded rectifiers as shown in Figure 2 have been used. rectifying elements came into use. In the rectifying element shown in FIG. 2, a diode chip 8 is fixed with solder between a concave metal base 6 and a lead wire 7, and a thin inner coating layer 9 of junction coating resin (JCR) such as silicone varnish is provided. After that, an outer coating layer 10 of silicone rubber or the like is provided. Therefore, there is no need for anything equivalent to the lid 4 in FIG. 1, making it possible to reduce weight and cost.

ところが、リード線7の先端が丸棒であるため
に、大きな接着強度と小さな電気的抵抗とを有す
る接続が困難であつた。この種の問題を解決する
ために、リード線7として第1図の外部リード線
5のように先端を平坦にプレスしたものを使用す
ることが考えられる。しかし、第2図のリード線
7の先端に平坦部分を設けると、リード線の取扱
いが面倒になつたり、治具の形状が複雑になり、
組み立ての作業性が悪くなる。また、第2図に示
すように整流素子を組み立てた後に、リード線7
の先端をプレスすることが考えられるが、組み立
てた後に単にプレスすると、外部被覆層10、チ
ツプ8等に不必要な力が作用し、特性が劣化する
恐れがあつた。
However, since the tip of the lead wire 7 is a round bar, it has been difficult to make a connection with high adhesive strength and low electrical resistance. In order to solve this kind of problem, it is conceivable to use a lead wire 7 whose tip is pressed flat like the external lead wire 5 shown in FIG. 1. However, if a flat portion is provided at the tip of the lead wire 7 shown in FIG. 2, handling of the lead wire becomes troublesome and the shape of the jig becomes complicated.
Assembling workability deteriorates. Also, as shown in Figure 2, after assembling the rectifier, the lead wire 7
It is conceivable to press the tip of the chip, but if it is simply pressed after assembly, unnecessary force will be applied to the outer coating layer 10, the chip 8, etc., and there is a risk that the characteristics will deteriorate.

そこで、本発明の目的は、外部接続を確実且つ
容易に行うことが可能な半導体装置を作業性良く
且つ特性の劣化を防いで製造する方法を提供する
ことにある。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method for manufacturing a semiconductor device that allows external connections to be made reliably and easily, with good workability, and while preventing deterioration of characteristics.

上記目的を達成するための本発明は、ヘツダ部
分と第1の棒状部分と第1の板状部分と第2の棒
状部分とを順次に有するリード線を用意し、この
リード線の前記ヘツダ部分と金属基体との間に半
導体チツプを接着する工程と、前記第1の板状部
分の半分以上が外部に露出するように前記半導体
チツプ及び前記リード線の一部を絶縁物にて被覆
する工程と、しかる後、前記第2の棒状部分の内
の外部接続端子を形成すべき部分をプレスして第
2の板状部分を形成する工程とを有することを特
徴とする半導体装置の製造方法に係わるものであ
る。
To achieve the above object, the present invention provides a lead wire having a header portion, a first rod-like portion, a first plate-like portion, and a second rod-like portion in this order, and the header portion of the lead wire. a step of adhering a semiconductor chip between the first plate-shaped portion and a metal substrate; and a step of covering a portion of the semiconductor chip and the lead wire with an insulating material so that more than half of the first plate-shaped portion is exposed to the outside. and, thereafter, pressing a portion of the second bar-shaped portion where an external connection terminal is to be formed to form a second plate-shaped portion. It is related.

上記発明によれば次の作用効果が得られる。 According to the above invention, the following effects can be obtained.

(イ) リード線の外部接続端子を形成すべき部分が
組み立ての最後の段階まで棒状に保たれるの
で、リード線の取扱いが容易で作業性が良い。
(a) Since the part of the lead wire that should form the external connection terminal is kept in a rod shape until the final stage of assembly, the lead wire is easy to handle and workability is good.

(ロ) 第1の板状部分の半分以上を被覆絶縁物から
露出させるので、この第1の板状部分が第2の
板状部分をプレスで形成する際の衝撃緩和作用
を発揮し、チツプ及びその周辺に衝撃が加わる
のが阻止される。従つて、特性劣化を防止する
ことが出来る。
(b) Since more than half of the first plate-like part is exposed from the covering insulator, this first plate-like part exerts a shock-reducing effect when the second plate-like part is formed by pressing, and the chip This prevents impact from being applied to the area and its surroundings. Therefore, characteristic deterioration can be prevented.

次に、第3図〜第11図を参照して本発明の実
施例について述べる。
Next, embodiments of the present invention will be described with reference to FIGS. 3 to 11.

まず、第3図及び第4図に示す如く、ヘツダ部
分11と第1の棒状部分12と第1の板状部分1
3と第2の棒状部分14とを有するNiメツキ被
覆Cu材のリード線15を用意する。このリード
線15の棒状部分12,14は直径1.5mmの断面
円形の丸棒であり、板状部分13は厚さ0.2mmに
プレスされ且つ主面が互に対向するようにU字状
に屈曲された部分である。
First, as shown in FIGS. 3 and 4, a header portion 11, a first rod-shaped portion 12, and a first plate-shaped portion 1
A lead wire 15 made of a Cu material coated with Ni plating and having a second rod-shaped portion 14 is prepared. The rod-shaped parts 12 and 14 of this lead wire 15 are round bars with a circular cross section of 1.5 mm in diameter, and the plate-shaped part 13 is pressed to a thickness of 0.2 mm and bent into a U-shape so that the main surfaces face each other. This is the part that was

次に、第5図に示す如く、Niメツキ被覆Cu材
の凹状金属ケース即ち金属基体16上に、下部半
田片17、ダイオードチツプ18、上部半田片1
9、及びリード線15を順次に組込み、これを窒
素ガスを流した炉中で加熱することにより、第6
図に示す如くヘツダ部分11と金属基体16との
間にチツプ18を半田接着する。尚この組込み及
び半田接着時には第6図にその一部のみ示すよう
な治具20を使用し、金属基体16とチツプ18
とリード線15とを所定の位置関係に保つ。
Next, as shown in FIG. 5, a lower solder piece 17, a diode chip 18, and an upper solder piece 1 are placed on a concave metal case or metal base 16 made of Ni-plated Cu material.
The sixth
As shown in the figure, a chip 18 is soldered and bonded between the header portion 11 and the metal base 16. When assembling and soldering, a jig 20, only a part of which is shown in FIG.
and the lead wire 15 in a predetermined positional relationship.

次に、第7図に示す如くJCRとしてシリコーン
ワニス等をチツプ18の表面に塗布し、内部被覆
層21を設け、更にシリコーンラバー材を充填す
ることにより、絶縁物からなる外部被覆層22を
形成する。この外部被覆層22は少なくとも内部
被覆層21、ヘツダ部分11及び第1の棒状部分
12の一部は覆うが、第1の板状部分13の半分
以上は露出させるように設ける。
Next, as shown in FIG. 7, a silicone varnish or the like is applied as JCR to the surface of the chip 18 to form an inner coating layer 21, and a silicone rubber material is further filled to form an outer coating layer 22 made of an insulating material. do. The outer coating layer 22 covers at least a portion of the inner coating layer 21, the header portion 11, and the first rod-shaped portion 12, but is provided so that more than half of the first plate-shaped portion 13 is exposed.

次に、第1の棒状部分14の先端部分を第1の
板状部分13と同一方向にプレスすることによつ
て第8図の正面図及び第9図の側面図に示す如く
厚さ0.3mmの第2の板状部分23を形成し、引き
続きプレスによる打ち抜きで第10図に示す如く
U字状切欠部24を形成し、更に第2の板状部分
23を溶融半田浴又はすず浴に浸漬して表面被膜
を形成する。この第2の板状部分23は加工硬化
によつて硬さが増し、0.3mm程度の厚さでも端子
として十分な強度を有する。尚、第2の板状部分
23の表面積が同じ長さの棒状部分14の表面積
の1.2倍以上、より好ましくは1.5倍以上となるよ
うにプレスすることが望ましい。
Next, by pressing the tip of the first rod-shaped portion 14 in the same direction as the first plate-shaped portion 13, the thickness is 0.3 mm as shown in the front view of FIG. 8 and the side view of FIG. A second plate-shaped portion 23 is formed, followed by punching with a press to form a U-shaped notch 24 as shown in FIG. 10, and the second plate-shaped portion 23 is immersed in a molten solder bath or a tin bath. to form a surface film. This second plate-shaped portion 23 has increased hardness through work hardening, and has sufficient strength as a terminal even with a thickness of about 0.3 mm. Note that it is desirable to press so that the surface area of the second plate-like portion 23 is 1.2 times or more, more preferably 1.5 times or more, the surface area of the rod-like portion 14 of the same length.

第10図に示す整流素子25を使用して全波整
流回路を形成する際には、第11図に示す如く、
一方の金属基体26に一方の極性の整流素子25
を固着すると共に、他方の金属基体27に整流素
子25と逆の極性の整流素子25aを固着し、一
対の整流素子25aを対向させ、夫々の第2の板
状部分23を重ね合せて半田等により固着させ
る。
When forming a full-wave rectifier circuit using the rectifying element 25 shown in FIG. 10, as shown in FIG.
One polarity rectifying element 25 on one metal base 26
At the same time, a rectifying element 25a having a polarity opposite to that of the rectifying element 25 is fixed to the other metal base 27, and the pair of rectifying elements 25a are made to face each other. to fix it.

本実施例によれば次の作用効果が得られる。 According to this embodiment, the following effects can be obtained.

(a) 組立ての最後の段階を除いてリード線15の
先端部分が棒状に保たれるので、リード線15
の取り扱いが容易である。また、治具20を使
用してリード線15を位置決めする場合に、治
具20の形状が複雑にならず、且つ組込みも容
易である。従つて整流素子を作業性良く製造す
ることが出来る。
(a) Since the tip of the lead wire 15 is kept in a rod shape except at the final stage of assembly, the lead wire 15
Easy to handle. Furthermore, when positioning the lead wire 15 using the jig 20, the jig 20 does not have a complicated shape and is easy to assemble. Therefore, the rectifying element can be manufactured with good workability.

(b) 第1の板状部分13を外部被覆層10から半
分以上露出させるので、第2の板状部分23を
プレスで形成する際に、第1の板状部分13が
衝撃緩和作用を発揮し、チツプ18等に対する
衝撃が少なくなり、特性劣化が防止される。こ
の際、第2の板状部分23の厚さ方向が第1の
板状部分13の厚さ方向と一致するようにプレ
スされるので、緩和作用が一層効果的に生じ
る。
(b) Since more than half of the first plate-shaped portion 13 is exposed from the outer coating layer 10, the first plate-shaped portion 13 exerts a shock-reducing effect when forming the second plate-shaped portion 23 by pressing. However, the impact on the chip 18 etc. is reduced and characteristic deterioration is prevented. At this time, since the second plate-like portion 23 is pressed so that its thickness direction coincides with the thickness direction of the first plate-like portion 13, the relaxation effect occurs more effectively.

(c) 第2の板状部分23の厚さ方向が第1の板状
部分13の厚さ方向に一致しているので、第1
1図に示すように、一対の整流素子25,25
aの夫々の第2の板状部分23を緩続するため
に、夫々のリード線15を容易に屈曲すること
が可能になり、チツプ18に不要な外力が加わ
ることを阻止することが出来る。また、第11
図に示す如くリード線15を曲げないで垂直に
保つて相互に接続したり、又は外部回路に接続
する場合に於いても、第2の板状部分23の厚
さ方向に力が加わることが多いので、この外力
を第1の板状部分13で緩和することが出来
る。
(c) Since the thickness direction of the second plate-like portion 23 coincides with the thickness direction of the first plate-like portion 13, the first plate-like portion 23
As shown in Figure 1, a pair of rectifying elements 25, 25
Since the second plate-like portions 23 of each of the second plate-shaped portions 23a are loosely connected, the respective lead wires 15 can be easily bent, and unnecessary external force can be prevented from being applied to the chip 18. Also, the 11th
Even when connecting the lead wires 15 to each other or to an external circuit by keeping them vertical without bending them as shown in the figure, force may not be applied in the thickness direction of the second plate-shaped portion 23. Therefore, this external force can be alleviated by the first plate-shaped portion 13.

以上、本発明の実施例について述べたが、本発
明はこれに限定されるものでなく、更に変形可能
なものである。例えば、第1の板状部分13の全
部を露出させるように外部被覆層22を設けても
よい。
Although the embodiments of the present invention have been described above, the present invention is not limited thereto and can be further modified. For example, the outer covering layer 22 may be provided so that the entire first plate-like portion 13 is exposed.

また、第1の板状部分13の半分近くまで外部
被覆層22を設けてもよい。しかし、第1の板状
部分13を半分以上被覆すると衝撃緩和作用が低
下し、好ましくない。
Further, the outer covering layer 22 may be provided up to nearly half of the first plate-shaped portion 13. However, if more than half of the first plate-shaped portion 13 is covered, the impact-reducing effect decreases, which is not preferable.

また、第1の板状部分13をU字、V字、S字
等に曲げると、衝撃緩和作用が増大するが、場合
によつてはこのような屈曲部を設けなくともよ
い。
Further, if the first plate-shaped portion 13 is bent into a U-shape, V-shape, S-shape, etc., the impact-reducing effect is increased, but in some cases, such a bending portion may not be provided.

また、第2の板状部分23を形成する際のプレ
スの方法によつては、第1の板状部分13と第2
の板状部分23とを同一方向に揃えなくともよ
い。
Furthermore, depending on the pressing method used when forming the second plate-like portion 23, the first plate-like portion 13 and the second plate-like portion
It is not necessary to align the plate-shaped portions 23 in the same direction.

また、外部被覆層22はラバー状絶縁物である
ことが望ましいが、弾性のない材料を使用する場
合にも適用可能である。
Further, although the outer covering layer 22 is preferably made of a rubber-like insulating material, it is also possible to use a non-elastic material.

また、実施例ではビス止等を考慮してU字状切
欠部24を設けたが、ろう接のみで固着する場合
には不要である。また整流素子以外の半導体素子
にも適用可能である。
Further, in the embodiment, the U-shaped notch 24 was provided in consideration of screw fixation, etc., but it is not necessary when fixing by soldering only. It is also applicable to semiconductor elements other than rectifying elements.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は従来の整流素子を示す断面
図、第3図〜第11図は本発明の実施例に係わる
整流素子を説明するためのものであり、第3図は
リード線の斜視図、第4図はリード線の側面図、
第5図は整流素子の組込み状態を示す一部切欠分
解正面図、第6図は半田付け終了後の状態を示す
断面図、第7図は外部被覆層を設けた状態を示す
断面図、第8図は第2の板状部分を形成した状態
を示す正面図、第9図は第8図の右側面図、第1
0図はU字状切欠部を設けた状態を示す側面図、
第11図は整流回路を形成した状態を示す正面図
である。 尚図面に用いられている符号に於いて、11は
ヘツダ部分、12は第1の棒状部分、13は第1
の板状部分、14は第2の棒状部分、15はリー
ド線、16は金属基体、18はダイオードチツ
プ、21は内部被覆層、22は外部被覆層、23
は第2の板状部分である。
1 and 2 are cross-sectional views showing a conventional rectifier, FIGS. 3 to 11 are for explaining a rectifier according to an embodiment of the present invention, and FIG. A perspective view, FIG. 4 is a side view of the lead wire,
Fig. 5 is a partially cutaway exploded front view showing the state in which the rectifying element is assembled, Fig. 6 is a sectional view showing the state after soldering, Fig. 7 is a sectional view showing the state in which the outer coating layer is provided, and Fig. 6 is a sectional view showing the state after soldering. Figure 8 is a front view showing the state in which the second plate-like part is formed, Figure 9 is a right side view of Figure 8, and Figure 9 is a right side view of Figure 8.
Figure 0 is a side view showing a state in which a U-shaped notch is provided.
FIG. 11 is a front view showing a state in which a rectifier circuit is formed. In addition, in the symbols used in the drawings, 11 is the header part, 12 is the first rod-shaped part, and 13 is the first
14 is a second rod-shaped portion, 15 is a lead wire, 16 is a metal base, 18 is a diode chip, 21 is an inner coating layer, 22 is an outer coating layer, 23
is the second plate-like portion.

Claims (1)

【特許請求の範囲】 1 ヘツダ部分と第1の棒状部分と第1の板状部
分と第2の棒状部分とを順次に有し、前記ヘツダ
部分が一端側に設けられ、前記第2の棒状部分が
他端側に設けられているリード線を用意し、この
リード線の前記ヘツダ部分と金属基体との間に半
導体チツプを接着する工程と、 前記第1の板状部分の半分以上が外部に露出す
るように前記半導体チツプ及び前記リード線の一
部を絶縁物にて被覆する工程と、 しかる後、前記第2の棒状部分の内の外部接続
端子を形成すべき部分をプレスして第2の板状部
分を形成する工程と を有することを特徴とする半導体装置の製造方
法。 2 前記第2の棒状部分をプレスして第2の板状
部分を形成する工程は、前記第2の板状部分の厚
さ方向が前記第1の板状部分の厚さ方向と同一方
向になるように前記第2の棒状部分をプレスする
工程である特許請求の範囲第1項記載の半導体装
置の製造方法。 3 前記第1の板状部分は同一直線上に位置する
前記第1及び第2の棒状部分から板の主面が互に
対向するようにU字状に屈曲された部分である特
許請求の範囲第1項又は第2項記載の半導体装置
の製造方法。
[Scope of Claims] 1. A header portion, a first rod-shaped portion, a first plate-shaped portion, and a second rod-shaped portion are sequentially provided, the header portion being provided at one end side, and the second rod-shaped portion a step of preparing a lead wire in which a portion is provided on the other end side, and bonding a semiconductor chip between the header portion of the lead wire and a metal base; a step of covering the semiconductor chip and a part of the lead wire with an insulating material so as to be exposed to the semiconductor chip; and then pressing a portion of the second rod-shaped portion where an external connection terminal is to be formed. 2. A method for manufacturing a semiconductor device, comprising the step of forming a second plate-like portion. 2. The step of pressing the second bar-shaped portion to form the second plate-shaped portion is performed so that the thickness direction of the second plate-shaped portion is in the same direction as the thickness direction of the first plate-shaped portion. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of pressing said second rod-shaped portion so that the second bar-shaped portion is pressed. 3. Claims in which the first plate-shaped part is a part bent in a U-shape from the first and second rod-shaped parts located on the same straight line so that the main surfaces of the plates face each other. A method for manufacturing a semiconductor device according to item 1 or 2.
JP57148545A 1982-08-26 1982-08-26 Manufacture of semiconductor device Granted JPS5939055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57148545A JPS5939055A (en) 1982-08-26 1982-08-26 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57148545A JPS5939055A (en) 1982-08-26 1982-08-26 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5939055A JPS5939055A (en) 1984-03-03
JPS6351541B2 true JPS6351541B2 (en) 1988-10-14

Family

ID=15455157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57148545A Granted JPS5939055A (en) 1982-08-26 1982-08-26 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5939055A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2510708B2 (en) * 1988-12-02 1996-06-26 ローム株式会社 Semiconductor device
JPH09289404A (en) 1996-04-24 1997-11-04 Honda Motor Co Ltd Ribbon, bonding wire and microwave circuit package
JP2012244132A (en) * 2011-05-24 2012-12-10 Hitachi Ltd Semiconductor device
CN108010753A (en) * 2017-12-29 2018-05-08 无锡赛晶电力电容器有限公司 A kind of capacitor outgoing line connection structure and preparation method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4216568Y1 (en) * 1965-06-01 1967-09-25

Also Published As

Publication number Publication date
JPS5939055A (en) 1984-03-03

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