JPS6352466B2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a method for insulating and separating the surface of a semiconductor substrate, and more specifically, a method for insulating and separating the surface of a semiconductor substrate. , relates to a method for providing insulation separation between semiconductor elements.

Conventional configurations and their problems In recent years, as semiconductor integrated circuits have become more highly integrated,
As a device isolation method, a so-called oxide film isolation method has come to be widely used. However, as the oxide film separation method becomes more highly integrated, its shortcomings have appeared. The conventional oxide film separation method will be schematically described below with reference to the drawings.

FIG. 1 is a cross-sectional view of a bipolar semiconductor integrated circuit device formed by applying oxide film separation technology, in which 1 is a P-type silicon substrate, 2a and 2b are N ⁺ buried regions, and 3 is a P ⁺ channel stopper. Area, 4a,
4b is an N-type epitaxial growth layer, 5 is an oxide film isolation region, 6a and 6b are bird's heads, and 7
a and 7b are bird's beaks.

The bird's heads 6a and 6b are mainly caused by the turning-up of the silicon nitride film mask during selective oxidation, but the height of these parts is usually 1/1 of the thickness of the oxide film isolation region 5. When it reaches about 3,
When forming a metal wiring layer on the same, a disconnection may occur in the wiring layer. Bird's beaks 7a and 7b are formed when oxygen diffuses and permeates laterally under the silicon nitride film mask in the selective oxidation process, increasing the width of the oxide film isolation region 5 and simultaneously increasing the width of the oxide film isolation region 5. , the area of the N-type epitaxial growth layers 4a, 4b, which are device forming regions, is reduced and the cross-sectional shape is made complicated.

Furthermore, in order to thicken the oxide film insulation isolation region 5, it is necessary to increase the heat treatment time in the selective oxidation step. This is because the impurities in the N ⁺ buried regions 2a and 2b diffuse into the N type epitaxial layers 4a and 4b, and the collector and
This will cause a drop in the emitter-to-emitter breakdown voltage. In addition, as the thickness of the oxide isolation region 5 increases, the height of the bird's heads 6a, 6b and the length of the bird's beaks 7a, 7b increase proportionally, and the above-mentioned disadvantages are also magnified. Ru. Under these circumstances, the thickness of the oxide film insulating isolation region 5 is usually set to 2 μm or less. However, the thickness of the N-type epitaxial growth layers 4a and 4b is usually 1 to 2 μm,
The thickness (diffusion depth) of the N ⁺ buried regions 2a and 2b is
Usually, it is 1.5 to 2 μm, and therefore, it is not possible to completely insulate and separate the N ⁺ buried regions 2a and 2b. Therefore, the N ⁺ embedded deposit areas 2a and 2b cannot be brought very close to each other, and this point also becomes an obstacle to high integration.

Furthermore, in the selective oxidation step, since the silicon substrate is partially oxidized, stress due to expansion of silicon during thermal oxidation is concentrated at the boundary portion, and crystal defects that cause leakage current and the like are likely to occur.

Purpose of the Invention The present invention solves the problems of the conventional example as described above, and provides insulation isolation on the surface of a semiconductor substrate in which the width of the isolation region is small, the surface is flat, and the surface is suitable for high integration. The present invention provides a method.

Structure of the Invention The present invention can be summarized as follows: forming a silicon nitride film on the surface of a semiconductor substrate; selectively etching the semiconductor substrate using the silicon nitride film as a mask to form a groove; A step of forming a silicon oxide film on the surface of the trench, a step of forming a polycrystalline silicon film on the entire surface of the silicon oxide film and the silicon nitride film, and a step of leaving the polycrystalline silicon film only on the side surfaces of the trench. This is a method for insulating and separating a semiconductor substrate surface, which includes a step of performing a directional etching process, and a step of selectively growing polycrystalline silicon only on the polycrystalline silicon film to fill the trench. It is possible to form a wide isolation region, suppress stress strain between the isolation region and an active region for forming a semiconductor element as much as possible, and realize a semiconductor device with good electrical characteristics.

DESCRIPTION OF EMBODIMENTS FIG. 2 is a flowchart showing the manufacturing process of a bipolar semiconductor integrated circuit device in the order of steps as an embodiment of the present invention. Hereinafter, with reference to this example,
The present invention will be explained in detail.

First, as shown in FIG. 2A, a P-type silicon substrate 2
1, an N ⁺ buried region 22, an N-type epitaxial growth layer 23, and a silicon nitride (Si ₃ N ₄ ) film 24 are formed.

Next, as shown in FIG. 2B, an etching opening is formed in a predetermined portion of the silicon nitride film 24, that is, a portion where an isolation region is to be formed, by a normal photolithography method, and through this opening, for example,
Grooves 25 deep enough to reach the substrate 21 are formed using a method such as reactive ion etching. Then, using the silicon nitride film 24 as a mask, a P ⁺ channel stopper region 26 is formed at the bottom of the trench 25 by ion implantation. Note that when forming the groove 25,
When the reactive ion etching method is used, a groove shape is formed that is substantially perpendicular to the opening in the silicon nitride film 21, but as shown in the figure, there may be an undercut that cuts through the opening.

Then, as shown in FIG. 2C, a silicon oxide (SiO ₂ ) film 27 is formed on the surface of the groove 25. This silicon oxide film 27 is formed by a normal thermal oxidation method, and may have a thickness of 100 to 200 nm.

Next, as shown in Figure 2D, the well-known decompression
A polycrystalline silicon film 28 is formed by CVD method to cover the entire surface of the silicon nitride film 24 and the silicon oxide film 27. According to the low pressure CVD method, the film is formed isotropically, and the film thicknesses on the silicon nitride film 24 and on the silicon oxide film 27 are approximately equal.

Then, when this polycrystalline silicon film 28 is etched by reactive ion etching, the polycrystalline silicon film 28 remains on the sidewalls of the trench, and the silicon nitride film 28 remains on the bottom surface of the trench, as shown in FIG. 2E. The polycrystalline silicon film is removed from the plane portion 24.

This includes chlorine-based gases, such as hydrogen chloride.
When polycrystalline silicon is formed again by the CVD method, as shown in FIG. The gap is filled.

Next, as shown in FIG. 2G, polycrystalline silicon 29
Etch the top of. At this time, the appropriate amount of etching is such that the surface is 100 to 200 nm lower than the surface of the N-type epitaxial growth layer 23. Note that the etching in this case may be either isotropic or anisotropic.

Then, as shown in Figure 2H, by thermal oxidation method,
A silicon oxide film 3 is formed on the exposed surface of the polycrystalline silicon 29.
form 0. At this time, it is appropriate that the surface of the silicon oxide film 30 substantially coincide with the surface of the N-type epitaxial growth layer 23. Note that during thermal oxidation of the polycrystalline silicon 29, part of the N-type epitaxial growth layer is also oxidized through the silicon oxide film 27, but in general, the oxidation rate of polycrystalline silicon is faster than that of single-crystalline silicon. Since the width of the isolation region is also large, the expansion of the width of the isolation region and the occurrence of bird's beak due to this oxidation process are not large enough to cause problems.

Each element of the bipolar semiconductor integrated circuit is formed in the N-type epitaxial growth layer 23 by selective diffusion, but the steps for forming each element may be the same as in the conventional method.

In the step shown in FIG. 2A, a silicon oxide film (not shown) with a thickness of about 10 to 30 nm may be formed on the surface of the N-type epitaxial growth layer 23 before forming the silicon nitride film 24.

In addition, when forming the groove 25 in FIG. 2B,
It may be formed to a depth that penetrates only the N type epitaxial growth layer 23 without penetrating the N ⁺ buried region 23. In this case, the
Although it is necessary to separate the N ⁺ buried regions in advance, there is an advantage that the depth of the trench can be made shallow.

Furthermore, at the stage of FIG.
By increasing the oxidation rate by using this method, it is possible to further suppress the expansion of the width of the isolation region and the occurrence of bird's beak.

The above embodiments have been explained in terms of the process of forming the isolation region of a bipolar type semiconductor integrated circuit device, but the same process can also be used as an isolation technology for a MOS type semiconductor integrated circuit device and a mixed type semiconductor integrated circuit device. can.

Effect of the invention According to the present invention, there are the following effects.

First, since a long thermal oxidation process is not required to form the insulation isolation region, a semiconductor integrated circuit device with good electrical characteristics can be obtained without crystal defects caused by stress or the like.

Second, since the width of the separation region is determined in one photolithography process and its dimensions hardly change in subsequent steps, separation regions with a fine width can be formed and high density can be achieved.

Thirdly, since it is easy to increase the depth of the separation region, by forming it deeper than the diffusion layers that you want to separate from each other, it is possible to make the distance on the plane between the diffusion layers equal to the width of the separation region. It is possible to achieve high density.

Fourth, the surface of the separation region is flat, and
Since the difference in level from the active element forming area is small, there is no risk of disconnection of the metal wiring.

Fifth, by increasing the depth of the isolation region, the channel stopper region and other diffusion layers can be formed without contacting each other, so the electrical withstand voltage can be increased and the stray capacitance can also be reduced. can.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of the main parts of a conventional semiconductor device;
Figures A to H are process flowcharts of an embodiment of the present invention. 21...P-type silicon substrate, 22...N ⁺ buried region, 23...N-type epitaxial growth layer, 24
...silicon nitride film, 25...groove, 26...P ⁺
Channel stopper region, 27... silicon oxide film, 28... polycrystalline silicon film, 29... polycrystalline silicon, 30... silicon oxide film.

Claims (1)

[Claims] 1. A step of forming a silicon nitride film on the surface of a semiconductor substrate, a step of selectively etching the semiconductor substrate using the silicon nitride film as a mask to form a groove, and forming a silicon oxide film on the surface of the groove. a step of forming a polycrystalline silicon film on the entire surface of the silicon oxide film and the silicon nitride film; a step of performing an anisotropic etching process to leave the polycrystalline silicon film only on the side surfaces of the groove; A method for insulating and separating a semiconductor substrate surface, comprising a step of selectively growing polycrystalline silicon only on a silicon film to fill the trench.