JPS6353719B2 - - Google Patents
Info
- Publication number
- JPS6353719B2 JPS6353719B2 JP24614483A JP24614483A JPS6353719B2 JP S6353719 B2 JPS6353719 B2 JP S6353719B2 JP 24614483 A JP24614483 A JP 24614483A JP 24614483 A JP24614483 A JP 24614483A JP S6353719 B2 JPS6353719 B2 JP S6353719B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- inp
- gainasp
- final
- protective layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000010410 layer Substances 0.000 claims description 60
- 239000012535 impurity Substances 0.000 claims description 21
- 239000011241 protective layer Substances 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 12
- 239000004065 semiconductor Substances 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 238000001816 cooling Methods 0.000 claims description 9
- 239000013078 crystal Substances 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims 1
- 239000007791 liquid phase Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000005253 cladding Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000010494 dissociation reaction Methods 0.000 description 3
- 230000005593 dissociations Effects 0.000 description 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 229910052793 cadmium Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
Landscapes
- Semiconductor Lasers (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
Description
【発明の詳細な説明】
［発明の技術分野］
本発明は、GaInAsP／InP系の連続液相エピタ
キシヤル成長法を利用した半導体装置の製造方法
に係わり、特に最終層の保護方法の改良をはかつ
た半導体装置の製造方法に関する。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method for manufacturing a GaInAsP/InP-based semiconductor device using a continuous liquid phase epitaxial growth method, and particularly to an improvement in a method for protecting the final layer. The present invention also relates to a method of manufacturing a semiconductor device.
［発明の技術的背景とその問題点］
近年、GaInAsP／InP系の連続液相エピタキシ
ヤル成長法を利用した各種の半導体レーザ装置が
開発されている。しかし、InP基板上への
GaInAsP4元混晶及びInPから成る多層結晶成長
においては、従来次のような問題点があつた。そ
の問題点の一つは成長後に最終層の表面がＰの熱
解離によつて荒れることである。この熱解離によ
り最終層の表面には多数のピツトが現われ、表面
状態は甚だ悪くなる。また、融液の不完全なワイ
プのためにかかる成長用融液が最終層上に残留す
ることも多い。特に、最終層がGaInAsPである
場合には、冷却時に残留融液の下に異常成長が行
われ、後のデバイス化プロセスに困難をきたすこ
とになる。さらに、成長後冷却する過程で
GaInAsPにドープした不純物が気相へ抜けるた
め、最終層の表面の不純物濃度が低下し、良好な
オーミツクコンタクトを得られないことがあつ
た。これらの事実は、GaInAsP層を良好なオー
ミツク特性を得るためのキヤツプ層として成長さ
せることの多い発光受光素子、例えば半導体レー
ザ作製の場合に大きな問題点であつた。[Technical background of the invention and its problems] In recent years, various semiconductor laser devices have been developed using GaInAsP/InP continuous liquid phase epitaxial growth. However, on InP substrate
Conventionally, the following problems have occurred in multilayer crystal growth consisting of GaInAsP quaternary mixed crystal and InP. One of the problems is that the surface of the final layer becomes rough due to thermal dissociation of P after growth. Due to this thermal dissociation, many pits appear on the surface of the final layer, and the surface condition becomes extremely poor. Also, such growth melt often remains on the final layer due to incomplete wiping of the melt. In particular, if the final layer is GaInAsP, abnormal growth will occur under the residual melt during cooling, causing difficulties in the subsequent device fabrication process. Furthermore, during the cooling process after growth,
Since the impurities doped in GaInAsP escape into the gas phase, the impurity concentration at the surface of the final layer decreases, making it impossible to obtain good ohmic contact. These facts have been a major problem in the production of light-emitting and light-receiving devices, such as semiconductor lasers, in which a GaInAsP layer is often grown as a cap layer to obtain good ohmic characteristics.
そこで最近、上記問題を解決する方法として、
GaInAsP最終層の表面にInP層を成長させて最終
層表面の荒れを防ぎ、冷却後硝酸で残留Inを取り
除いた後に、InP層のみを選択的にエツチングす
ることが行われている。そして、この方法によ
り、表面状態の良好なウエーハを得られることが
できるようになつた。しかしながら、GaInAsP
最終層にドープする不純物は拡散性を有するもの
がほとんどであり、冷却時に固相−固相拡散によ
り最終層からInP層へ不純物が移動する。このた
め、最終層表面の不純物濃度が極端に低下し、良
好なオーミツクコンタクトが得られないという欠
点を有していた。 Recently, as a way to solve the above problem,
An InP layer is grown on the surface of the final GaInAsP layer to prevent the surface of the final layer from becoming rough, and after cooling, residual In is removed with nitric acid, and only the InP layer is selectively etched. With this method, it has become possible to obtain wafers with good surface conditions. However, GaInAsP
Most of the impurities doped into the final layer have diffusivity, and upon cooling, the impurities move from the final layer to the InP layer by solid phase-solid phase diffusion. For this reason, the impurity concentration on the surface of the final layer is extremely reduced, resulting in a disadvantage that good ohmic contact cannot be obtained.
［発明の目的］
本発明の目的は、GaInAsP最終層の表面状態
を良好にし、且つ不純物濃度の低下を防止するこ
とができ、良好なオーミツクコンタクトをとるこ
とができる極めて生産性の高い半導体装置の製造
方法を提供することにある。[Object of the Invention] The object of the present invention is to provide an extremely highly productive semiconductor device that can improve the surface condition of the GaInAsP final layer, prevent a decrease in impurity concentration, and provide good ohmic contact. The purpose of this invention is to provide a method for manufacturing the same.
［発明の概要］
本発明の骨子は、GaInAsP最終層の表面に不
純物をドープしたInP層を成長させることによ
り、最終層の保護のみならず不純物の拡散をも防
止することにある。[Summary of the Invention] The gist of the present invention is to grow an InP layer doped with impurities on the surface of the GaInAsP final layer, thereby not only protecting the final layer but also preventing impurity diffusion.
すなわち本発明は、最終層をGaInAsP4元混晶
で形成すると共にその上にInP保護層を成長形成
する工程と、次いで全体を冷却する工程と、冷却
後にInP保護層を除去する工程とを含む半導体装
置の製造方法において、前記InP保護層の不純物
濃度を前記GaInAsP最終層のそれと同等若しく
はそれ以上に設定しておくようにした方法であ
る。 That is, the present invention provides a semiconductor that includes the steps of forming the final layer of GaInAsP quaternary mixed crystal and growing an InP protective layer thereon, then cooling the entire layer, and removing the InP protective layer after cooling. In this method of manufacturing a device, the impurity concentration of the InP protective layer is set to be equal to or higher than that of the GaInAsP final layer.
［発明の効果］
本発明によれば、GaInAsP最終層の上にInP層
を形成することにより、Ｐの解離が起こらないの
は勿論のこと、残留メルトを容易に取り除くこと
ができる。さらに、InP層には十分なる量の不純
物をドープしているので、GaInAsP層から不純
物がInP層へ抜けていくことがなく、GaInAsP層
の表面における不純物濃度が低下するのを未然に
防止することができる。このため、GaInAsP最
終層によるオーミツクコンタクトを極めて良好に
行うことができ、生産性の大幅な向上をはかり得
る。[Effects of the Invention] According to the present invention, by forming an InP layer on the final GaInAsP layer, not only does dissociation of P not occur, but also residual melt can be easily removed. Furthermore, since the InP layer is doped with a sufficient amount of impurities, impurities do not escape from the GaInAsP layer to the InP layer, thereby preventing the impurity concentration at the surface of the GaInAsP layer from decreasing. I can do it. Therefore, ohmic contact with the GaInAsP final layer can be made extremely well, and productivity can be greatly improved.
［発明の実施例］
第１図乃至第３図は本発明の一実施例に係わる
長波長帯半導体レーザの製造工程を示す断面図で
ある。まず、第１図に示す如くｎ型InP基板１上
にｎ型InPバツフア層２、アンドープInxGa1-x
As1-yPy活性層３、ｐ型InPクラツド層４、p+型
InuGa1-uAs1-vPv（不純物濃度３×1018cm-3）キヤ
ツプ層５及びp+−InP層（不純物濃度３×1018cm
-3）保護層６を順次液相成長した。ここで、ｘ，
ｙ，ｕ，ｖの関係は０＜ｘ＜ｕ＜１，０＜ｙ＜ｖ
＜１である。さらに、各層の厚さはレーザ素子用
にInPバツフア層２を５［μm］、活性層３を0.2
［μm］、クラツド層４を２［μm］、キヤツプ層５を
１［μm］、p+−InP保護層６を２［μm］とした。
また、ｎ型不純物としてはSnを用い、ｐ型不純
物としてはZnを用いた。なお、図中７は残留メ
ルトを示している。[Embodiment of the Invention] FIGS. 1 to 3 are cross-sectional views showing the manufacturing process of a long wavelength band semiconductor laser according to an embodiment of the present invention. First, as shown in FIG. 1, an n-type InP buffer layer 2 and an undoped In x Ga 1-x layer are formed on an n-type InP substrate 1.
As 1-y Py active layer 3, p-type InP cladding layer 4, p + type
In u Ga 1-u As 1-v Pv (impurity concentration 3×10 18 cm -3 ) cap layer 5 and p + -InP layer (impurity concentration 3×10 18 cm
-3 ) The protective layer 6 was sequentially grown in liquid phase. Here, x,
The relationship between y, u, and v is 0<x<u<1, 0<y<v
<1. Furthermore, the thickness of each layer is 5 μm for the InP buffer layer 2 and 0.2 μm for the active layer 3.
[μm], the cladding layer 4 was 2 [μm], the cap layer 5 was 1 [μm], and the p + -InP protective layer 6 was 2 [μm].
Furthermore, Sn was used as the n-type impurity, and Zn was used as the p-type impurity. Note that 7 in the figure indicates the residual melt.
次に、上記試料を冷却したのち、約５分間硝酸
につけ残留メルト７を完全に取り除いた。続い
て、塩酸を用い、第２図に示す如くp+−InP保護
層を選択的に２分間エツチングして除去した。か
くして得られた試料の表面、すなわちキヤツプ層
５の表面を微分干渉顕微鏡により観察したところ
極めて平担で良好な面が略試料の全面にわたつて
得られていることが確認された。この平担面が得
られる理由は、最終層であるGaInAsPキヤツプ
層５の上にInP保護層６を形成し、キヤツプ層５
の冷却時における異常成長等を防止しているから
である。 Next, after cooling the sample, it was soaked in nitric acid for about 5 minutes to completely remove the residual melt 7. Subsequently, the p + -InP protective layer was selectively etched for 2 minutes using hydrochloric acid as shown in FIG. 2 to remove it. When the surface of the sample thus obtained, that is, the surface of the cap layer 5, was observed using a differential interference microscope, it was confirmed that an extremely flat and good surface was obtained over almost the entire surface of the sample. The reason why this flat surface is obtained is that the InP protective layer 6 is formed on the GaInAsP cap layer 5, which is the final layer, and the cap layer 5 is
This is because it prevents abnormal growth etc. during cooling.
次に、通常のレーザ作成プロセスを行い、第３
図に示す如くキヤツプ層５の表面にストライプ状
に開孔された絶縁膜８を介してAnZn電極９を蒸
着により形成し、さらにInP基板１の下面に
AuGe電極１０を蒸着してレーザ素子を作成し
た。かくして得られた素子の微分抵抗値は３［Ω］
と極めて低く従来の方法で作成したレーザの微分
抵抗値が７［Ω］程度であつたのに比し半分以下
となつた。これは良好なオーミツクコンタクトが
とれるようになつたためであり、このため素子の
特性も大きく向上した。この理由は、とりもなお
さず前記InP保護層６の不純物濃度をキヤツプ層
５と同等としたことにより、キヤツプ層５から保
護層６への不純物拡散が防止されるためである。 Next, go through the normal laser creation process, and the third
As shown in the figure, an AnZn electrode 9 is formed by vapor deposition on the surface of the cap layer 5 through an insulating film 8 with striped holes, and then on the bottom surface of the InP substrate 1.
A laser device was fabricated by depositing an AuGe electrode 10. The differential resistance value of the element thus obtained is 3 [Ω]
The differential resistance value of the laser produced by the conventional method was about 7 [Ω], but it was less than half that. This is because it has become possible to make good ohmic contact, and the characteristics of the device have also been greatly improved. The reason for this is that by making the impurity concentration of the InP protective layer 6 equal to that of the cap layer 5, diffusion of impurities from the cap layer 5 to the protective layer 6 is prevented.
なお、本発明は上述した実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で、種々
変形して実施することができる。例えば、前記
InP保護層の不純物濃度は最終層であるGaInAsP
キヤツプ層のそれと同等である必要はなく、それ
以上の範囲で適宜定めればよい。また層構造や各
層の厚さは仕様に応じて適宜定めればよい。さら
に、不純物の種類もZnのほかにCdやMg等でも有
効である。また、各層の導電型を逆にすることも
可能である。さらに、半導体レーザに限らず
GaInAsP／InP系の連続液相成長を利用する各種
半導体装置の製造に適用することが可能である。 Note that the present invention is not limited to the embodiments described above, and can be implemented with various modifications without departing from the gist thereof. For example, the above
The impurity concentration of the InP protective layer is the final layer of GaInAsP.
It does not need to be equal to that of the cap layer, and may be appropriately set within a greater range. Further, the layer structure and the thickness of each layer may be determined as appropriate according to specifications. Furthermore, in addition to Zn, Cd, Mg, etc. are also effective as impurities. It is also possible to reverse the conductivity type of each layer. Furthermore, it is not limited to semiconductor lasers.
It can be applied to the manufacture of various semiconductor devices using GaInAsP/InP-based continuous liquid phase growth.
第１図乃至第３図は本発明の一実施例に係わる
長波長帯半導体レーザの製造工程を示す断面図で
ある。
１…ｎ型InP基板、２…ｎ型InPバツフア層、
３…アンドープInxGa1-xAs1-yPy活性層、４…ｐ
型InPクラツド層、５…p+型InuGa1-uAs1-vPvキ
ヤツプ層、６…p+型InP保護層、７…残留メル
ト、８…絶縁膜、９，１０…電極。
1 to 3 are cross-sectional views showing the manufacturing process of a long wavelength band semiconductor laser according to an embodiment of the present invention. 1... n-type InP substrate, 2... n-type InP buffer layer,
3...Undoped In x Ga 1-x As 1-y Py active layer, 4...p
5...p+ type InP cladding layer, 5...p + type In u Ga 1-u As 1-v Pv cap layer, 6...p + type InP protective layer, 7... residual melt, 8... insulating film, 9, 10... electrode.
Claims (1)
法により多層エピタキシヤル成長層を形成して半
導体装置を製造する方法において、最終層を
GaInAsP4元混晶で形成すると共に、この上に該
最終層を同等若しくはそれ以上の不純物濃度を有
するInP保護層を成長形成する工程と、次いで全
体を冷却する工程と、次いで上記InP保護層を選
択エツチング法により除去する工程とを含むこと
を特徴とする半導体装置の製造方法。1 In a method for manufacturing semiconductor devices by forming multilayer epitaxial growth layers using GaInAsP/InP-based continuous epitaxial growth method, the final layer is
A step of forming GaInAsP quaternary mixed crystal and growing an InP protective layer having an impurity concentration equal to or higher than the final layer on top of this, cooling the whole, and then selecting the InP protective layer. 1. A method for manufacturing a semiconductor device, comprising the step of removing by an etching method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24614483A JPS60137081A (en) | 1983-12-26 | 1983-12-26 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24614483A JPS60137081A (en) | 1983-12-26 | 1983-12-26 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60137081A JPS60137081A (en) | 1985-07-20 |
| JPS6353719B2 true JPS6353719B2 (en) | 1988-10-25 |
Family
ID=17144135
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24614483A Granted JPS60137081A (en) | 1983-12-26 | 1983-12-26 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60137081A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0289385A (en) * | 1988-09-27 | 1990-03-29 | Nec Corp | Manufacture of semiconductor element |
-
1983
- 1983-12-26 JP JP24614483A patent/JPS60137081A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60137081A (en) | 1985-07-20 |
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