JPS6353757B2 - - Google Patents

Description

[Detailed Description of the Invention] As a method for storing one frame of a television signal, with the recent reduction in prices of A/D converters and digital memory elements, a method of digitizing the television signal and storing it in a digital memory seems to be promising. It is being done.

At this time, since the amount of memory and the quality of images are generally contradictory, it is necessary to perform highly efficient encoding in order to store images of higher quality with a smaller amount of memory.

The present invention describes two-dimensional encoding, which is one of the encoding methods.
The present invention provides a still image recording device that employs a simpler frame memory control method when using the DPCM method.

First, a conventional still image recording and reproducing apparatus that samples an NTSC image at a frequency three times the color subcarrier and performs two-dimensional DPCM will be described.

FIG. 1 shows a circuit configuration diagram. In Figure 1,
1 is an A/D converter, 2 is a two-dimensional DPCM encoder,
3 is a memory for one frame, 4 is a two-dimensional DPCM decoder, 5 is a D/A converter, and 6 is a subcarrier.
A frequency converter for doubling the frequency, 7 is a memory control circuit.

In the above configuration, in the 6 frequency converters,
With PLL, etc., the frequency is three times that of the subcarrier.
The analog video signal is sampled by _{the 3S} , and digitized by the A/D converter 1. The digitized video signal is encoded by two two-dimensional DPCM encoders,
The data is recorded in the memory 3 by the memory control circuit 7. Next, the two-dimensional DPCM and memory control circuit referred to here will be explained.

First, two-dimensional DPCM will be explained based on FIG. 2. Figure 2 shows the phase relationship between the subcarrier and sampling clock for each horizontal scanning line, where SC is the subcarrier, X ₁₁ , X ₁₂ . . . are the sample points of the first line, and X ₂₁ , X ₂₂ , X ₂₃ . This is the sample point on the second line. In Figure 2, for example, the average value of sample values d _A and d B at points A and _B , d _A + d _B /2, is taken as the predicted value for point C, and the difference between it and the sample value d _C at point C is encoded. The method is called two-dimensional DPCM.

Next, the memory control circuit 7 will be explained.

The subcarriers of the NTSC system are 1H = 455/2 pieces, 1 frame is 525H, and the original phase is returned to in 2 frames (1050H), so the memory control circuit 7 is
It consists of a frame period. Its configuration is shown in FIG. 3, and FIGS. 4 and 5 show time charts of main parts of the memory control circuit 7 of FIG. 3.

In FIG. 3, 8 is a 2H counter, 9 is a 2H counter output decoding circuit, 10 and 13 are OR circuits, 11 is a 2-frame counter circuit, and 12 is a 2-frame counter output decoding circuit. In the above configuration, the operation will be explained using the time charts shown in FIGS. 4 and 5. The 2H counter 8 counts 455 subcarriers and outputs 2H _END . The decoding circuit 9 decodes the output of the 2H counter 8 and outputs the subcarrier. Count and output 228 pieces.
Next, OR the output of 2H counter 8 and decode circuit 9.
input to circuit 10 and output H _END . Next 2
The frame counter 11 counts 1050 H _ENDs and outputs a 2 frame end signal (2F _END ).
The decoding circuit 12 decodes the output of the 2-frame counter 11, counts 525 H _ENDs , and outputs a frame end signal (F _END ). Also, 2H counter 8 and 2 frame counter 11 are reset by 2F _END . H _END due to the above operation,
The memory 3 in FIG. 1 is controlled to record one frame by 2H _END , F _END , and 2F _END . Next, in FIG. 5, the figure a shows the subcarrier and horizontal scanning line of the first frame, and the figure b shows the relationship between the subcarrier and the horizontal scanning line of the frame following the frame of a. Points A in a and b are at the same position on the television screen.

In this way, when looking at the same scanning line, the phase of the subcarrier is reversed for each frame, so if a sampling clock with an odd multiple of the subcarrier frequency is used, the phases of the sample points of the first and second frames will be different. , if a still image recorded in the first frame is played back as is in the second frame, the image recorded at X ₁₁ points will be played back at X′ ₁₁ points, and the image recorded at X ₁₂ points will be played back at X′ ₁₂ points. Similarly, what was recorded at point X _1o is played back at point X _2o ′. Also, what is recorded at point X _2o is played back at point X _2o ′. Therefore, if an image recorded using a clock produced in phase synchronization with the subcarrier is reproduced using the same clock, a normal image will not be reproduced. PALE (Phase Altemating Line
There is a method called Encoding). This has the advantage that since the subcarrier is inverted for each line and a clock of three times the frequency is created which is phase-synchronized with this, the sampling phase is aligned for each H and processing is easy. However, it is better for the S/N of two-dimensional DPCM to create a sampling clock from continuous subcarriers and take sample points shifted for each H or frame. As shown in Figure 6 aPALE method, this means that the sample values d A ′ and d B ′ at points _A ′ and _B ′
Rather than predicting the sample value of point C' from d _A ′ + _{d B ′} /2 obtained from from
It is clear that a closer value can be obtained by calculating d _A +d _B /2 and predicting the sample value at point C. Therefore, if you want good image quality, use PALE.
It is necessary to use a subcarrier that does not

Next, a method for controlling the memory 3 using continuous subcarriers will be explained with reference to FIG.

In FIG. 7, a is the same as that explained in FIG. 5, and shows the phase of the subcarrier and sample point for each horizontal scanning line of the frame recorded in the memory. Figure b shows the data movement point shifted in the direction of the arrow in order to correctly reproduce what was recorded in the first frame of frame a. In the first line of the second frame, X' ₁₁ is X″ ₁₁ ,
X' ₁₂ to X'' ₁₂ ...and X' ₂₁ on the second line
to X″ ₂₁ , X′ ₂₂ to X″ ₂₂ , etc. For odd lines, move forward 1.5 samples, for even lines, move 1.5 samples forward.
By aligning after the sample, the first frame and second frame will be aligned, and the correct screen will be reproduced.

When a still image recording and reproducing device is configured with a two-frame cycle as described above, when reproducing a recorded image, the odd-numbered line of the next frame moves forward by 1.5 samples, and the even-numbered line moves by 1.5 samples after the recorded frame. In other words, it is necessary to shift each odd and even line forward and backward, which makes the circuit configuration extremely complicated and takes time to adjust.

The present invention eliminates the above-mentioned structural complexity and provides a still image recording and reproducing device that can be easily adjusted using a simple control system. The feature of the present invention is that whereas conventional devices using the two-dimensional DPCM method were controlled in two-frame cycles,
It is based on a new control method that controls in one frame period. An example of the present invention is shown below. The circuit configuration of the device of this embodiment is the same as that of the conventional example shown in FIG. 1, except for the memory control circuit, so a description thereof will be omitted. FIG. 8 shows a memory control circuit 7' according to the present invention which is controlled in one frame period. The time charts are shown in FIGS. 9 and 10.

In Figure 8, 8 is a 2H counter that counts 455 subcarriers, 9 is a decode circuit that decodes the output of the 2H counter and outputs the 228th subcarrier, and 10 is an OR of the outputs of 2H counter 8 and decode circuit 9. This is an OR circuit that outputs H _END . 11 counts 1050 H _ENDs 2
Frame counter, 12 is 2 frame counter 1
13 is an OR circuit that ORs the _outputs of the 2 frame counter 11 and the decode circuit 12 to generate an output for resetting the 2H counter 8. In this configuration, as shown in the time charts of FIGS. 9 and 10, the 2H counter 8 is connected to the OR circuit 13.
The sample point of each second frame is shifted 1.5 samples later than the corresponding sample point of the first frame for each odd and even line. Therefore, when reproducing the screen correctly, as shown in FIG. 11, for the recorded frame (FIG. 11a), the next frame (both odd and even lines in FIG. 11b) By shifting forward in the direction, the correct screen will be reproduced.In addition, in FIG. 10, if the second frame is recorded, the first frame must be shifted back by 1.5 samples when the first frame is to be reproduced.

As mentioned above, when playing back a conventional device that was controlled using a two-frame period, it was necessary to shift 1.5 samples forward or backward for each line within the same frame, but with the one-frame period according to the present invention, All you have to do is shift it in one direction within the frame. Therefore, the circuit configuration is simpler and adjustment is easier.

Furthermore, the still image signal continued from the frame memory can be DA-converted after two-dimensional DPCM decoding while the relationship between sample points remains unchanged within the frame, and half the period of the subcarrier ( If we correct the deviation (equivalent to 1.5 samples),
Exactly the same signal is continuously output in both the first and second frames. After this signal is YC separated, if the first frame is recorded, a correct still image signal can be obtained by adding it to the separated Y signal so that only the color signal of the second frame is inverted from the first frame. In addition, as a simpler method, if the horizontal synchronization signal of the second frame is delayed by half the period of the subcarrier, the subcarrier will be continuous between the first frame and the second frame, and the relative relationship between the screens of the first frame and the second frame will be Since the positions also match, a correct still image can be obtained.

In this way, the positional relationship between the sample points remains unchanged between the first frame and the second frame, and sample points that are shifted by a half period of the subcarrier only between frames are memorized. Even when restoring images, a simple configuration and simple control can be realized, and an excellent still image recording and reproducing device can be provided.

[Brief explanation of drawings]

Figure 1 is a configuration diagram showing a still image recording/reproducing device, Figure 2 is a waveform diagram showing the subcarrier phase and sample points for each horizontal scanning line in one frame to explain the two-dimensional DPCM method, and Figure 3 is a waveform diagram showing the subcarrier phase and sample points for each horizontal scanning line in one frame. A configuration diagram showing a memory control circuit of a conventional still image recording and reproducing device. FIGS. 4 and 5 are waveform diagrams of main parts of the memory control circuit shown in FIG. 3. FIG. 6 is a diagram showing sample point positions of the encoding method. FIG. 7 is a waveform diagram for explaining reproduction in a conventional still image recording/reproducing apparatus, and FIG. 8 is an example of a memory control circuit in the still image recording/reproducing apparatus of the present invention. FIGS. 9 and 10 are waveform diagrams of essential parts of the memory control circuit of this embodiment, and FIG. 11 is a waveform diagram for explaining reproduction. 1... A/D converter, 2... Two-dimensional DPCM encoder, 3... Memory, 4... Two-dimensional DPCM decoder, 5... D/A converter, 6... Frequency converter,
7'...Memory control circuit, 8...2H counter, 6
...Decode circuit, 10...OR circuit, 11...
2 frame counter, 12... decoding circuit, 1
3...OR circuit, 14...Inverter.

Claims (1)

[Claims] 1 means for generating a clock pulse train having a frequency that is an odd multiple of the color subcarrier of a television signal;
means for D-converting, means for encoding the output of the A/D conversion means, means for storing at least one frame of the encoding means, means for controlling the storage means, and contents of the storage means. A still image recording and reproducing apparatus comprising means for sequentially decoding and D/A converting a color subcarrier, and in the means for controlling the storage means, an address control signal of the storage means is configured to divide the color subcarrier into two horizontal periods. A first counter that counts twice the period and a frame period are output from a second counter that counts twice the period, and the first counter outputs an end signal of the second counter's frame period and two frame periods. A still image recording and reproducing device characterized in that it is reset by.