JPS6354213B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention is applied to a method of detecting the position of a mark pattern formed on an object in order to align the object to a predetermined position, and in particular to a semiconductor printing apparatus that prints an image of a mask (or reticle) on a wafer.
The present invention relates to a position detection method for detecting the position of a mark pattern using an image pickup tube or a solid-state image sensor for aligning a mask and a wafer. In semiconductor printing equipment, when aligning the mask and wafer, the wafer is pre-aligned using an orientation flat, and then the alignment marks provided on the wafer (and mask) are aligned. photoelectrically detects
Generally, the wafer (or mask) is moved in each of the X, Y, and θ directions based on this detection signal to align the two. In addition, photoelectric detection methods include, for example, scanning the alignment mark formed on a mask or wafer with a laser beam and detecting the alignment mark one-dimensionally with a photodetector, or detecting the alignment mark with an image pickup tube, etc. There is a method of two-dimensionally detecting the alignment mark from the video signal by capturing an image of the alignment mark. Although the method of scanning the alignment mark with a laser beam simplifies the electrical processing of the detection signal, the mark cannot be detected unless the alignment mark is positioned on the scanning line of the laser beam. It may take some time before it can be scanned. On the other hand, the method using an image pickup tube takes a short time to search for the alignment mark, but the processing of the detection signal becomes complicated, so the detection signal (video signal)
When detecting the position of the alignment mark based on , an error may occur in the detected position. The present invention was developed in view of the above circumstances, and its purpose is to easily confirm whether the detection result is correct when detecting the position of an alignment mark based on a video signal from an image pickup tube or solid-state image sensor. The object of the present invention is to provide a position detection method that can perform the following tasks. In order to achieve this object, the present invention provides a method for displaying an image of an alignment mark on a receiver (CRT) that displays an image of the alignment mark in response to a video signal from a means for imaging the alignment mark (an image pickup tube or a solid-state image sensor) based on the video signal. An image showing the position of the detected alignment mark is combined with the alignment mark image and displayed. Therefore, according to the present invention, the operator can easily and quickly determine the position of the alignment mark by checking the relationship between the image of the alignment mark and the image indicating the position of the detected alignment mark using the image receptor. You can confirm whether the detection results are correct or not, and you can proceed to the next step with peace of mind. Embodiments of the present invention will be described below with reference to the drawings. First, we will outline the overall configuration using Figure 1, which depicts the exterior. 1 is a mask provided with an integrated circuit pattern, and is also provided with other mask setting marks and fine alignment marks. Reference numeral 2 denotes a mask chuck that holds the mask 1 and moves the mask 1 in a plane and in a rotational direction. 3 is a reduction projection lens, 4 is a wafer provided with a photosensitive layer, and
It shall have an alignment mark and a pre-alignment mark. 5 is a wafer stage. The wafer stage 5 holds the wafer 4 and moves it in the plane and in the rotational direction, and also moves between the wafer printing position (inside the projection field) and the television pre-alignment position. 6
is an objective lens of a detection device for television pre-alignment, 7 is an image pickup tube or solid-state image pickup device serving as an image pickup means, and 8 is a television receiver for video observation serving as an image display means. A binocular unit 9 is useful for observing the surface of the wafer 4 through the projection lens 3. Reference numeral 10 denotes an upper unit housing an illumination optical system for converging the mask illumination light emitted from the light source 10a and a detection device for fine alignment. The wafer stage 5 holds the wafer transported by a wafer transport means (not shown) at a predetermined position, and first moves to a position where the alignment mark on the wafer is within the field of view of the objective lens 6 for television prealignment. The positional accuracy at this time is due to mechanical prealignment accuracy, and the field of view of the objective lens 6 is approximately 1 mm to 2 mm in diameter.
It is about mm. The alignment mark within this field of view is detected by the image pickup tube 7, and the coordinates of the alignment mark from there are detected with reference to a reference mark for TV pre-alignment (described later) provided in the optical system for TV pre-alignment. The position is detected. On the other hand, since the detection position for auto-alignment of the projection optical system and the position of the reference mark for TV pre-alignment mentioned above are set in advance, the auto-alignment position can be determined from these two points and the coordinate position of the TV pre-alignment mark. The feeding amount of the wafer stage 5 is determined. TV pre-alignment position detection accuracy is ±
It is less than 5μ, and even if the error caused by the movement of the wafer stage from the TV pre-alignment position to the fine alignment position is taken into account, it is about ±10μ. Therefore, fine alignment can be performed within a range of approximately ±10 μ, which is less than 1/100 of the field of view of conventional fine alignment, and fine alignment can be performed faster than conventional fine alignment. FIG. 2 shows an embodiment of the detection device for television pre-alignment.
Same as figure. On the other hand, 11 is a light source for illumination, and uses a halogen lamp, for example. 12 is a condenser lens. 1
3A and 13B are a bright field diaphragm and a dark field diaphragm that can be attached and detached interchangeably, and in the figure, the bright field diaphragm 13A is installed in the optical path. A condenser lens 12 images the light source 11 onto a bright field aperture. 14 is a relay lens for lighting. Reference numeral 15 denotes a cemented prism. The cemented prism 15 has a function of making the optical axis of the illumination system and the optical axis of the light receiving system coaxial, and includes an inner reflective surface 15a and a semi-transparent and semi-reflective surface 15b. Here, a light source 11, a condenser lens 12, bright or dark field apertures 13A and 13B,
The illumination relay lens 14, the cemented prism 15, and the objective lens 6 constitute an illumination system, and the light beam emitted from the objective lens 6 epi-illuminates the wafer 6. Next, 16 is a relay lens, 17 is a mirror that bends the optical path, and 18 is a glass plate having a reference mark for TV pre-alignment.The reference mark has the function of giving the origin of coordinates, so the pre-alignment mark is It will be detected as a coordinate value and a Y coordinate value. 19 is an imaging lens, which includes the above-mentioned cemented lens 15, relay lens 16, and mirror 1.
7. The glass plate 18, the imaging lens 19, and the imaging tube 7 constitute a light receiving system, and the optical path passing through the objective lens 6 is reflected by the inner reflective surface 15a of the cemented prism, reflected by the semi-transparent surface 15b, and then reflected again by the inner reflective surface. 15a
It is reflected by the beam and goes towards the relay lens 16. wafer 4
The upper pre-alignment mark image is formed on the glass plate 18 having the reference mark, and then is imaged on the imaging surface of the image pickup tube 7 together with the reference mark image. On the other hand, the television pre-alignment mark illustrated in FIG. 3A or the fine alignment mark described later is preferably provided in the scribe line of the wafer, but may also be provided at a specific chip pattern position on the wafer. The illustrated marks are cross-shaped marks provided within the scribe line, and are arranged so that the direction of the cross pattern is substantially parallel and perpendicular to the scanning direction of the imaging tube. Hello again,
For example, if a cross pattern is made up of a collection of minute bar-like protrusions tilted at 45 degrees in the scanning direction, and dark-field illumination is applied so that the illumination light hits the protrusions from a direction perpendicular to them, an extremely clear pattern shape can be imaged. . The reference mark may also be a crosshair pattern etched into a chrome mask, for example. The line width position of the crosshair may be arbitrary, but it is desirable that it be located toward the corner of the field of view of the television, parallel to and orthogonal to the scanning line direction of the television. As mentioned above, this fiducial mark is made of a thin chromium film and does not transmit light, so observing it in bright field allows for a higher S/R than in dark field.
It can be detected by N ratio. That is, the reference mark position is first read in a bright field state, and then the pre-alignment mark is read in a dark field state. Returning to FIG. 2, the detection action of the pre-alignment mark will be described, and the electrical processing of the detected video signal will be described later. The light flux from the illumination light source 11 is converged by the condenser lens 12, illuminates the aperture of the bright field diaphragm 13A or the dark field diaphragm 13B, further passes through the illumination relay lens 14, and is transmitted through the semi-transparent surface 15b of the cemented prism. The light is reflected by the reflective surface 15a and passes through the objective lens 6 to illuminate the wafer 4. The light beam reflected by the surface of the wafer 4 is subjected to an imaging action by the objective lens 6, enters the cemented prism 15, is reflected by the reflective surface 15a, and then passes through the semi-transparent surface 15.
b. It is reflected by the reflective surface 15a and emitted, relayed by the relay lens 16, reflected by the mirror 17, and imaged on the glass plate 18, and then imaged on the imaging tube 7 by the imaging lens 19. At that time, as described above, the reference mark on the glass plate 18 is imaged with the bright field diaphragm 13A inserted, the origin of the coordinates is determined from that image, and then the pre-alignment mark image is clearly seen by switching to the dark field state. This is imaged to detect the position of the pre-alignment mark image.
The wafer stage 5 moves and stops so that the wafer 4 occupies a prescribed position 4' in the projection field of the projection lens 3 in accordance with the position of the pre-alignment mark detected by electrical processing to be described later. In addition,
The wafer 4 may be once aligned in a standard position and then deformed so as to be moved into the projection field. Next, the mask 1 is aligned with the wafer 4, and FIG. 3B shows an example of alignment marks used for this fine alignment. Here, W ₁ , W ₂ , W ₃ , W ₄ are bar-shaped elements written on the wafer, and the scanning line LA
Parallel elements W ₁ and W ₂ form an angle of 45° with respect to the plane, and parallel elements W ₃ and W ₄ have opposite inclinations. Also
M ₁ and M ₂ are rod-shaped elements written on the mask, at a 45° angle to the scan line and with opposite slopes. Note that the X direction is parallel to the scanning line, and the Y direction is perpendicular to it.
In order to control the three degrees of freedom in direction and rotation, the mask and wafer alignment marks each have two alignment marks.
Write as one set. FIG. 4 shows a mark detection device for fine alignment, and its configuration is generally known from Japanese Patent Laid-Open No. 54056/1983. Number 20 is a laser light source, 2
1 is a condensing lens, and 22 is a rotating polygon mirror. Further, 23 is a relay lens, 24 is a microscope objective lens, and 25 is an aperture disposed on one focal plane of the microscope objective lens 24. 26 is a beam splitter, and 27 is an observation illumination unit. The light beam emitted from the observation illumination unit 27 is reflected by the beam splitter 26, and after condensing at the aperture 25, it passes through the microscope objective lens 24 and vertically illuminates the mask 1. Use epi-illumination. On the other hand, 28 is a condenser lens, 29 is a filter that blocks the light beam specularly reflected by the mask 1 and the wafer 4, and 30 is a photocell. With the above configuration, the laser light from the laser light source 20 is converged by the condenser lens 21, diverged, and enters one mirror surface of the rotating polygon mirror 22, where it is subjected to a scanning action.
Next, the laser beam passes through a relay lens 23, a beam splitter 26, a microscope objective lens 24,
The light is focused on the mask 1, and also focused on the wafer 4 which is conjugate with the mask 1 with respect to the projection lens 3, and is scanned thereon. When the alignment mark is scanned with a laser beam as shown by the scanning line LA in FIG. 3B, the light scattered at the edge of the alignment mark passes through the microscope objective lens 24, relay lens 23, and second beam splitter 26. The light enters the condenser lens 28, and after the regular reflection component is blocked by the filter 29, it enters the photocell 30 and is output as a pulse train. In Figure 3B, the deviation in the X direction between the mask 1 and the wafer 4 is equal to the deviation between the distance between W ₁ and M ₁ and the distance between W ₃ and M ₂ , and the deviation in the Y direction is the difference between the distance between W ₁ and M ₁ . Since this appears as an equal amount of deviation between the intervals of M ₂ and W ₄ , the values in the X direction and Y direction are calculated from the pulse interval corresponding to each interval. In Fig. 4, the alignment marks on one side of the mask 1 and wafer 4 are detected, but in reality the configuration is such that both sides are measured at the same time.
Errors in the X direction, Y direction, and rotational direction between the mask 1 and the wafer 4 can be calculated from the values in both the X direction and Y direction. Therefore, in this apparatus, the mask holder 2 holding the mask 1 can be moved by the calculated values in the X direction, Y direction, and rotational direction to accurately align the mask 1 and the wafer 4. When this alignment is completed, the mask 1 is illuminated with illumination light from the light source 10a, and the wafer 4 is exposed with the circuit pattern image reduced and projected by the projection lens 3. In addition, when the field of view of the fine alignment detection device shown above is reduced, the mask 1 must also be set with a predetermined accuracy, but this is done by using the fine alignment detection device and placing it outside the alignment mark. This can be carried out using a conventional pre-alignment method that detects the setting mark 1a. FIG. 5 schematically shows the electrical processing system for television pre-alignment and fine alignment. A is the head of the television camera, which is equipped with an image pickup tube or CCD.
B is a television camera control section that controls the television camera section, and C is a television pre-alignment detection circuit. Further, D is a light sensor section consisting of a photo transistor and an amplifier, E is a fine alignment detection circuit, and F is a control circuit consisting of a microcomputer, memory, etc. serving as a detection means. The television pre-alignment detection circuit C generates a television synchronization signal for driving the television camera head A and transmits it to the television camera control section B.
On the other hand, the image signal scanned by the television camera head section A is passed through the television camera control section B.
It is sent to the television prealignment detection circuit C as a video signal. In the television pre-alignment detection circuit C, these video signals are digitally processed, and from the data, a microcomputer in the control circuit F detects the position of the television pre-alignment mark shown in FIG. Based on the position information, the wafer stage is moved to the auto-alignment position of the printing optical system. In auto-alignment, for example, the photo sensor D detects the light reflected by the pattern shown in FIG. 3B, and the signal is sent to the auto-alignment detection circuit E.
The pattern is digitized and the pattern spacing is measured.
This measured pattern interval data is again processed by the microcomputer in the control circuit F to perform alignment between the wafer and the mask. FIG. 6 is a block diagram showing one embodiment of a television prealignment detection circuit. There are various methods for detecting the television pre-alignment mark shown in FIG. 3A, but the embodiment shown in FIG. and Y direction (vertical direction), respectively. The advantage of addition is that random noise is averaged by addition, improving the S/N ratio.
Position detection in the X direction and Y direction can be performed independently, making detection simple. For example, the memory capacity for storing image data is reduced. In the block diagram of FIG. 6, a block X surrounded by a broken line is a block that adds the density of pixels in the X direction, and a block Y is a block that adds the density of pixels in the Y direction. In FIG. 6, 31 is a video amplifier, 32
is an analog-to-digital converter, and 33 is a latch. The video signal sent from the television camera control section (FIG. 5B) is amplified by the video amplifier 31, digitized by the analog-to-digital converter 32, and then sent to the latch 3. Stored. The output data of latch 33 is output to addition block X in the X direction and addition block Y in the Y direction. In block Y, 34 is an adder that adds data in the Y direction, 35 is an addition output latch that latches the output data of the adder 34, 36 is a Y-direction integration memory that stores the data of the addition output latch 35, and 37 is a memory 36. This is a summing input latch that latches the output data of . In the block X, 38 is an adder that adds data in the X direction, 39 is a latch that latches the output of the adder 38, and 40 is an X-direction integration memory that stores the output data of the latch 39. Although there is no particular limitation on the number of bits of digital data in these circuits, for example, the analog-to-digital converter 32 has an 8-bit configuration, and the adders 34, 38 and memories 36, 40 have a 16-bit configuration. On the other hand, 41 is a sequence and memory control circuit that controls the timing and sequence of the television pre-alignment detection circuit, as well as read/write and chip selection of the memory 36, and 42 is a memory control circuit that controls the memory 40 in block X. It is a circuit. 43 is a control register for controlling the sequence and memory control circuit 41 by a microprocessor (not shown), and the input of the register is connected to the data bus 44 of the microprocessor. The microprocessor also uses this data bus 44.
It is possible to access the memories 36 and 37 via. 45, 46, 47, and 48 are buffers for this purpose, and buffers 45 and 47 are used when the microprocessor writes data to the memory.
Further, buffers 46 and 48 operate when reading data. 49 is a clock circuit, and 50 and 51 are memory write address circuits and memory read address circuits that generate write addresses and read addresses for the Y-direction accumulation memory 36. 52 is the memory read address and write address.
An address selector 53 for switching addresses is an address buffer when the microprocessor accesses the memory 36.
The output of the buffer 53 is selected, and the output of the buffer 53 is prohibited. 54 is a memory address circuit that generates an address for the X-direction integration memory 40; 55;
is an address selector that switches between the address of the memory address circuit 54 and the address generated when the microcomputer accesses the memory 40. Reference numeral 56 denotes a TV synchronization signal generation circuit that generates a TV horizontal synchronization signal, vertical synchronization signal, blanking signal, etc. based on the clock of the clock circuit 49. 57 and 58 are an X position display register and a Y position display register, respectively, which are connected to the data bus 44 of the microcomputer, and 59 is a marker display circuit, which allows the microprocessor to detect the position of the alignment mark detected during TV prealignment. By outputting to the X position display register 57 and the Y position display register 58, the marker display circuit 59 sends the signal as a mix signal to the video input terminal of the TV camera control section.
The X, Y position display registers 57 and 58 act as storage means for storing the detected position of the alignment mark. Next, the function and operation of the television pre-alignment detection circuit shown in FIG. 6 will be explained. The function of the TV pre-alignment detection circuit is
These are the integration of data in the X direction, the integration of data in the Y direction, and the display of the pre-alignment mark detection position on the TV monitor. Of these, the integration of data in the X direction and the integration of data in the Y direction are performed by the hardware of the television pre-alignment detection circuit, and the added data is stored in the memory. The data addition is performed in units of one frame of the television signal, and as described later, the addition may be completed with one frame, or the addition of a plurality of frames may be performed as necessary.
In either case, during addition, the memories 36, 40
The data bus and address bus of the microprocessor are electrically separated from the data bus 44 and address bus of the microprocessor, and the address of the memory 36 is determined by the address selector 52, and the address of the memory 40 is determined by the address of the address circuit 54. connected to the sequence and memory control circuit 4
1, and a read/write signal and a chip select signal generated by hardware from the memory control circuit 42, the addition is executed. When the addition of a predetermined number of frames is completed, an addition end signal is generated from the sequence and memory control circuit 41 on the interrupt signal line INT.
After the addition completion signal is generated, the microprocessor accesses the memory 36 and the memory 40 and detects the television pre-alignment mark position from the addition data. When the microprocessor accesses the memories 36 and 40, the memory addresses, read/write signals, chip select signals, etc. are naturally controlled by control signals from the microcomputer. Further, data in the memory 36 is sent to a data bus 44 via a buffer 46, and data in the memory 40 is sent to a data bus 44 via a buffer 48, and read by the microprocessor. By the way, before explaining the addition in the X direction in block X and the addition in the Y direction in block Y in FIG. 6, a pixel division method will be described with reference to FIG. FIG. 7 shows pixels in which a television screen is divided into N parts in the X direction and M parts in the Y direction. Pixel Pli indicates the pixel in the l-th row and i-th column. Y
The number of divisions M in the direction usually matches the number of horizontal scanning lines. Therefore, in order to divide into pixels, an analog-to-digital converter (Fig. 6, 32) is used to divide N into pixels within one horizontal synchronizing signal section. It is sufficient to perform sampling twice. Therefore, the addition in the X direction is S _X1 = DATA ( _{P 11} ) + DATA (P ₁₂ ) + ...+DATA (P _{1N ) , S , ... S _ _ _ _ _} ), S _Y2 = DATA (P ₁₂ ) + DATA (P ₂₂ ) + ...DATA (P _M2 ), ... S _YN = DATA (P _1N ) + DATA (P _2N ) + ... + DATA (P _MN ), It will be done. When the addition is completed, the X-direction integration memory 40
Data _of S _X1 , S _{X2 . . .} S Assuming that television scanning is not an interlaced system but a line sequential system, the order of data output from the analog-to-digital converter 32 is DATA (P ₁₁ ), DATA (P ₁₂ ), ...DATA
(P _1N ), DATA (P ₂₁ ), ...DATA (P _MN ). Therefore, addition in the X direction continues by adding one scanning line,
While the result can be stored in memory,
Addition in the Y direction requires reading data from the memory for each pixel, adding the data, and storing the result at the address just read. The number N of divided pixels in the horizontal direction is determined by the required alignment accuracy, but is usually about 500 pixels, and therefore the sampling rate for one pixel is 100 nanoseconds or less. Therefore, in addition in the Y direction, analog-to-digital conversion, memory read/write, and addition operations must be performed within 100 nanoseconds. This requires a huge burden on the hardware and cannot be easily achieved. In order to solve this problem, the adder circuit of FIG. and memory 3
A latch 3 is connected to the output of 6 and the input of adder 34, respectively.
3, 35, and 37 are provided to realize high-speed calculation relatively easily. In this circuit, each of the operations of analog-to-digital conversion and memory read/write addition can be performed in less than 100 nanoseconds, so the apparent operating speed is three times slower than the conventional example, and the hardware design becomes much easier. Next, the time-series operation of the adder circuit will be explained in detail using Tables 1 and 2. These two tables take the horizontal operation cycle and show the data flow of each device.Table 1 is the addition in the Y direction (block Y in Figure 6), and Table 2 is the
This figure shows the operation of directional addition (block X in FIG. 6).

[Table] First, to explain Table 1, the addition operation basically consists of three cycles.
For example, T1, T2, and T3 are each 100 as mentioned above.
It is a nanosecond. Further, for convenience of operation, each cycle T1, T2, T3 is divided into two parts each having 50 nanoseconds, and these cycles are represented by _t11 , _t12 , _t21 , _t22 , _t31 , and _t32 . Now, the density data of the i-th (O≦i≦N) pixel Pli (see FIG. 7) of the l-th scanning line (O≦l≦M) is assumed to be DATA (Pl, i). Analog-to-digital converter 3 at clock cycle T1
Data DATA (Pl, i) digitized in 2
is stored in latch 33 in the next clock cycle T2 (Table 1) and becomes one input data for addition. On the other hand, in cycle _t12 , the content S _l-1,i of the i-th memory is read, and in cycle T2, data S _l-1,i (Table 1) is stored in addition input latch 37. This data S _l-1,i is data obtained by adding the data in the i-th row from column 1 to column (l-1), and can be written as in the following equation. S _l-1,i = DATA (P _1,i ) + DATA (P _2,i ) +...+DATA (P _l-1,i ) In other words, data S _l-1,i is the data up to one scanning line before. This is the added value of the data in the i-th column, and this is the adder 3
This is the other input data of No.4. The adder 34 receives these two input data in cycle T2.
DATA (P _l,i ) and S _l-1,i are added (Table 1).
At the end of cycle t ₂₁ , the data of the addition result is
It is output from the adder 34 as confirmed data,
In cycle _t22 , it is latched into the summation output latch 35 (Table 1). This data can be represented by S _l,i , where S _l,i = DATA(P _l,i ) + S _l-1,i . Next, in the first half of cycle T3, at t ₃₁ , the data
Store S _l,i back into memory for the ith time (Table 1). This stored data S _l,i is held until the i-th pixel of the next scanning line l+1, and the pixel
It is added to the data of P _l+1,i . When the scanning of M lines is completed in this way, the added data of S _Yi = DATA (P _1,i ) + DATA (P _2,i ) +...+P _Yi (P _M,i ) is obtained in the i-th memory. It will be done. In this way, each cycle of analog/digital conversion, addition, and memory read/write operations takes 100 cycles.
Each process of analog-to-digital conversion, addition, and memory read/write takes 3 cycles and 300 nanoseconds, but since each operation is a parallel operation, if the cycle is long enough, one process is performed in nanoseconds. is equivalent to one cycle, which takes 100 nanoseconds. Additionally, regarding Table 1 (a), if we pay attention to the operations on memory, (i)th memory read → (i-1)th memory write → (i+
1) The operation is as follows: 1st memory read → ith memory write. Therefore, as shown in FIG. 6, two address generation circuits, a memory write address circuit 50 and a memory write address circuit 51, are provided, and the address selector 52 is switched in accordance with the read/write signal to generate addresses. It is something that makes you

[Table] Next, to explain the addition in the X direction using Table 2, in cycle T1, data DATA (P _l,i ) of pixel P _l,i converted by the analog-to-digital converter 32
is stored in latch 33 in cycle T2 (this is the same operation as in Table 1(a) and is indicated by ). On the other hand, the latch 39 contains addition data of pixels from the 1st to the i-1st of the l scanning line; S _l,i-1 = DATA (P _l,1 ) + DATA (P _l,2 ) +...+DATA (P _l,i-1 ) is stored, and in cycle T2 this data is
S _l,i-1 and data DATA (P _l,i ) are added by an adder 38 (Table 2). The result of this addition is S _l,i , which is latched in latch 39 at the next clock cycle T3 (Table 2), and at the same time at the clock cycle T3.
This is one input for addition in step 3. In this way, in addition in the X direction, input data is added one after another within one scanning line, and at the end of the scanning line, S _X,l = DATA (P _l,1 ) + DATA (P _l,2 ) +... Obtain the added data of +DATA(P _l,N ). Therefore, during the horizontal scanning retrace time when one scanning line ends and the next line scanning starts, this data _S
It is sufficient to store it in the lth memory within 0. By repeating the above-described operations from the start to the end of the frame in this way, the data integration in the X and Y directions can be obtained. FIG. 8 shows another embodiment of the present invention, in which addition in the X direction (block X) and addition in the Y direction (block Y) in FIG. 6 are performed by one hardware block. In the figure, 31 to 37 and 45, 46 are the sixth
A data selector 60, which is exactly the same as shown in the figure, selects the output of the addition output latch 35 and the output of the addition input latch 37 and transmits it to one input of the adder 34.
will be provided. This data selector is shown in Figure 6.4.
1 sequence and either input is selected under the control of the memory control circuit. That is, during addition in the X direction, the output of the addition output latch 35 is
During addition in the Y direction, the outputs of the addition input latches 37 are respectively selected. FIG. 8 also shows other circuits shown in FIG. 6, such as clock circuit 49 and TV circuit 49.
Although the synchronizing signal generation circuit 56 and the like are omitted, the sixth
Block X in the figure and its surrounding circuits, e.g. 3
8, 39, 40, 42, 47, 48, 54, 55
is unnecessary in this embodiment. The function of the operation in Figure 9 is almost the same as the operation function in Figure 6, but the flow of operation is different.
The integration in the direction and the Y direction is not performed simultaneously, but in series and in time series. First, the output of the addition output latch 35 is selected by the data selector 60, and
A directional integration is performed and then the addition input latch 37
The output of is selected and integration in the Y direction is performed (note that the order may be reversed). At this time, if the memory is
If it is used for both direction and Y direction, once the microcomputer measures the position in the X direction,
It is sufficient to start the integration in the Y direction, or after the contents of the memory 36 are transferred to another memory via the data bus and the data is saved, the integration in the Y direction can be started. Although the time required for measurement using the circuit of FIG. 8 is longer than that of the circuit of FIG. 6, it has the effect of simplifying the hardware and reducing control. By the way, as mentioned earlier, in this embodiment, the integration is performed in units of frames, and the integration of multiple frames may be performed, and furthermore, there is a means for arbitrarily selecting the number of integrated frames. . FIG. 9 is a block diagram showing an embodiment of a circuit for selectively performing frame integration. The frame integration number selection circuit shown in FIG.
It is provided in the sequence and memory control circuit shown in FIG. In FIG. 9, 71 is an integration control circuit that controls the number of integrations, start of integration, stop of integration, etc.;
72 is a television frame counter circuit that counts the vertical synchronization signal of the television; 73 is a frame number instruction register; and 74 is a digital comparator circuit that compares the outputs of the television frame counter circuit 72 and the frame circuit instruction register 73. To explain the operation of FIG. 9, when an integration start signal is given to the integration control circuit 71 from a microprocessor or the like (not shown), the integration control circuit 71 receives an integration start signal from the TV synchronization signal generation circuit (56 in FIG. 6). A count start signal is provided to the television frame counter circuit 72 in synchronization with the television vertical synchronization signal. The television frame counter circuit 72 counts the number of vertical synchronization signals based on this count start signal, and counts the number of frames. On the other hand, the cumulative number of frames is given to the frame number instruction register 73 via the cumulative control circuit 71, either directly by the microprocessor or via the microprocessor by an operator's instruction using a keyboard or the like. When the television frame counter circuit 72 has counted the specified number of times of integration, the digital comparator 74 applies an end signal to the integration control circuit 71, and the integration ends. The advantage of being able to select the number of integrations is that the number of integrations can be varied depending on the screen density and SN ratio, increasing the accuracy of alignment mark detection. By selecting the number of integrations according to the required accuracy and required speed of television pre-alignment, position detection with the required accuracy can be performed at high speed. etc. Note that increasing the number of integrations may cause a carry in the addition result, so the input video signal is designed so that the gain can be controlled by the video amplifier 31, and the adder 3
4 and 38 are provided with means (not shown) for detecting the occurrence of a carry and notifying the sequence and memory control circuit 41 of the occurrence of a carry. By the way, the method of detecting the position of the alignment mark from the integrated data is not particularly limited in the present invention, but there are, for example, a method of detecting the peak of the pattern, a method of detecting the rising and falling edges of the pattern, etc. , these are detected by software by a microcomputer after the integration is completed, as described above. At this time, the coordinates of the alignment mark position are the second
It is measured from the television pre-alignment reference mark on the glass plate shown in FIG. As already mentioned, in this embodiment, the reference mark position is first read in a bright field state, and then the alignment mark is read in a dark field state. Reading a reference mark in a bright field state is exactly the same as reading an alignment mark in a dark field state, the difference being the value of the integrated data (assuming that if the video signal is bright, the data will take a large value) Among them, the alignment mark shows a value larger than the back ground, and the reference mark shows a value larger than the back ground.
This point shows a value smaller than ground. but,
This value is not essential since it is easy to set the reference mark to a value greater than the background using software or hardware. As mentioned above, the advantage of switching the observation field of view using marks is that the reference mark and alignment mark can be observed in a field of view that is less affected by background and ground, and a video signal with a high S/N ratio can be obtained. be. In Fig. 2, the apertures indicated by 13A and 13B are
Each of the bright field aperture and the dark field aperture can be electrically switched by a switching means (not shown), such as a plunger. The position of the alignment mark measured from the position of this reference mark is displayed on the screen of the monitor television 9 (FIG. 1) as described in the third section of the function of the television pre-alignment detection circuit. To explain this operation in detail with reference to FIG. 6, a microcomputer (not shown) transmits the coordinates of the detected position to the
7, given to the Y position display register 58. The outputs of these registers 57 and 58 are output to the marker display circuit 59.
Give location data to. The marker display circuit 59 compares this position display register with the television scanning position, and if they match, it is sent as a mix signal to the TV camera control section B (see FIG. 5). The television scanning position can be represented by the pixel numbers shown in FIG. 7, which are numbers 1 to N in the X direction and numbers 1 to M in the Y direction. , 40 addresses. Therefore, the X direction is the integration memory 3 in the Y direction.
6 address and the comparison of the X position display register 57,
The Y direction is the address of the integration memory 40 in the X direction and the Y
It is sufficient to compare the position display registers 58 and output a mix signal when they match. This mix signal is mixed with the video signal obtained from the TV camera head section A (image pickup tube 7) in the TV camera control section B, and displayed on the monitor television 8 (see FIG. 1). The mark to be displayed is not particularly limited, and may be a crosshair or a minute square pattern.Furthermore, this mark may blink to attract the operator's attention. A pattern such as a crosshair, which indicates the position of the alignment mark detected by the control circuit F, is synthesized and displayed on the monitor television 8 displaying the alignment mark imaged by the image pickup tube 7. Then, the operator can easily check whether the detection is accurate or not by looking at the monitor television 8. In this embodiment, it is possible to easily know in advance whether or not pre-alignment can be performed accurately based on the alignment mark. By the way, as described above, the X and Y coordinates of the pre-alignment mark can be detected with high precision, but there are cases where the inclination of the mark on the XY plane, that is, the θ position, is required. In this case, a method of detecting the θ position with one mark or a method of detecting the θ position with two marks in the field of view can be considered. However, it is delicately affected by the reflectance and scattering state of the object to be detected, and the method of calculating the θ position is extremely difficult, making it impossible to perform accurate detection. In addition, detection using two marks within the field of view requires a wide field of view because two marks must always be captured within the field of view, which reduces the detection accuracy of the θ position, X position, and Y position. There is. The present invention solves the above problems and also makes it possible to detect the θ position with high accuracy. In this example, the object to be detected is placed at a predetermined distance (for example, a predetermined distance in the X direction).
Two separate mark positions are provided, and in the first measurement, one of the aforementioned marks (first mark) is set.
is placed within the field of view of the television, and the X and Y positions of the first mark are detected using the method described above.
Next, move the wafer stage (Fig. 1, 5) by a predetermined amount.
It moves in the X direction by X _T , captures the other mark (second mark) within the field of view of the television, and similarly detects the X and Y positions of the second mark. At this time, if the first mark position is X ₁ , Y ₁ , the second mark position is X ₂ , Y ₂ , and the amount of stage movement is X _T , then the slope θ is θ=tan ^-1 (Y ₂ − Y ₁ /X _T +X ₂ −X ₁ ). Here, if the amount of movement X _T is set sufficiently large, θ can be determined with high accuracy. That is, the method described above allows the tilt θ to be detected with high accuracy using a simple method of moving the stage. Incidentally, depending on the required position detection accuracy, detection of the inclination θ may not be necessary. In such a case, only the first mark described above is detected, the mark positions X and Y are detected, and the operation shifts to TTL auto alignment mark detection. The selection of whether to detect the inclination θ from the first and second marks or to detect only the first mark may be determined by a microcomputer based on detection accuracy, etc., or the operator may select whether to detect the inclination θ from the first and second marks or only the first mark. Instructions may be given by In other words, by providing a choice between two-point measurement, which takes a little time but allows highly accurate position detection, or one-point detection, which is slightly less accurate but can speed up detection, efficient position detection can be achieved. equipment can be provided. As described in detail above, the present invention captures an image of an alignment mark formed on an object such as a wafer using an imaging means (an imaging tube or a solid-state imaging device), and performs alignment based on a video signal obtained at this time. In a device that detects the position of a mark, an image indicating the position of the alignment mark detected based on the video signal is combined with the image of the alignment mark and displayed on a receiver that displays the image of the alignment mark according to the video signal. As a result, the operator can easily and quickly confirm whether or not the apparatus has been able to accurately detect the position of the alignment mark simply by visually checking the screen of the receiver. Further, according to the present invention, the object
When the object is in the first position, the alignment mark formed on the object is imaged using an imaging means, and the position of the alignment mark when the object is in the first position is detected based on the video signal at this time, and the detection result is When applied to a device that aligns an object when the object is moved from a first position to a second position, the operator can know in advance whether or not the object will be accurately aligned at the second position. Therefore, it is possible to prevent inaccurate alignment operations from proceeding.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing the appearance of a printing device according to the present invention. FIG. 2 is an optical perspective view of the television pre-alignment detection system. FIG. 3A is a plan view of the television pre-alignment mark, and FIG. 3B is a plan view of the fine alignment mark. FIG. 4 is an optical cross-sectional view of the fine alignment detection system. FIG. 5 is an electrical block diagram showing an outline of the signal processing system. FIG. 6 is an electrical block diagram showing an example of a television pre-alignment detection circuit. FIG. 7 is an explanatory diagram for explaining the pixel division method of a television screen. FIG. 8 is an electrical block diagram showing another example of the television prealignment detection circuit. 9th
The figure is an electrical block diagram of the TV frame integration number selection circuit. In the figure, 1 is a mask, 2 is a mask chuck, and 3 is a mask.
is a reduction projection lens, 4 is a wafer, 5 is a wafer stage, 6 is an objective lens, 7 is an image pickup tube, 1
1 is an illumination light source, 13A is a bright field diaphragm, 13B is a dark field diaphragm, PM is a television pre-alignment mark, W1 to W4 and M1, M2 are fine alignment marks, 20 is a laser light source, 22 is a rotating polygon mirror, 24 30 is a microscope objective lens, 30 is a photo cell, A is a television camera head section, B is a television camera control section, C is a television pre-alignment detection circuit, D is an optical sensor section, E is a fine alignment detection circuit, and F is a fine alignment detection circuit. control circuit, 31
is a video amplifier, 32 is an analog/digital converter, 33 is a latch, 34 and 38 are adders, 3
5 and 39 are addition output latches, 36 and 40 are memories, 37 is an addition input latch, and 41 is a sequence &
Memory control circuit, 42, memory control circuit, 43, control register, 44
is a data bus, 45 to 48 are buffers, 49 is a clock circuit, 50 is a memory/write address circuit, 51 is a memory/read address circuit, 52 is an address selector, 53 is a buffer, 54 is a memory/address circuit, and 55 is an address. selector, 5
6 is a television synchronization signal generation circuit, 57 is an X position display register, 58 is a Y position display register, and 59 is a marker display circuit.

Claims (1)

[Claims] 1. An alignment mark formed on an object is imaged by an imaging means, and a video signal outputted from the imaging means is processed to detect the position of the alignment mark by a detection means. storing a data signal corresponding to the position of the alignment mark detected by the means in a storage means, displaying an image of the alignment mark on a screen of an image display means based on a video signal from the imaging means; An image of a detection position display mark indicating the position of the alignment mark detected by the detection means is synthesized with the image of the alignment mark and displayed on the screen of the image display means based on a data signal from the means. Characteristic position detection method. 2. The position detection method according to claim 1, wherein the image of the detected position display mark is displayed in a blinking manner on the screen of the image display means.