JPS6355287B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to digital relays.

Figure 1 shows the basic configuration of a digital relay, which transmits analog data of current and voltage of power system 1, respectively.
This analog data is input via the CT and PT, and is added to the A/D converter 3 via the input converter 2, where it is converted into digital data.The digital data is then added to the computer 4, where digital arithmetic processing is performed. In the event of an accident in the power system 1, the computer 4 outputs an operational output to trip the circuit breakers provided in the power system 1, thereby protecting the power system 1.

By the way, in the digital relay described above, it is necessary to have a so-called hysteresis characteristic by making the operating value and the return value different. Conventionally, when the computer 4 performs one operation, an operation flag is set, and the above hysteresis is achieved by comparing the operation level and return level at two addresses in the memory with the calculation results of the computer 4 depending on the state of the operation flag. It had characteristics. However, in this case, the software processing time will be longer,
Devices such as digital relays that must process at extremely high speeds have the disadvantage that follow-up processing is not possible unless a high-speed computer is used.

The present invention eliminates the above-mentioned drawbacks and makes the operating value have a hysteresis characteristic of the return value by switching the address of the operating level and the return level in the computer by hardware, thereby achieving high-speed processing of the hysteresis characteristic. It is an object of the present invention to provide a digital relay whose hysteresis characteristics can be processed by a normal computer rather than a high-speed computer.

Embodiments of the present invention will be described below with reference to the drawings.
Figure 2 shows the inside of the computer 4, where 5 is a central processing unit (CPU), 6 is an input/output device (I/C),
7 is an address circuit; 8 is a memory that stores the operating level and return level of the digital relay; to the address circuit 7, an operating output is applied from an output line 9 that outputs the operating output of the digital relay; An address signal at an operating level is applied to the address circuit 7 through the address circuit 10.
If there is no operation output, the address signal at the operation level from the central processing unit 5 is directly added to the memory 8, and if there is an operation output, this operation output signal and the address signal from the central processing unit 5 are added to the memory 8. An address signal at the return level is generated based on the address signal at the operating level and is applied to the memory 8. The basic configuration of the digital relay according to this embodiment is the same as that shown in FIG.

In the digital relay described above, when there is no operational output, the address circuit 7 applies the operational level address signal issued by the central processing unit 5 to the memory 8 as it is, and the operational level stored in the memory 8 is transferred to the data bus 11. The information is transmitted to the central processing unit 5 via the computer. In the central processing unit 5, calculations are performed based on the digital data from the A/D converter 3, and when the calculation result is compared with the operating level from the memory 8, if the calculation result exceeds the operating level. At this time, an operation output is output from the central processing unit 5 via the data bus 11 and the input/output device 6 to the output line 9, and the sheath breaker is disconnected. Next, when this operation output is output, the address circuit 7 generates an address signal at the return level from the operation output and the address signal at the operation level from the central processing unit 5.
Add to memory 8. Therefore, the return level stored in the memory 8 is transmitted to the central processing unit 5 via the data bus 11, this return level is compared with the calculation result in the central processing unit 5, and the calculation result is lower than the return level. When this happens, the operation output that was being output from the central processing unit 5 via the input/output device 6 disappears, and the digital relay returns to its normal state.

As described above, in the present invention, in a digital relay that performs arithmetic processing by a computer based on data obtained from the power system, the operational output and the operational level address signal from the computer's central processing unit are added, and the operational output is If there is no output, the address signal is directly applied to a memory that stores the operation level and return level, and when there is an operation output, an address circuit is provided which generates an address signal at the return level and adds it to the memory. Therefore, the hysteresis characteristic of the operating value and return value of the digital relay can be provided by hardware rather than software as in the conventional case, and the central processing unit only needs to always output an address signal at the operating level. Therefore, the software processing time can be shortened, and the process for imparting hysteresis characteristics can be performed not only by a high-speed computer but also by a normal computer.

[Brief explanation of the drawing]

FIG. 1 is a basic configuration diagram of a digital relay, and FIG. 2 is a configuration diagram inside a computer in a digital relay according to the present invention. 1...Power system, 3...A/D converter, 4...Computer, 5...Central processing unit, 7...Address circuit,
8...Memory, 9...Output line, 10...Address bus,
11...Data bus.

Claims (1)

[Claims] 1. In a digital relay that converts analog current and voltage data obtained from the electric power system into digital data and performs digital calculation processing by a computer based on the digital data, the address of the operational output of the computer and the operational level of the central processing unit. When the operation output is present, an address signal of the return level is generated and this address signal is added to the memory that stores the operation level and the return level, and when there is no operation output, the address signal of the return level is generated. A digital relay comprising an address circuit for applying an address signal to the memory.