JPS6355930B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display circuit that allows analog phenomena that change over time to be observed by drawing a Lissage figure on a CRT screen.

Generally, when drawing a Lissage figure on a CRT screen, the temporal element does not appear on the CRT screen. However, for example, in vector electrocardiograms and the like, displaying a temporal element in some form in a Lissage figure is often very effective in recognizing phenomena.

In view of this, the present invention provides a novel brightness modulation display circuit that displays a temporal element in a Lissage figure by controlling the brightness at which the Lissage figure is displayed.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the luminance modulation display circuit according to the present invention, in which 1 and 2 are Y and X memories respectively storing data forming a Lissage figure, and 3 and 4 are readout blocks. A D/A converter converts the contents of the memories 1 and 2 into analog signals, 5 and 6 are driver circuits that generate a vertical deflection signal V and a horizontal deflection signal H, respectively, as outputs, and 7 is for display. A display address counter that is operated by clock A and controls reading by specifying the addresses of Y memory 1 and X memory 2; 8 is a brightness modulation setting counter that is operated by brightness modulation clock B; 9 is a display address counter. 7 contents M and brightness modulation setting counter 8 contents N
10 is a brightness modulation circuit that modulates the brightness of the CRT 11 in accordance with the output C.

Here, in the Y memory 1 and the X memory 2, analog signals as shown in FIGS. 1a and 1b are A/D converted by some method and stored in advance.

Therefore, the repetition frequency of display clock A is
If the frequency is 72KHz and the number of memories in Y memory 1 and X memory 2 is 1200, the display address counter 7 sequentially reads out the contents from Y memory 1 and The output data is converted to D/A by D/A converters 3 and 4.
are converted and input to the CRT 11 as vertical and horizontal deflection signals V and H via drivers 5 and 6,
A liturgical figure as shown in FIG. 1c is displayed in high-speed refresh mode. At this time, the refresh rate of the entire resurge display is approximately 60Hz, ignoring the retrace period.
That is, it is refreshed 60 times per second.

Therefore, if the repetition frequency of the brightness modulation clock B is set to 60Hz, which is much smaller than that of the display clock A, that is, the refresh rate of the Lissage figure, the brightness modulation setting counter 8 will change its contents according to the brightness modulation clock B. Every time the resurge figure is refreshed, the contents of the brightness modulation setting counter 8 are incremented.

Here, the comparator 9 is the display address counter 7.
The content M of the brightness modulation setting counter 8 is compared with the content N of the brightness modulation setting counter 8, and when M<N, an output C is generated.The brightness modulation circuit 10 controls the brightness of the CRT 11 according to this output C, so the brightness modulation clock When B is input to the brightness modulation setting counter 8, the content N of the brightness modulation setting counter 8 becomes "1", which corresponds to the first address of Y memory 1 and X memory 2 during the first refresh of the Lissage figure. Only the part of the Lissage figure that is displayed will be displayed brightly. During the second refresh, the portions corresponding to the first and second addresses of both memories 1 and 2 are displayed brightly, and during the third refresh, the portions corresponding to the first through third addresses are displayed brightly, as shown in Fig. 1d. As shown by the thick line, the bright portions, that is, the high brightness portions gradually increase.
The speed at which the high brightness area increases is determined by the repetition frequency of the brightness modulation clock B, and by changing the repetition frequency, the speed can be changed arbitrarily. Here, the repetition frequency B is 60
Hz, it takes 1200/60, or about 20 seconds, for the entire Lissage figure to become a high brightness area.

In this way, the entire Lissage figure is displayed in a high-speed refresh display, but since the high-brightness portion slowly extends over the Lissage figure in a linear manner, the time course of the phenomenon can be recognized.

Next, another embodiment of the present invention is shown in FIG.

In FIG. 3, the comparator 9 is composed of a coincidence circuit 12 and a single-shot circuit 13, and the other parts are the same as in FIG.

This matching circuit 12 generates an output only when the content M of the display address counter 7 and the content N of the brightness modulation setting counter 8 match.
Further, the single-shot circuit 13 generates an output for a certain period of time in response to the output of the matching circuit 12.

Therefore, in this circuit, the high brightness area does not extend linearly as shown in FIG. 1d, but instead the high brightness point moves as if changing its position sequentially over time as shown in FIG. 1e.

Note that, for example, by stopping the supply of the brightness modulation clock B to the brightness modulation setting counter 8, it is also possible to stop the display of the high brightness portion indicating the temporal element as described above.

By the way, in the embodiment, the counter 8 is used as the brightness modulation setting means, but instead, for example, a memory may be used and the contents may be read out sequentially from this memory in accordance with the brightness modulation clock B. Various means can be considered.

The brightness modulation display circuit according to the present invention can display temporal elements in the Lissage figure by displaying linear or dotted high-intensity parts in the Lissage figure, making it possible to observe temporal changes in phenomena. It has the great effect of being able to

[Brief explanation of drawings]

1a and 1b are waveform diagrams showing signals stored in Y memory 1 and X memory 2, respectively; FIG. 1c is a waveform diagram showing a Lissage figure to be displayed; A waveform diagram showing a display example of the brightness modulation circuit, and FIGS. 2 and 3 are block diagrams showing an embodiment of the brightness modulation display circuit according to the present invention. Explanation of main figure numbers, 1...Y memory, 2...X memory, 3, 4...D/A converter, 5, 6...driver circuit, 7...address counter for display, 8...
...Brightness modulation setting counter, 9...Comparator, 10...
...Brightness modulation circuit, 11...CRT, 12...matching circuit, 13...single circuit.

Claims (1)

[Claims] 1. A first method for digitally storing analog phenomena.
and a second memory, a display address counter that is operated by a display clock and specifies addresses of both the memories and controls reading, and first and second Ds that convert the contents of the two memories into analog signals, respectively. /A converter, and a CRT into which signals corresponding to the outputs of the first and second D/A converters are input as vertical and horizontal deflection signals, and a Lissage figure is drawn on the screen of the CRT. In the display circuit, a brightness modulation setting means operated by a brightness modulation clock having a lower repetition frequency than the display clock, a comparison circuit for comparing the contents of the brightness modulation setting means and the display address counter, and the comparison circuit. A brightness modulation display circuit comprising: a brightness modulation circuit that controls the brightness of the CRT according to the output of the CRT, and displays lines or points that change over time on the Lissage figure. 2. In claim 1, the comparison circuit includes a matching circuit that compares the contents of the brightness modulation setting means and the display address counter and detects a match, and outputs an output for a certain period of time according to the output of the matching circuit. A brightness modulation display circuit characterized by comprising a single-shot circuit that generates.