JPS6358403B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a synchronous detection device, and more particularly to a device that regenerates a synchronous carrier wave using a known phase control loop and uses this signal to synchronously detect an amplitude-modulated input signal. It is something to do.

Amplitude synchronous detection devices are applied, for example, to the video detection stage of television receivers, but home receivers in particular are susceptible to changes in power supply voltage or ambient temperature, etc. due to changes in operating conditions. When the detection axis changes, the frequency characteristics of the video signal of the detection output change, resulting in a change in image sharpness, and various problems arise, such as the generation of the undesirable known 920KHz beat. It is undesirable for such a problem to occur not only over a long period of time, but also during a short period of time such as when the power is turned on.Therefore, in a video synchronous detector, the detection axis is maintained approximately constant not only over a long period of time but also in a short period of time. It is necessary. The present invention has been made in view of the above points,
Embodiments of the present invention will be described below in detail with reference to the drawings, but first a known phase detector will be described.

FIG. 1 shows the configuration of a phase detector using a known double-balanced cascode amplifier. Transistors Q ₁₀₁ and Q ₁₀₂ forming the input differential amplifier stage
An input signal E ₁ is supplied between the base electrodes of , and the emitter electrodes are connected through resistors R ₁₀₁ and R ₁₀₂ , and a constant current source I ₁ is placed at the midpoint of the connection. Transistors Q ₂₀₁ , Q ₂₀₂ , Q ₂₀₃ , and Q ₂₀₄ select the signal current path of Q ₁₀₁ and Q ₁₀₂ using the synchronous carrier wave E ₂ , and there is a resistor with opposite polarity between the load resistors R ₁₀₁ and R ₁₀₂ . A video signal is obtained. This kind of circuit, also called a four-quadrant multiplier, outputs the product of the input signal _E1 and the synchronous carrier wave _E2 , and _Q201 to
The transistor Q ₂₀₄ performs the product operation. FIG. 2 shows a block diagram of the phase detector described above, in which the amplifier 10 is an input differential amplification stage formed by transistors Q ₁₀₁ and Q ₁₀₂ , and the multiplier 20 is a current path formed by transistors Q ₂₀₁ to Q ₂₀₄ . Each corresponds to the selection switch stage. The aforementioned resistors R ₁₀₁ , R ₁₀₂
The purpose is to linearize the nonlinear voltage-current conversion characteristics of transistors Q ₁₀₁ and Q ₁₀₂ , and it can be removed for extremely low level input signals E ₁ , but it is usually about 100mvp-p. Therefore, it is necessary in a phase detector used as a video detector. On the other hand, when the phase detector shown in Fig. 1 is applied to a phase comparison stage (hereinafter referred to as an APC detector) in a phase control loop for regenerating a synchronous carrier wave, the nonlinear distortion of this stage is practically does not cause any problems. Therefore, in many cases, the emitter electrodes of the input differential amplification stage are usually linearly coupled without using a resistor in order to increase the amplification degree.

In a synchronous detection device, the input signal E ₁ and the synchronous carrier E ₂ are used in the parts that perform the multiplication operation of the video detector and APC detector as described above.
The relative phase difference between the two must be approximately 0 or π (rad) for a video detector, and π/2 (rad) for an APC detector. However, as mentioned above, the required performance is different between the two detectors, so the method of coupling the emitter electrodes of the input differential amplifier stage is different. In actual transistors, the converted current phase is used as the input signal.
It is difficult to maintain E ₁ to 0 or π (rad). Therefore, video detector and APC
The relative phase difference of the synchronous carrier wave with the detector is set as π/
It is necessary to make the phase difference by more than 2 (rad), and usually the phase shifter that shifts the output signal of the voltage controlled oscillator that generates the synchronous carrier wave by approximately π/2 (rad) is detuned from a predetermined value, or It is conceivable to arrange a synchronous carrier amplification stage on either the video or APC detector side to absorb the relative phase difference between the signal currents converted by the input differential amplification stages of two wave detectors. However, due to changes in operating conditions such as changes in operating current caused by changes in power supply voltage and changes in temperature, the relative signal current phase difference that occurs in the input differential amplifier stage of the detector itself and this phase difference are In practice, it is extremely difficult to maintain a constant relative phase difference between the phase shift component of the synchronous carrier amplification stage arranged for cancellation.

The present invention is capable of stably maintaining the two detectors on a predetermined detection axis while using a detector configuration that can meet the different required performances of the video detector and the APC detector as described above. We aim to provide the following. In the synchronous detection device according to the present invention, two synchronous carrier waves formed relatively orthogonal to each other, in other words, the output signal of the voltage controlled oscillator and the signal obtained by shifting the phase of the signal by π/2 (rad) are at least different from each other. The signal is supplied to a video detector and an APC detector via a dynamic amplifier. The operating point and circuit configuration of this differential amplifier are selected so as to cancel the amount of phase shift of the converted signal current with respect to the input signal voltage caused by the input differential amplifier stage of the coupled detector.

The present invention will be explained below with reference to the drawings. FIG. 3 shows an embodiment of a synchronous detection device according to the present invention.
In the figure, an amplifier 11 and a multiplier 21 constitute a video detector, and an amplifier 12 and a multiplier 22 constitute a video detector.
Configure each APC detector and input signal voltage E ₁
are converted into signal currents by amplifiers 11 and 12 and supplied to multipliers 21 and 22, respectively.

The output of the APC detector, in other words, the multiplier 22
The output signal controls the oscillation frequency of the voltage-controlled oscillator 40 via the low-pass filter 30. Oscillator 40
The output signal of is sent to the multiplier 2 via the amplifier 52.
This is the synchronous carrier wave supplied to 2.

Amplifier 52 is selected to have the same grounding type as amplifier 12, and its operating points are also set to be approximately the same. If the amplifier 12 is an input differential amplification stage of a known double-balanced cascode amplifier as shown in FIG. configured. Thus, amplifiers 12 and 52 allow the phase shift effect produced by the amplifiers to vary equally with changes in operating conditions. That is, since the relative phase difference between the two input signals of the multiplier 22 is controlled to approximately π/2 (rad) by the phase control loop, the relative phase difference between the input signal voltage E ₁ and the output signal voltage of the oscillator 40 is The phase difference can also be maintained at π/2 (rad).

It is shown that the output signal of the oscillator 40 is supplied to the multiplier 21 constituting the video detector via a phase shifter 60 and an amplifier 51. The operating points and circuit configurations of the amplifiers 51 and 11 on the video detector side are set under the same conditions as the amplifiers 52 and 12 on the APC detector side. Therefore, the two amplifiers 11 and 51 cancel out the phase shift effect caused by the arrangement of the amplifiers, and the phase shifter 60
(rad), the relative phase difference between the two input signals of the multiplier 21 will be 0 or π (rad).

FIG. 4 shows a specific circuit example of the synchronous detection device of the present invention. A differential amplifier 52 consisting of transistors Q ₅₂₁ and Q ₅₂₂ whose emitter electrodes are directly coupled and load resistors R ₅₂₁ and R ₅₂₂ amplifies the output signal of the oscillator 40 and is a transistor group that constitutes the multiplier 22.
A constant current source supplied to the base electrodes of Q ₂₂₁ to Q ₂₂₄ and connected to the emitter electrode of this differential amplifier 52
The current value of I ₅₂₁ is set approximately equal to the current value of constant current source I ₁₂₁ connected to the emitter electrodes of the transistor pair Q ₁₂₁ and Q ₁₂₂ of the input differential amplifier stage 12 constituting the APC detector. This constant current source can be constructed from either a transistor or a resistor. The differential amplifier 51 to which a synchronous carrier wave is supplied from the input differential amplification stage 11 and the phase shifter 60, which constitute the video detector, consists of transistor pairs Q ₁₁₁ and Q ₁₁₂ , Q ₅₁₁ and
The emitter electrode of Q ₅₁₂ is connected to resistors R ₁₁₁ and R ₁₁₂ , and R _511.
Constant current sources _{I 111 and} I ₅₁₁ are connected to the midpoint of connection of these resistors, and their current values are set to be approximately equal. It is known that the presence or absence of a feedback resistor in an emitter circuit makes a significant difference not only in the linear operating range but also in the phase shift effect between the input and output of the differential amplifier. Furthermore, the emitter current value of each transistor results in a large change in the transition frequency. Therefore, as in the present invention, a pair of differential amplifiers whose initial currents are set to be equal and whose current changes are set to be equal will have a transition between them regardless of the presence or absence of a feedback resistor in the emitter circuit. Since the interaction can be canceled out, the detection axes of the APC detector and the video detector can be accurately maintained in a quadrature phase relationship against changes in operating conditions, such as changes in power supply voltage or temperature.

If the invention is implemented in the form of a known integrated circuit, the short-term stability, especially during power-up, can also be significantly improved. For example, one of the characteristics of integrated circuits is ensuring relative characteristics between elements formed on a single chip, and changes in characteristics are uniform even when temperature changes. Therefore, even in the process of increasing the chip temperature due to heat generation of the integrated circuit element when the power is turned on, the relative characteristics are substantially the same, so that the detection axes of the two detectors always maintain a quadrature phase relationship.

As described above, in the synchronous detection device according to the present invention, the operating point is set approximately equal to that of the input differential amplification stage of the double-balanced cascode amplifier, and the emitter electrodes are coupled via the differential amplifier configured in the same manner. Since the synchronous carrier wave is amplified by using the synchronous carrier wave, the phase shift effect caused by the amplifier can be substantially eliminated. Therefore, it is possible to realize an extremely stable device, which has great industrial value. Furthermore, the present invention is not limited to the above embodiments, and can be modified in various ways. For example, it is of course possible to arrange the emitter followers on the synchronous carrier amplification side and the input differential amplification stage side of the double-balanced cascode amplifier, or to arrange the phase shifter on the APC detector side.

[Brief explanation of the drawing]

1 and 2 are circuit diagrams and block diagrams showing a known double-balanced cascode amplifier;
The figure is a block diagram of a synchronous detection device according to an embodiment of the present invention, and FIG. 4 is a specific circuit diagram of the same device. 11, 12, 51, 52...Amplifier, 30...
Low-pass filter, 60...phase shifter, 40...oscillator,
21, 22... Multiplier.

Claims (1)

[Claims] 1. First and second transistor differential amplifiers that amplify relatively orthogonal first and second simultaneous carrier waves generated by a voltage controlled oscillator and a phase shifter, respectively. and a video detector with a double-balanced transistor cascode amplifier configuration, which is supplied with simultaneous carrier waves from these differential amplifiers.
at least an APC detector;
The input differential amplification stage of the differential amplifier and video detector, and the input differential amplification stage of the second differential amplifier and APC detector each have at least the emitter electrode coupling configuration of the differential amplification transistor pair and the operating bias current. A synchronous detection device characterized by being substantially equal to each other. 2 The input differential amplification stage of the first differential amplifier and the video detector is formed by coupling the emitter electrodes of the respective differential amplification transistor pairs via a current feedback resistor, and the second differential amplifier and the APC detection 2. The synchronous detection device according to claim 1, wherein the input differential amplification stage of the detector is formed by effectively directly coupling the emitter electrodes of each pair of differential amplification transistors. 3. The synchronous detection device according to claim 1, wherein at least the first and second differential amplifiers, the video detector, and the APC detector are formed in a single integrated circuit chip.