JPS635944B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image signal processing method for improving the recording reproducibility of facsimile image signals.

In a facsimile, a photoelectric conversion operation is performed on the original to be transmitted in the main scanning direction on the transmitter side, and the original is decomposed into pixel signals on each scanning line and then transmitted as serial image signals according to the scanning order. On the receiver side, recording scanning is performed to record dot-shaped pixels corresponding to the scanning on the transmitter side based on the received image signal, thereby obtaining a received image that is equal to the transmitted original. There is.

However, when scanning is performed mainly on the transmitter side, it may be difficult to distinguish between white and black objects with high spatial frequency components, such as thin lines on the original, due to photoelectric conversion processing, and when this is used as a received image, it is difficult to distinguish between white and black thin lines. This has the disadvantage that what should be written is often omitted, resulting in the so-called "missed reading" phenomenon.

The present invention has an object of fundamentally solving such drawbacks of the conventional art, and provides first and second discrimination levels for facsimile image signals, and white signals exceeding the first discrimination level and black signals below the second discrimination level. image signal extraction means for sequentially extracting from the image signal signals corresponding to three gradations of a signal and a halftone signal between a first discrimination level and a second discrimination level; and three signals extracted from the image signal extraction means. storage means for temporarily storing a signal corresponding to a gradation as the immediately preceding image signal, whether it is a black signal, a white signal and a halftone signal; When the halftone signal is taken out, it is determined whether the image signal immediately before the taken out halftone signal is a black signal or a white signal according to the storage contents of the storage means, and the halftone signal is continuous. and a discriminating means for maintaining this discriminating state for a period of time, and based on the judgment of the discriminating means, when the immediately preceding image signal is a black signal, a white signal is sent instead while the halftone signal from the image signal extracting means continues. Further, when the immediately preceding image signal is a white signal, means for transmitting a black signal instead of the halftone signal while the halftone signal from the image signal extracting means continues; and instead of the halftone signal from the image signal extracting means. and a means for combining and transmitting the white signal and the black signal from the image signal extracting means at the same timing. It provides a signal processing method.

Below, Figures 1 and 1 show circuit diagrams of the embodiment.
The details of the present invention will be explained with reference to the time chart of FIG. 2 showing waveforms at various parts of the figure.

In Figure 1, the clock pulse for reset
CP _r and _the sample clock pulse CP _s are given as those _shown in FIG _.
The output generation of the other D-type flip-flop circuits FF ₃ to _{FF 5} is controlled by the clock pulse CP _s .

The image signal in FIG. 2 and 3 applied to the input IN is synchronized with the clock pulse _CPr , and as shown in the figure, the upper reference line is the black level B, and the lower reference line is the white level W. The highest value of the image signal 3 applied to the input IN is held in the white level direction in the peak value hold circuit PH, and is applied to the inverting inputs of the comparators CM ₁ and CM ₂ . Peak value hold circuit
The output of PH is given to potentiometers RV ₁ and RV ₂ , from potentiometer RV ₁ the voltage of the first discrimination level L 1 for the image signal 3 is taken out, and from the potentiometer RV 2 the voltage of the first discrimination level L ₁ is taken out from the potentiometer RV ₂ . Discrimination level
The voltage of L ₂ is taken out and the comparator CM ₁ , respectively
Applied to the non-inverting input as the reference voltage for CM ₂ .

Therefore, output 4 of comparator CM ₁ is image signal 3
This occurs only when the level of CM exceeds the first discrimination level L ₁ , and the output 5 of the comparator CM ₂ similarly occurs only when the level exceeds the second discrimination level L ₂ .
A signal that produces output 4 is judged as a white signal, a signal that produces only output 5 but does not produce output 4 is judged as a halftone signal, and a signal that does not produce output 5 is judged as a black signal because it is below the second discrimination level. become. Although no particular output is generated as a black signal, it is sufficient to consider the time when output 5 is not generated as a black signal, and the three gradations of white, black, and intermediate tone are generated by the above method and the operation of AND gate _G1 described later. Signals corresponding to are sequentially extracted from the image signal 3.

Since outputs 4 and 5 have narrow pulse widths, in order to make them predetermined, flip-flop circuits FF ₁ and FF ₂ are set respectively using both outputs 4 and 5, and outputs 6 and 7 are generated. 6, 7 are reset by the falling edge of the first clock pulse _CPr after the output occurs.

Outputs 6 and 7 are D-type flip-flop circuits FF ₃ ,
These outputs 8, 9, and 15 are given as inputs to FF ₄ , but these outputs 8, 9, and 15 occur only when the rising edge of clock pulse CP _s coincides with inputs 6 and 7;
7 and the rising edge of the clock pulse _CPs coincide with each other.
Therefore, the outputs 8, 9, 7 of the D-type flip-flop circuits FF ₃ , FF ₄ are delayed by the rise time difference t ₁ between the clock pulses CP _r and CP _s than the outputs 6, 7 of the flip-flop circuits FF ₁ , FF ₂ . 15 occurred,
In addition, while outputs 6 and 7 are continuously generated, outputs 8, 9, and 15 are generated continuously, and as a result, as well as sampling and holding signals corresponding to the three gradations, the image immediately before the halftone signal is For the purpose of determining whether the signal is white or black, preparations are being made for temporary storage, which will be described later.

Inverted output 8 of D-type flip-flop circuit _FF3
The non-inverted output 9 of the D-type flip-flop circuit FF ₄ is applied to an AND gate G ₁ , and a halftone signal is taken out as its output 10 . That is, the second
Extraction of the conditions that caused only 5 in the figure is performed.

The above-mentioned components constitute an image signal extraction means that sequentially extracts signals corresponding to three gradations from an image signal. That is, the non-inverted output 15 of the D-type flip-flop _FF3 is a white signal, and the AND gate _G1
The output 10 is a halftone signal, and when both signals are absent, it is a black signal.

On the other hand, the non-inverted output 9 of the D-type flip-flop circuit _FF4 is also given to the input of the D-type flip-flop circuit _FF5 , and an inverted clock pulse 11 is obtained by inverting the clock pulse _CPs by the inverter IV.
The non-inverted output 12 is produced when the rising edge of the clock pulse 11 coincides with the rising edge of the inverted clock pulse 11, and this state is maintained until the reset state of the output 9 coincides with the rising edge of the inverted clock pulse 11. Therefore, this output 12 is further delayed with respect to the output 5 of the comparator _CM2 , so that the output 5 is temporarily stored as the immediately previous image signal.

The output 12 of the D-type flip-flop circuit FF ₅ described above is given as an input to the D-type flip-flop circuit FF ₆ , and the output 10 of the AND gate G ₁ is given as an input.
is given as a clock pulse, and input 1
2 and the rising edge of output 10 as a clock pulse produce an inverted output 13, and the reset state of input 12 and the rising edge of output 10 matching produce an inverted output 13.
is reset. That is, input 12 is the comparator
Output 5 extracted as a signal of halftone or higher in CM ₂ is temporarily stored, and the inverted output 13 based on this has a time relationship that is further delayed from output 5, and at the same time the logical value of inverted output 13 is The transition from "1" to "0" represents a black signal. This D-type flip-flop _FF6 constitutes a determining means. However, if we consider the non-inverted output that occurs at the same time, when the inverted output 13 represents a black signal, it represents a white signal;
This is the image signal immediately before the halftone signal indicated by the output 10 of AND gate G _1. When the immediately preceding image signal is a black signal, a white signal is sent out instead of the following halftone signal, so AND gate G ₁ When the AND gate G ₂ extracts the logical product of the output 10 and the inverted output 13 of If the image signal is a white signal,
A black signal in place of the halftone signal is obtained while the halftone signal continues.

By the above means, the flip-flop circuit FF ₅
It is determined whether the image signal immediately before the halftone signal is a white signal or a black signal according to the memory contents of Similarly, if the black signal is a black signal, a white signal is sent out from the AND gate _G2 instead of the extracted halftone signal.

On the other hand, the non-inverted output 15 of the D-type flip-flop _FF3 is output from the comparator which is determined to be a white signal and taken out.
This is a delayed version of output 4 of CM ₁ , and since this and the black or white signal sent in place of the aforementioned halftone signal are the same as the order of image signal 3 given to input IN, output 15 When the signal is sent to the output OT together with the output 14 of the AND gate _G2 via the OR gate _G3 , an image signal is obtained in which a signal in place of the halftone signal and a white signal are synthesized at the same timing.
Note that when the output 15 is “1”, it is a white signal, and “0”
When , the signal is a black signal or a half-tone signal, and the output 15 is combined with the output 14 by the combination of the OR gate _G8 .

When compared with the image signal 3 in FIG. 2, the output 16 obtained by the synthesis and sending means using the OR gate G ₃ has a rise time difference t ₁ between the clock pulses CP _r and CP _s with respect to the image signal 3. However, it becomes " ₁ " in response to a white signal exceeding the first discrimination level L 1 of image signal 3, and becomes "1" in response to a black signal below the second discrimination level L ₂ . is “0”
In addition, in the halftone signal between both discrimination levels L ₁ - _{L 3} , when the immediately preceding image signal is a white signal, it becomes a black signal, and similarly, when it is a black signal, it becomes a white signal, and "0" is used. If the black level and "1" are used as the white level, a received image in which the halftone is the opposite gradation to the previous gradation can be obtained.

Note that if the signal immediately before the halftone signal is also a halftone, a white signal is sent out instead of the halftone signal.

Therefore, even if photoelectric conversion is performed on white and black areas during photoelectric conversion processing of thin lines and the like during scanning of documents on the transmitter side, the accuracy will still slightly exceed the conventional sole discrimination level. The image signal processing is forcibly performed as a signal of the opposite gradation based on the previous pixel information, instead of being made into a white signal or a black signal depending on whether the signal is turned downward or downward. can be completely prevented, and the resolution of the received image is significantly improved.

It should be noted that each of the above means can of course be modified or selected in various ways other than those shown in FIG. The same thing can be done even if a comparison is performed and a signal in place of the halftone signal is determined. Further, it goes without saying that the present invention can be applied not only to the transmitter side but also to the input side of the receiver to obtain similar results.

As is clear from the above description, according to the present invention, the loss of fine lines in the sub-scanning direction can be prevented in images received by a facsimile device, and the resolution can be improved at the same time.
It has a remarkable effect when applied to the electronic transmission of originals such as documents.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a time chart showing waveforms at various parts in FIG. IN...Input, PH...Peak value hold circuit,
RV ₁ , RV ₂ ... Potentiometer, CM ₁ , CM ₂
... Comparator, FF ₁ , FF ₂ ... Flip-flop circuit, FF ₃ to _{FF 6} ... D-type flip-flop circuit,
G ₁ , G ₂ ...AND gate, G ₃ ...OR gate, IV
...Inverter, OT...Output, CP _r , CP _s ...Clock pulse.

Claims (1)

[Claims] 1. A first and a second discrimination level are provided for a facsimile image signal, and a white signal exceeding the first discrimination level, a black signal below the second discrimination level, and a first discrimination level are provided for the facsimile image signal.
an image signal extraction means for sequentially extracting signals corresponding to three gradations of a halftone signal between a discrimination level and a second discrimination level from the image signal; and a signal corresponding to the three gradations extracted from the image signal extraction means. a storage means for temporarily storing whether the signal obtained is a black signal, a white signal and a halftone signal as the immediately preceding picture signal; and a halftone signal is output from the picture signal extracting means following the white signal or black signal. When the image signal is retrieved, it is determined whether the image signal immediately before the retrieved halftone signal is a black signal or a white signal according to the storage contents of the storage means, and this determination state is maintained while the halftone signal continues. and a discriminating means for holding a black signal, based on the judgment of the discriminating means, transmitting a white signal instead while the halftone signal from the image signal extracting means continues when the immediately preceding image signal is a black signal; means for sending a black signal in place of the halftone signal from the image signal extracting means while the immediately preceding image signal is a white signal while the halftone signal from the image signal extracting means continues; a signal in place of the halftone signal from the image signal extracting means; An image signal processing method comprising means for combining and transmitting a white signal and a black signal from an image signal extraction means at the same timing.