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JPS6360526B2 - - Google Patents
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JPS6360526B2 - - Google Patents

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Publication number
JPS6360526B2
JPS6360526B2 JP53135449A JP13544978A JPS6360526B2 JP S6360526 B2 JPS6360526 B2 JP S6360526B2 JP 53135449 A JP53135449 A JP 53135449A JP 13544978 A JP13544978 A JP 13544978A JP S6360526 B2 JPS6360526 B2 JP S6360526B2
Authority
JP
Japan
Prior art keywords
coating
resist
film
photoresist
semiconductor wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53135449A
Other languages
Japanese (ja)
Other versions
JPS5562738A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13544978A priority Critical patent/JPS5562738A/en
Publication of JPS5562738A publication Critical patent/JPS5562738A/en
Publication of JPS6360526B2 publication Critical patent/JPS6360526B2/ja
Granted legal-status Critical Current

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  • Application Of Or Painting With Fluid Materials (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Description

【発明の詳細な説明】 本発明は半導体素子の製造法にかかり、とくに
半導体素子製造におけるPR工程の、ホトレジス
トコーテイング(特にスプレーコーテイング)方
法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for photoresist coating (particularly spray coating) in a PR step in manufacturing a semiconductor device.

一般的に半導体素子製造法におけるPR工程で
のホトレジストコーテイング方法としては代表的
なものを上げるとスピンナーコーテイング、デイ
プコーテイング、スプレーコーテイング等が上げ
られるが、厚膜を必要とする特殊なプロセスたと
えばレジストをマスクにして、ドライホーニング
を行なう場合や、ステンシルPRにおけるメタル
の厚膜化の場合、耐薬品性向上を必要とする場
合、PR膜、厚膜化によるPR膜面へのキズの悪影
響減少を必要とする場合、半導体ウエハー面へグ
ループエツチングにより、U溝を施したものへ
の、膜厚均性を設ける場合等においては前記する
コーテイング等の適用な不可能に近い状態にあ
り、種々の問題を残している。厚膜を得ようとす
れば、スピンナーコーテイングにおいては、回転
方向と、遠心力の関係上、半導体ウエハーの中央
部と周辺部とでは第1図、第2図に示すように膜
厚が異なつています。すなわち、第1図の様に半
導体ウエハー1の周辺部にホトレジスト2は厚く
なる。又、第2図Aのようにグループエツチング
により、U溝を施した面を有する半導体ウエハー
11においても同じ様にコーテイングがされてし
まい、これを拡大した第2図Bから明らかなよう
にa部の膜厚は極端に薄く、一方、b部のところ
は厚くなり、膜厚のバラツキが大きいため、露光
量のコントロールが難しくなる。ここでfは遠心
方向である。又、デイツプコーテイングにおいて
も第3図の様なコーテイング状態になり、半導体
ウエハー21の面内にある一方向へレジスト22
が寄つてしまい、膜厚のバラツキが出てしまい、
露光量のコントロールが難しくなる。スプレーコ
ーテイングにおいては、スプレーコーテイング時
のレジストの乾燥状態で、膜の状態が決まり、ス
プレーコーテイング時の、レジストの乾燥が早け
れば第4図、第5図の様に半導体ウエハー21,
31に粒々のレジスト32,42を積み重ねる状
態になり、遅ければ、第6図、第7図の様にデイ
プコーテイングに近い状態になり、C部が薄くな
る。(ただし膜厚は均一である)。従来は、後者の
乾燥スピードが遅い状態で、コーテイングしてい
たが、半導体面のU溝を施した面へのコーテイン
グにおいては、レジストが流れて第7図Bの様に
C部の膜厚が薄くなる等、前記の特殊なプロセス
へのホトレジスト膜適用は不可能に近かつた。
In general, typical photoresist coating methods used in the PR process in semiconductor device manufacturing methods include spinner coating, dip coating, and spray coating, but special processes that require a thick film, such as resist When performing dry honing using a mask, when increasing the thickness of the metal film in stencil PR, when improving chemical resistance is required, reduce the negative impact of scratches on the PR film surface due to the thickening of the PR film. When necessary, it is almost impossible to apply the above-mentioned coating when forming a U-groove on a semiconductor wafer surface by group etching to achieve film thickness uniformity, and various problems arise. is left behind. To obtain a thick film, spinner coating requires that the film thickness differs between the central and peripheral parts of the semiconductor wafer due to the rotation direction and centrifugal force, as shown in Figures 1 and 2. I am. That is, as shown in FIG. 1, the photoresist 2 becomes thicker at the periphery of the semiconductor wafer 1. Further, as shown in FIG. 2A, the semiconductor wafer 11 having a U-groove surface is also coated in the same way by group etching, and as is clear from FIG. 2B, which is an enlarged view of this, part a is The film thickness is extremely thin, while it is thick at part b, and the variation in film thickness is large, making it difficult to control the exposure amount. Here f is the centrifugal direction. Also, in dip coating, the coating state is as shown in FIG.
, and the film thickness becomes uneven.
It becomes difficult to control the exposure amount. In spray coating, the state of the film is determined by the dry state of the resist during spray coating, and if the resist dries quickly during spray coating, the semiconductor wafer 21, as shown in FIGS.
If it is too late, the state will be similar to deep coating as shown in FIGS. 6 and 7, and the C portion will become thinner. (However, the film thickness is uniform). Conventionally, coating was performed with the drying speed of the latter being slow, but when coating a semiconductor surface with a U-groove, the resist flows and the film thickness at the C portion is reduced as shown in Figure 7B. It is nearly impossible to apply photoresist films to the above-mentioned special processes, such as thinning.

本発明の目的は前記問題点を防止し、前記特殊
プロセスへのホトレジスト膜適用を可能とするホ
トレジストコーテイング方法を提供するものであ
る。
SUMMARY OF THE INVENTION An object of the present invention is to provide a photoresist coating method that prevents the above-mentioned problems and makes it possible to apply a photoresist film to the above-mentioned special processes.

本発明におけるホトレジストのスプレーコーテ
イング方法は、スプレーコーテイング時におい
て、レジストを半乾燥状態にして、ウエハー面へ
コーテイングしたことであり、特に、半導体ウエ
ハー面へグループエツチングによりU溝を施した
面の角部のところのレジストの流れ防止を行なう
と同時に、コーテイング膜のピンホールを防止し
た厚い膜を得る方法である。ホトレジストのスプ
レーコーテイングにおけるコーテイング膜の状態
は、スプレーコーテイング時の、レジストの乾燥
状態で決まる。つまり、レジストの粘度、スプレ
ーノズルの圧力、距離、レジストの流量、スプレ
ーコーテイング室内の温度、湿度(排気スピード
も含む)等の条件によつて決まる。スプレーコー
テイング室内の温度、湿度(排気スピード含む)
を一定にし、レジストの粘度は、スプレーコーテ
イング時に糸を引かない程度の粘度、たとえば
7cpとし、スプレーノズル圧力をたとえば4.0Kg/
cm距離20cm、とし、レジストの流量をコントロー
ルする。又、膜厚は、コーテイング回数でコント
ロールする。この様な方法で、レジストを半乾燥
状態で、コーテイングすることにより、第8図、
第9図の様に、半導体ウエハー面が、平面状、又
は、グループエツチング等によるU溝を施した面
に対しても、膜厚が均一で、厚膜が得られ、前記
の、特殊なプロセスへのホトレジスト膜適用が可
能となる。又、第9図Aを拡大した第9図Bでd
部も一様の厚さとなることが示されている。
In the photoresist spray coating method of the present invention, during spray coating, the resist is kept in a semi-dry state and then coated onto the wafer surface, particularly at the corners of the semiconductor wafer surface where U-grooves have been formed by group etching. This method not only prevents the resist from flowing, but also prevents pinholes in the coating film and forms a thick film. The state of the coating film in photoresist spray coating is determined by the dry state of the resist at the time of spray coating. That is, it is determined by conditions such as the viscosity of the resist, the pressure and distance of the spray nozzle, the flow rate of the resist, the temperature in the spray coating chamber, and the humidity (including the exhaust speed). Temperature and humidity in the spray coating room (including exhaust speed)
The viscosity of the resist should be kept constant and the viscosity should be such that it does not draw strings during spray coating, e.g.
7cp, and the spray nozzle pressure is, for example, 4.0Kg/
cm distance is 20cm, and control the resist flow rate. Further, the film thickness is controlled by the number of times of coating. By coating the resist in a semi-dry state using this method, the results shown in FIG.
As shown in FIG. 9, even if the semiconductor wafer surface is flat or has a U-groove formed by group etching, a thick film can be obtained with a uniform film thickness. It becomes possible to apply a photoresist film to Also, in Figure 9B, which is an enlarged version of Figure 9A, d
It is shown that the thickness of the part is also uniform.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図A、第3図、第4図、第5図
A、第6図および第7図Aはそれぞれ従来技術に
よるコーテイング方法による半導体ウエハー上の
レジストの状態を示す断面図であり、第2図B、
第5図Bおよび第7図Bはそれぞれ第2図A、第
5図Aおよび第7図Aの一部を拡大に示した拡大
図である。第8図および第9図Aはそれぞれ本発
明の実施例による半導体ウエハー上のレジストの
状態を示す断面図であり、第9図Bは第9図Aの
一部を拡大して示した拡大断面図である。 尚、図において、1,11,21,31,4
1,51,61,71,81は半導体ウエハー、
2,12,22,32,42,52,62,7
2,82はレジスト、a,b,c,dはレジスト
の一部分、fは遠心方向である。
1, 2A, 3, 4, 5A, 6 and 7A are cross-sectional views showing the state of resist on a semiconductor wafer by coating methods according to the prior art, respectively. Yes, Figure 2B,
FIG. 5B and FIG. 7B are enlarged views showing a part of FIG. 2A, FIG. 5A, and FIG. 7A, respectively. 8 and 9A are cross-sectional views showing the state of a resist on a semiconductor wafer according to an embodiment of the present invention, and FIG. 9B is an enlarged cross-sectional view showing a part of FIG. 9A. It is a diagram. In addition, in the figure, 1, 11, 21, 31, 4
1, 51, 61, 71, 81 are semiconductor wafers,
2, 12, 22, 32, 42, 52, 62, 7
2 and 82 are resists, a, b, c, and d are portions of the resist, and f is a centrifugal direction.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体ウエハー表面にホトレジストを半乾燥
状態でスプレー塗布することを特徴とする半導体
素子の製造方法。
1. A method for manufacturing a semiconductor device, which comprises spraying a photoresist on the surface of a semiconductor wafer in a semi-dry state.
JP13544978A 1978-11-02 1978-11-02 Preparation of semiconductor element Granted JPS5562738A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13544978A JPS5562738A (en) 1978-11-02 1978-11-02 Preparation of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13544978A JPS5562738A (en) 1978-11-02 1978-11-02 Preparation of semiconductor element

Publications (2)

Publication Number Publication Date
JPS5562738A JPS5562738A (en) 1980-05-12
JPS6360526B2 true JPS6360526B2 (en) 1988-11-24

Family

ID=15151964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13544978A Granted JPS5562738A (en) 1978-11-02 1978-11-02 Preparation of semiconductor element

Country Status (1)

Country Link
JP (1) JPS5562738A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57145325A (en) * 1981-03-04 1982-09-08 Nec Corp Manufacture of semiconductor device
JPS63244032A (en) * 1987-03-31 1988-10-11 Tanaka Kikinzoku Kogyo Kk Formation of resist film on rugged substrate

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS529354B2 (en) * 1972-05-01 1977-03-15
JPS5128466A (en) * 1974-09-03 1976-03-10 Matsushita Electric Industrial Co Ltd Kyoshijoha bunshukairo

Also Published As

Publication number Publication date
JPS5562738A (en) 1980-05-12

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