JPS6360542B2 - - Google Patents
Info
- Publication number
- JPS6360542B2 JPS6360542B2 JP21209481A JP21209481A JPS6360542B2 JP S6360542 B2 JPS6360542 B2 JP S6360542B2 JP 21209481 A JP21209481 A JP 21209481A JP 21209481 A JP21209481 A JP 21209481A JP S6360542 B2 JPS6360542 B2 JP S6360542B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- electrode contact
- contact window
- melting point
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000008018 melting Effects 0.000 claims description 7
- 238000002844 melting Methods 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 claims description 7
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 5
- 238000005121 nitriding Methods 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 150000004767 nitrides Chemical class 0.000 claims description 2
- 239000003870 refractory metal Substances 0.000 claims 1
- 238000000034 method Methods 0.000 description 9
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 4
- 239000005360 phosphosilicate glass Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000010955 niobium Substances 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
【発明の詳細な説明】
本発明は、多層配線を有する半導体装置を製造
するのに好適な方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method suitable for manufacturing a semiconductor device having multilayer wiring.
一般に、半導体装置の電極、配線は、絶縁膜に
電極コンタクト窓を形成し、その上に電極、配線
材料膜を形成し、それをパターニングすることに
依つて作製されている。 Generally, electrodes and wiring of a semiconductor device are manufactured by forming an electrode contact window in an insulating film, forming an electrode and wiring material film thereon, and patterning the electrode and wiring material film.
このようにして形成された電極、配線は、前記
電極コンタクト窓のエツジに存在する段差が大で
ある為、断線を生ずることが多い。 Since the electrodes and wiring formed in this manner have a large step at the edge of the electrode contact window, disconnection often occurs.
そこで、従来、このような段差の影響を低減し
て断線を防止する為の試みがなされ、或る程度の
効果をあげている技術もあるが、その多くは手間
が掛る工程を要したり、実効が得られないものな
ど様々である。 Therefore, in the past, attempts have been made to reduce the effect of such level differences and prevent wire breakage, and although some techniques have achieved some degree of effectiveness, most of them require time-consuming processes, There are various things that are not effective.
本発明は、極めて簡単な工程で確実に前記の如
き段差を低減し得る技術を提供するものであり、
以下これを詳細に説明する。 The present invention provides a technique that can reliably reduce the above-mentioned level difference with an extremely simple process,
This will be explained in detail below.
第１図及び第２図は本発明一実施例を説明する
為の工程要所に於ける半導体装置の要部断面図で
あり、次に、これ等の図を参照しつつ説明する。 FIGS. 1 and 2 are sectional views of essential parts of a semiconductor device at key points in the process for explaining one embodiment of the present invention, and the following description will be made with reference to these figures.
第１図参照
(1) 諸素子が形成された半導体基板１に例えばタ
ンタル（Ta）膜を形成し、これを例えばリア
クテイブ・イオン・エツチング法にてパターニ
ングし、ｎ層目（ここでは第１層目）の配線２
を形成する。Refer to Fig. 1 (1) For example, a tantalum (Ta) film is formed on the semiconductor substrate 1 on which various elements are formed, and this is patterned by, for example, reactive ion etching to form the nth layer (here, the first layer). Wiring 2
form.
ここでタンタル膜は他の高融点金属膜、例え
ばモリブデン（Mo）、タングステン（Ｗ）、チ
タン（Ti）、ニオブ（Nb）、ジルコニウム
（Zr）、ハフニウム（Hf）などの膜に代えても
良い。 Here, the tantalum film may be replaced with other high melting point metal films, such as molybdenum (Mo), tungsten (W), titanium (Ti), niobium (Nb), zirconium (Zr), hafnium (Hf), etc. .
(2) 例えば化学気相堆積法（CVD法）にて燐硅
酸ガラス（PSG）膜３を形成し、それを通常
のフオト・リソグラフイ技術にてパターニング
し、電極コンタクト窓３Ａを形成し、配線２の
一部を露出させる。(2) For example, a phosphosilicate glass (PSG) film 3 is formed by a chemical vapor deposition method (CVD method), and it is patterned by a normal photolithography technique to form an electrode contact window 3A, A part of the wiring 2 is exposed.
第２図参照
(3) 窒化性雰囲気、例えばN2−３〔％〕H2雰囲
気中にて温度を例えば1000〔℃〕として時間約
30〔分〕の熱処理を行なう。これに依り電極コ
ンタクト窓３Ａ内には窒化タンタル（TaN）
膜２Ａが形成される。Refer to Figure 2 (3) In a nitriding atmosphere, for example, N 2 -3 [%] H 2 atmosphere, at a temperature of, for example, 1000 [℃], for about a time.
Heat treatment for 30 minutes. As a result, tantalum nitride (TaN) is placed inside the electrode contact window 3A.
A film 2A is formed.
この窒化タンタルが生成される際には体積膨
脹をともなうので、窒化タンタル膜２Ａが形成
されると電極コンタクト窓３Ａは浅くなり、段
差は低減されるものである。即ち、段差が当初
は100〔％〕であつたとすると70〜80〔％〕に低
下する。また、電極コンタクト窓３Ａのエツジ
は、この熱処理に依り、通常のガラス・リフロ
ーとまではゆかないが或る程度円味を持つよう
になる。尚、窒化タンタルの抵抗値は200〜300
〔μΩ−cm〕であつて、不純物含有結晶シリコ
ンの1/10であり、アルミニウム（Al）より２
桁程度高い。 When this tantalum nitride is produced, it undergoes volumetric expansion, so when the tantalum nitride film 2A is formed, the electrode contact window 3A becomes shallower and the height difference is reduced. That is, if the height difference was initially 100%, it decreases to 70 to 80%. Moreover, the edges of the electrode contact window 3A become rounded to some extent due to this heat treatment, although this cannot be achieved with ordinary glass reflow. Furthermore, the resistance value of tantalum nitride is 200 to 300.
[μΩ-cm], which is 1/10 that of impurity-containing crystalline silicon and 2 times smaller than that of aluminum (Al).
An order of magnitude higher.
(4) この後、通常の技術にて、ｎ＋１層目（ここ
では第２層目）の電極、配線（図示せず）を形
成する。(4) Thereafter, electrodes and wiring (not shown) of the n+1 layer (here, the second layer) are formed using a conventional technique.
以上の説明で判るように、本発明に依れば、ｎ
層目の配線を高融点金属で形成し、その上に電極
コンタクト窓を有する絶縁膜を形成し、窒化性雰
囲気中で熱処理することに依り電極コンタクト窓
内に高融点金属物膜を形成して段差を低減させ、
その上にｎ＋１層目の配線を形成するものである
から、その上層の配線が段差の為に断線する惧れ
は少なくなる。そして、これに必要とされる独特
な工程としては窒化性雰囲気中の熱処理だけであ
るから、その実施は簡単である。 As can be seen from the above explanation, according to the present invention, n
The wiring layer is formed of a high melting point metal, an insulating film having an electrode contact window is formed thereon, and a high melting point metal material film is formed within the electrode contact window by heat treatment in a nitriding atmosphere. Reduce steps,
Since the (n+1)th layer wiring is formed thereon, there is less risk that the wiring in the upper layer will be disconnected due to the step. Since the only unique step required for this is heat treatment in a nitriding atmosphere, its implementation is simple.
第１図及び第２図は本発明一実施例を説明する
為の工程要所に於ける半導体装置の要部断面説明
図である。
図において、１は基板、２は高融点金属配線、
３は燐硅酸ガラス膜、２Ａは高融点金属窒化物
膜、３Ａは電極コンタクト窓である。
1 and 2 are cross-sectional explanatory views of essential parts of a semiconductor device at key points in the process for explaining one embodiment of the present invention. In the figure, 1 is a substrate, 2 is a high melting point metal wiring,
3 is a phosphosilicate glass film, 2A is a high melting point metal nitride film, and 3A is an electrode contact window.
Claims (1)
属からなる配線を形成し、次に、全面に絶縁膜を
形成し、次に、該絶縁膜をパターニングして電極
コンタクト窓を形成し、次に、窒化性雰囲気中に
て熱処理を行ない前記電極コンタクト窓内に露出
された高融点金属配線の表面を高融点金属窒化物
膜に変換する工程が含まれてなることを特徴とす
る半導体装置の製造方法。1. A wiring made of a refractory metal is formed as the n-th layer wiring on a semiconductor substrate, then an insulating film is formed on the entire surface, and then the insulating film is patterned to form an electrode contact window. A semiconductor device comprising the step of converting the surface of the high melting point metal wiring exposed within the electrode contact window into a high melting point metal nitride film by performing heat treatment in a nitriding atmosphere. Production method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21209481A JPS58116750A (en) | 1981-12-30 | 1981-12-30 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21209481A JPS58116750A (en) | 1981-12-30 | 1981-12-30 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58116750A JPS58116750A (en) | 1983-07-12 |
| JPS6360542B2 true JPS6360542B2 (en) | 1988-11-24 |
Family
ID=16616770
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21209481A Granted JPS58116750A (en) | 1981-12-30 | 1981-12-30 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58116750A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2554634B2 (en) * | 1986-09-29 | 1996-11-13 | 株式会社東芝 | Method for manufacturing semiconductor device |
-
1981
- 1981-12-30 JP JP21209481A patent/JPS58116750A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58116750A (en) | 1983-07-12 |
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