JPS6360917B2 - - Google Patents

Description

[Detailed Description of the Invention] Technical Field The present invention relates to an electronic musical instrument, and in particular, sets the amplitude of a musical tone signal by digital calculation.
The invention then relates to a system for converting digital musical tone signals into analog signals.

Prior Art In an electronic musical instrument that digitally generates a musical tone signal and an envelope signal, both signals are multiplied by a digital multiplier, and the digital musical tone signal to which an envelope has been added is transferred to a digital/analog converter (hereinafter referred to as D/A converter). It is common to perform analog conversion using a converter. In this case, the multiplier multiplies the multi-bit musical tone signal and the envelope signal, so the hardware configuration tends to become large.
In addition, since the calculation time was long, an expensive high-speed processing type was required. Furthermore, since all bits of a multi-bit digital tone signal are input to the D/A converter, its hardware configuration has become complicated.

OBJECT OF THE INVENTION Therefore, an object of the present invention is to simplify the configuration of a digital multiplier for adding an envelope (ie, setting an amplitude). Furthermore, in connection with the simplification of the digital multiplier, the structure for digital/analog conversion is also simplified.

Summary of the Invention In this invention, an envelope signal (more generally, amplitude setting data) is expressed as a floating point number consisting of a mantissa part and an exponent part, and a digital multiplier multiplies the musical tone signal by this mantissa part data. By level-shifting the amplitude of the digital musical tone signal, which is the product thereof, according to the exponent part, a musical tone signal having a desired amplitude setting is obtained. As a result, the multiplier in digital multiplication becomes mantissa data of a relatively small number of bits, so the structure of the multiplier is simplified.

As an example, the level shift means includes a D/A converter that converts a digital signal, which is the product of the mantissa data and the musical tone signal, into an analog signal, and a means that divides the analog signal of the musical tone signal in accordance with the exponent. including. Then, since the input signal to the D/A converter is the product of the mantissa and the musical tone signal, it has a relatively small number of bits, and the structure of the D/A converter can be simplified.

Embodiment In FIG. 1, a key switch circuit 10 includes a key switch corresponding to each key on a keyboard, and a key assigner 11 performs processing for assigning a pressed key to one of a specific number of musical sound generation channels according to the output of the key switch circuit 10. Do this. The key code KC indicating the key assigned to each channel and the key-on signal KON indicating whether the key is kept pressed (key released) are assigned to the key in a time-sharing manner in synchronization with the predetermined channel time-sharing timing. It is output from 11. The address generator 12 uses address data (( phase data) is generated for each channel in a time-division manner.

The envelope generator 14 has an envelope memory 14A that stores in advance the digital value of the envelope signal (amplitude setting data) from the start of key press to the time of muting in a form separated into a mantissa part and an exponent part according to the floating point notation method. and a circuit 14B for reading out this memory 14A. The readout circuit 14B receives the key-on signal of each channel given in a time-division manner from the key assigner 11.
Start reading memory 14A according to KON,
The read address is advanced according to the passage of time. The instantaneous digital value E of the envelope signal can be approximately represented by a floating point representation E=A.K ^B , where A is the mantissa, B is the exponent, and K is the base. In the binary system, K=2 in general, and the instantaneous value of the envelope signal can be specified by the mantissa part A and the exponent part B. Thus, under the control of the readout circuit 14B, the mantissa data and exponent data of the envelope instantaneous value of each channel are read out in a time-division manner from the envelope memory 14A for each channel.

The digital sample amplitude data of the musical tone waveform read from the musical waveform memory 13 and the mantissa data of the envelope signal read from the envelope memory 14A are input to the digital multiplier 15, and the product of both data is calculated. The output of this multiplier 15 does not represent the real number of the enveloped (amplitude set) musical waveform sample amplitude value, but is a mantissa. Therefore, the output of the multiplier 15 is applied to the level shift section 16, and its amplitude value is level-shifted according to the exponent data read from the envelope memory 14A, and the enveloped (amplitude-set) musical waveform sample is Find the real amplitude value.

The level shift unit 16 mainly includes a multiplier 15
a D/A converter 17 that converts the output of
A variable voltage dividing circuit 18 that divides the analog-converted musical waveform sample amplitude according to the exponent part data.
Contains. A sample hold circuit 19 is provided on the output side of the D/A converter 17 for sampling and holding the output analog amplitude signal while the output of the converter 17 is stable.
The sample hole circuit 19 includes a FET gate 20 for sampling the output of the D/A converter 17;
It consists of a capacitor 21 and a buffer amplifier 22 for holding the sampled voltage. The analog amplitude signal held by the sample and hold circuit 19 is input to the variable voltage divider circuit 18 as a reference voltage (voltage to be divided). The exponent data read from the envelope memory 14A is delayed for a predetermined time by the delay circuit 23, and then transferred to the variable voltage divider circuit 18.
is input as partial pressure ratio setting data. The variable voltage dividing circuit 18 divides the reference voltage, that is, the voltage corresponding to the mantissa part of the analog tone amplitude, at a ratio according to the inputted exponent part data. Variable voltage divider circuit 18
In fact, it operates as a simple D/A converter with a small number of input bits, which takes exponent data as a digital input. The delay circuit 23 has a time delay corresponding to the time delay from the time when the mantissa data read from the envelope memory 14A is applied to the multiplier 15 until the time when the analog signal corresponding to the operation result reaches the voltage dividing circuit 18. This will cause a delay.

The musical sound waveform sample amplitude analog signal of each channel output from the variable voltage dividing circuit 18 in a time-division manner is processed by a plurality of sample and hold circuits 24-1 to 24-8 provided corresponding to each channel (as an example, the number of channels is 8). These sample and hold circuits 24-1 to 24
-8 is for canceling the time division state of the time division analog musical tone signal. Each sample and hold circuit 24-1 to 24-8 is given a channel pulse CHi (where i=1, 2, 3...8) corresponding to the time division timing of each channel,
In accordance with this channel pulse CHi, the analog musical tone signal of the corresponding channel is sampled. An example of a sample and hold circuit is shown with respect to circuit 24-3. Channel pulse CH ₃
, the FET gate 25 is opened to sample the analog musical tone signal of the third channel, which is held by the capacitor 26 and sent to the buffer amplifier 2.
It is designed to be output via 7. The analog musical tone signals of each channel that have been time-divided in this manner are mixed by a mixing resistor circuit 28 and then supplied to a sound system 29.

Next, for an example of channel timing of input/output signals (signals at points a to j) of each circuit in FIG.
This will be explained with reference to Figures a to j. In the figure, the numbers written in the pulse waveforms indicate channel numbers. Strobe pulse STBi (however, i = 1, 2, 3...8)
A pulse is generated at the beginning of the time-division time slot of each channel, and the address generator 12 outputs address data for waveform readout of each channel in a time-division manner under timing control by this strobe pulse STBi. . The readout output timing of the musical sound waveform memory 13 is the second
As shown in FIG. b, it is slightly delayed from the rise of the strobe pulse STBi. envelope generator 1
In step 4, the readout of the memory 14A is controlled so that the readout timing of the mantissa data is slightly delayed from the readout timing of the waveform memory 13, as shown in FIG. This kind of time delay control is
This is done due to design requirements in order to accurately match the operation timing inside the multiplier 15. Due to the calculation time delay of the multiplier 15 and the operation time delay of the D/A converter 17, the output timing of the D/A converter 17 is delayed as shown in FIG. The strobe pulses STB ₁ to STB ₈ of each channel are input to the OR circuit 30, and the output thereof is delayed by the delay circuit 31 (see Fig. 1), and the sampling pulse STB' is generated at the timing shown in Fig. 2 e. form. By applying this sampling pulse STB' to the FET gate 20 and sampling the output of the D/A converter 17, the output timing of the sample and hold circuit 19 becomes as shown in FIG. 2(f).
The delay circuit 23 performs a delay operation so that the exponent data read from the envelope memory 14A matches the output timing of the sample hold circuit 19 described above. The channel pulse CHi is generated when each channel output of the voltage dividing circuit 18 is stabilized, and is generated when each channel output of the voltage dividing circuit 18 is stabilized.
-8, the analog musical tone signals of the channels corresponding to each channel are held.

In FIG. 2, there is a time division processing time width of one channel (1
There is a time delay longer than the frame width). Therefore, in effect, the multiplication and D/
This is why the A conversion process is performed. Such processing over two frames is performed by the multiplier 15 and the D/
A converter 17, variable voltage divider circuit (D/A converter) 1
This is advantageous because it allows for a margin in the processing time of step 8.Also, even though it is possible to provide a margin in the processing time, the final output (output of the voltage divider circuit 18) timing is not the same as the original. The channel time division timing remains the same, and the sampling rate remains high (one frame width).

Incidentally, it is also possible to provide a digital shift circuit in the level shift section 16 and shift the level of the output of the multiplier 15 as a digital value in accordance with the exponent part data. In that case, the output of the digital shift circuit (real number of musical waveform sample amplitude value)
If the data were directly D/A converted, a large multi-bit input type D/A converter would be required. Therefore, the real number of the digital musical waveform sample amplitude value is decomposed into a mantissa part and an exponent part expressed as floating point numbers by a floating arithmetic circuit, and the mantissa part is converted into analog by a small bit input type D/A converter. It is preferable that the level of the analog converted signal is shifted in accordance with the exponent part in a voltage dividing circuit (D/A converter). However, compared to such changes,
The level shift section 16 shown in FIG. 1 has a much simpler structure.

Although the embodiments have been described above for multi-tone electronic musical instruments, it goes without saying that the present invention can also be implemented in the same way for single-tone electronic musical instruments. Further, the digital musical tone generating means is not limited to the musical waveform memory 13, but may be of any configuration. Further, when the waveform amplitude value and the mantissa data are expressed by counting, it goes without saying that by using an adder instead of the multiplier 15, the product of these can be substantially obtained.

Effects of the Invention According to the present invention, since the multiplier input to the digital multiplier becomes mantissa data consisting of a relatively small number of bits, the structure of the multiplier can be simplified.

[Brief explanation of drawings]

FIG. 1 is an electrical block diagram showing an embodiment of an electronic musical instrument according to the present invention, and FIG. 2 is a timing chart showing an example of channel timing of input and output signals of each part in FIG. 13... Musical waveform memory, 14... Envelope generator, 15... Digital multiplier, 16...
Level shift section, 17...D/A converter, 18...
...Variable voltage divider circuit, 19, 24-1 to 24-8...
...Sample and hold circuit.

Claims (1)

[Scope of Claims] 1. Means for outputting amplitude setting data expressed in floating point representation consisting of a mantissa part and an exponent part, means for outputting a digital musical tone signal, this digital musical tone signal and the amplitude setting data. 1. An electronic musical instrument, comprising: arithmetic means for calculating the product of . The level shifting means includes digital/analog converting means for converting the output digital musical tone signal of the calculating means into analog, and means for dividing the amplitude of the analog-converted musical tone signal according to the exponent part of the amplitude setting data. The electronic musical instrument according to claim 1, which includes: