JPS6364045B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to solid-state laminated electronic circuit components, and particularly to improvements in electrodes and connection terminals for connecting electronic components mounted on circuit components and external circuits.

A conventional example is illustrated in FIG. This serves as a base material for mounting resistors, transistors, etc., and for example, an amplifier circuit as shown in Figure 3 is mounted as shown in Figure 4 to form an electronic circuit. Becomes a circuit component. Here electrodes 1 and 2
constitutes a multilayer capacitor C ₂ with a dielectric 3 interposed therebetween, and is connected to the outside through terminals T ₂ and T ₃ . In addition, terminals T ₁ and T ₈ form a capacitor C ₁ ,
Terminals T ₄ , T ₅ , T ₆ , and T ₇ are connection terminals for electronic circuits mounted on the multilayer capacitor. The dielectric 3 is usually made of titanium oxide (TiO ₂ ), barium titanate, etc., and its dielectric constant is 20 in the case of TiO ₂
~200, and in the case of _BaTiO3 it is around 1000-10000. Also, terminals and electrodes are usually made of palladium (Pd)
Silver (Ag) is used alone or as an alloy.

Figure 3 shows a high frequency amplification circuit, with transistors
Q ₁ and Q ₂ are two-stage directly connected amplifiers, and the signal source resistance R ₀
Amplify the high frequency signal A with a capacitor C ₃ ,
The output is taken out through a load tuned to the frequency of signal A by a high frequency transformer _T1 . That is, if the frequency of signal A is f _A , the inductance L ₁ of capacitor C ₃ and high frequency transformer T ₁ is is set to . +B is the power supply, and the terminal
T ₁ to _{T 8} are terminals of a multilayer capacitor (hereinafter referred to as base MLC) on which electronic components are mounted. resistance
R ₁ and R ₂ are emitter resistances of transistors Q ₁ and Q ₂ ,
Resistor R ₃ is the base bias resistance of transistor Q ₁ ,
Resistor R ₄ is the collector resistance of transistor Q ₁ .

Here, it is assumed that capacitors C ₁ and C ₂ have sufficiently small impedance for signal A,
The high frequency impedance is assumed to be negligible compared to the resistors R ₁ and R ₂ . In Figure 7, the terminal
Let Co ₁ be the stray capacitance generated between T ₆ and the electrode of capacitor C ₁ , and Co ₂ be the stray capacitance generated between terminal T ₅ and the electrode of capacitor C ₂ . An example of an experiment is
Values of about 20 pF to 200 pF have been obtained for both Co ₁ and Co ₂ . Capacitor C ₃ is ferroelectric (BaTiO ₃ with ε=
4000). Normally, the input impedance Rin1 of the transistor _Q1 is about 1KΩ, so if the frequency of the signal A becomes so high that the impedance of _Co1 becomes a value that cannot be ignored compared to Rin1 and Ro, the circuit in Figure 3 It becomes impossible to demonstrate its performance as a high frequency amplifier. Similarly, if the value of Co ₂ is no longer negligible compared to the value of the tuning capacitor C ₃ , the tuning frequency of the tuning circuit formed by the capacitor C ₃ and the terminal T ₁ will shift. Additionally, the base MLC is _BaTiO3
When configured _with There is.

The frequency at which Co ₁ can be ignored is 1/2πf _A . Assuming that Co ₁ ≒10KΩ≫1KΩ... and assuming Co ₁ = 100pF, fA≒160KHz. At 160KHz, it can be considered that it has no ability as a high frequency amplification circuit.

In addition, the value of capacitor _C3 is
100pF, about 200pF to 1500pF at a frequency of 455KHz. Therefore, at frequency 10.7MHz, Co ₂
If the value is 1/100 of C ₃ , it is 1 pF, and even at 455 KHz, it is about 2 to 15 pF, which is far different from the experimental value for Co ₂ .

The present invention aims to reduce the stray capacitance of limited terminals and surface electrodes in an electronic circuit in order to avoid the negative influence on the electronic circuit due to the large stray capacitance, which is a drawback of the conventional method.

Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments. An insulating layer having a dielectric constant lower than that of the dielectric is provided between the two, thereby reducing stray capacitance. Examples of this insulator include glass, alumina, and titanium oxide with a low dielectric constant.

An embodiment of the present invention is shown in FIGS. 1 and 2. FIG.
This structure is the same as the structure shown in FIG. 7 except for the insulator layer 4 having a low dielectric constant. That is, by providing the edge layer 4, the terminals T ₅ , T ₆ and the capacitor C ₂ ,
The stray capacitance between _C1 electrodes is significantly reduced.
For example, the dielectric constant ε of dielectric 3 is 4000, and the average distance t (μm) between the electrode of capacitor C ₂ and terminal T ₅ is 500μ.
m, the opposing area between the electrode of capacitor C ₂ and terminal T ₅ is
Assuming 0.5 mm ² , the stray capacitance Co ₂ is Co ₂ ≒8.855×ε×S/t≒35.42 (pF) when the insulating layer 4 is not present. In some cases, it is equivalent to assuming that an electrode exists at the boundary between the insulator layer 4 and the dielectric layer 3, so the reduced stray capacitance Co ₂ ' is equal to the capacitance C' of Co ₂ and the insulator layer 4. are connected in series, and C′=8.855×10×0.5/50=0.8855(pF) Co ₂ ′=1/1/CO ₂ +1/C′=Co ₂ ×C′/Co ₂ +C′ = 35.42 ×0.8855/35.42+0.8855 = 0.8639 (pF) Co ₂ ' significantly decreases to approximately 0.9 pF. The value of Co ₁ ′ is also similar.

According to the present invention, fA determined by Eq.
The value of f _A is 16 MHz, which can sufficiently amplify high frequencies, and satisfies the required value of Co ₂ ′ = 1 pF or less when compared with capacitor C ₃ .

FIG. 4 is a top layout diagram in which the circuit of FIG. 3 is constructed on the base capacitor of FIGS. 1 and 2. FIG. 5 is a structural diagram of the configuration shown in FIG. 4 viewed from the side. R ₂ is a printed and fired resistor, 5 is an electrode that connects the emitter of transistor Q ₂ and R ₂ , R is a part that extends to the top surface of terminal T ₅ , and
Connected to _Q2 collector. 7 is an insulator for reducing stray capacitance between the portion 6 and the dielectric 3;
Reference numeral 9 represents a board on which solid laminated electronic components are mounted, and reference numeral 8 represents a wiring material such as copper printed on the board 9.

Figure 6 shows the case where an electronic circuit is constructed on the base MLC of the dielectric 3 and another base MLC.If the dielectric 3 is barium titanate, it is often composed of titanium oxide, alumina, etc. .

Of course, the insulator 7 may also be provided under the resistor _R4 , and in the example of FIG.
It is desirable to provide all of Q ₁ and Q ₂ under resistors R ₃ and R ₄ and their connecting electrodes. If you configure electronic circuits not only on the front side of the base MLC but also on the back side,
It is desirable to provide an insulator on the lower surface as well.

In the present invention, between at least one leadless terminal that is not connected to an internal electrode and the side surface of the laminated dielectric where the terminal is provided, a dielectric having a dielectric constant lower than that of the laminated dielectric is provided. Since the insulator layer is provided, a solid-state multilayer electronic circuit with sufficient characteristics can be constructed even on a substrate with a high dielectric constant.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing one embodiment of the laminate of the present invention, FIG. 2 is a top view of the same, FIG. 3 is a circuit diagram showing an example of a high frequency amplification circuit, and FIG. 4 is the circuit of FIG. 3. FIG. 5 is a side view thereof, and FIG. 6 is a side view showing another embodiment of the present invention.
FIG. 7 is a cross-sectional view showing a conventional example, and the same is a top view thereof. 1 and 2 are electrodes, 3 is a dielectric, 4 is an insulator layer, 5
is an electrode, 6 is a part, 7 is an insulator, 8 is a wiring material, 9
is the board, and T ₁ to T ₈ are terminals.

Claims (1)

[Scope of Claims] 1. In a laminate having at least one capacitor function and configured by laminating internal electrode layers and dielectric layers, at least one leadless portion not connected to the internal electrodes A solid-state laminated electronic circuit component, characterized in that a layer of an insulator having a dielectric constant lower than that of the laminated dielectric is provided between a terminal and a side surface of the laminated dielectric on which the terminal is provided. 2. A layer of an insulator with a low dielectric constant is formed between the portion of the terminal that wraps around the upper and lower surfaces of the laminated dielectric and the laminated dielectric, and between the terminal and the side surface of the laminated dielectric. A solid-state laminated electronic circuit component according to claim 1.