JPS6364155B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a synchronous control device for an inverter, and particularly to a synchronous control device for an inverter that constitutes an uninterruptible power supply that operates in synchronization with a commercial frequency power source. FIG. 1 shows the basic main circuit of an uninterruptible power source and a conventional inverter synchronous control circuit. The inverter synchronous control circuit B is composed of a phase difference detector DP, a proportional-integral regulator PI, a frequency setting signal generator IF, a voltage-frequency converter VF, and a pulse distributor D. In the uninterruptible power supply device configured in this way, when the commercial frequency power supply e is in a power outage state, the DC input of the inverter INV is supplied from the power storage BT, and the AC power reversely converted by the inverter INV is supplied to the load L. However, the inverter output frequency in this case is determined by the frequency setting signal generator IF
This inverter frequency setting value* is converted by the voltage-frequency converter IF to a frequency proportional to this, and the pulse distributor D sends a signal to each thyristor of the inverter INV. Supplied as an arc signal. Now, if the commercial frequency power supply e is restored, the inverter INV will be operated with the DC power supplied from the rectifier REC as input, and the commercial frequency synchronization reference input s* from the commercial frequency power supply e will be input to the phase difference detector. The phase difference between the inverter output which is supplied to one input terminal a of the DP and fed back to the other input terminal b of the phase difference detector DP is detected. This detected value is supplied to the voltage-frequency converter VF via the proportional-integral regulator PI, and the inverter frequency setting signal* supplied from the frequency setting signal generator IF is corrected in accordance with this input. The frequency command signal is supplied to each thyristor of the inverter INV via the pulse distributor D, and the frequency and phase of the inverter output are synchronized with the synchronization reference input s*. In this case, strictly speaking, there is a frequency and phase deviation between the synchronization reference input s* and the inverter frequency setting value*, so the load is operated following the change in the inverter output during the synchronization period. However, since the conventional inverter synchronous control device configured as described above has a high synchronous speed, it has the disadvantage that it may not be able to follow changes in the inverter output depending on the type of load and may malfunction. Therefore, as shown in Fig. 2, the applicant detected the phase difference and frequency difference between the synchronization reference input s* and the output of the inverter INV using a phase difference detection circuit DP and a frequency difference detection circuit DF, respectively. The detection output is integrated by the integrating circuit I, and the inverter frequency setting signal* sent from the frequency setting signal generating circuit IF is corrected in accordance with the integral output v ₀ of the integrating circuit I, and the inverter output is controlled at a gentle control speed. An inverter synchronous control device configured to be synchronized with a synchronous reference input s* was proposed in concurrently filed Patent Application 1. This configuration slows down the synchronization speed and prevents malfunctions of the load during the synchronization period, but because the response speed of this control system is slow, the commercial frequency of the power supply fluctuates after synchronization is completed. When the phase of the synchronization reference input changes, a phase error occurs between the synchronization reference input and the inverter output, which has the disadvantage of adversely affecting the load when switching between the commercial frequency power supply and the inverter. Therefore, as a result of various studies, the inventor developed a synchronization detector that detects when the inverter output is synchronized with the synchronization reference input, and a synchronization detector that detects when the inverter output is synchronized with the synchronization reference input. a proportional-integral adjustment circuit that promptly corrects the inverter frequency set value and controls the inverter frequency; and a switch that switches the synchronous control device to an operation circuit using the proportional-integral adjustment circuit when receiving a detection output from a synchronous detector. It has been found that by providing a circuit in addition to the above-described inverter synchronous control device, the response of the control system after synchronization is completed becomes faster, and the above-mentioned problems can be solved at once. Therefore, the general object of the present invention is to be able to synchronize the output of an inverter constituting an uninterruptible power supply device with the commercial frequency of an AC power source at a slow speed that the load can follow without trouble; Moreover, it is an object of the present invention to provide an inverter synchronous control device that can control the inverter frequency in response to a change in the phase of a commercial frequency power supply after the synchronization is completed. In order to achieve this purpose, in the present invention, the phase difference and frequency difference between the synchronization reference input and the inverter output are detected by a phase difference detector and a frequency difference detector, respectively, and these detection outputs are integrated by an integrator. The inverter frequency set value is corrected in accordance with the obtained integral value, and the circuit is configured to synchronize the inverter output with the synchronization reference input based on the corrected inverter frequency command signal, so that the inverter output is synchronized with the synchronization reference input. A synchronization detector detects when the phase of the synchronization reference input changes, and a proportional a differentiator or a proportional-integral regulator forming an integral adjustment circuit; and a switch for switching the circuit to supply the detection output of the phase difference detector to the proportional-integral adjustment circuit when the detection output of the synchronous detector is supplied. It is characterized by having a container. As an alternative, the phase difference and frequency difference between the synchronization reference input and the inverter output are detected by a phase difference detector and a frequency difference detector, respectively, and the integral value obtained by integrating these detection outputs by an integrator. Correct the inverter frequency setting value according to
The circuit is configured to synchronize the inverter output with the synchronization reference input based on the corrected inverter frequency command signal, and when the detection output of the phase difference detector decreases below a predetermined reference amount, the inverter output becomes the synchronization reference input. a comparator that detects synchronization and generates a predetermined output; a resistor that is directly connected to the integrating capacitor of the integrator; a switch that is connected in parallel to the resistor; A switching device may be provided that switches the circuit to supply the detection output of the phase difference detector to the integrator and also opens the switch. Next, embodiments of a synchronous control device for an inverter according to the present invention will be described in detail below with reference to the accompanying drawings. FIG. 3 shows a synchronous control circuit of an inverter applied to an uninterruptible power source device, with reference numeral 10.
shows a main circuit of an uninterruptible power source, and this main circuit 10 of the uninterruptible power source includes a rectifier 12 and an inverter 14.
A commercial frequency power supply e is connected to the AC input terminal of the rectifier 12, and an inverter 14 is connected to the AC input terminal of the rectifier 12.
A load 18 is connected to the output terminal of. A commercial frequency power source e is connected to one input terminal a of each of the frequency difference detector 20, the phase difference detector 22, and the synchronous detector 24, and these detectors 2
The output terminal of the inverter 14 is connected to the other input terminal b of each of the input terminals 0, 22, and 24. The output terminal of the frequency difference detector 20 is connected to the input terminal of an analog switch 26 through a resistor _R1 , the output terminal of the phase difference detector ₂₂ is connected to an input terminal of the analog switch 26 through a resistor R2, and the output terminal of the analog switch 26 is connected to an integrator. Connect to 28 input terminals. Further, the output terminal of the phase difference detector 22 is connected to a differentiator 30 and an analog switch 32, 3.
4 and the output terminal of the integrator 28 via a resistor R ₃ , and the connection point between the analog switch 32 and the analog switch 34 is connected to the input terminal of the integrator 28 . The output terminal of the synchronization detector 24 is connected to one input terminal _A1 of the switch 36, and the output terminal of the synchronization command signal generator 38 is connected to the other input terminal _A2 of the switch 36. As shown in FIG. 4, the switching device 36 consists of a NAND circuit 40 and exclusive OR circuits 42, 44, and 46, and its output terminal _B1
is connected to the operation input terminal of the analog switch 26, the output terminal _B2 is connected to the operation input terminal of the analog switch 32, and the output terminal _B3 is connected to the operation input terminal of the analog switch 34. The output terminal of the integrator 28 is connected to one input terminal a of the voltage-frequency converter 48, and the output terminal of the frequency setting signal generator 50 is connected to the other input terminal b. Further, the output terminal of the voltage-frequency converter 48 is connected to the inverter 14 via a pulse distributor 52.
Connect to the gate of each thyristor that makes up the thyristor. Next, the operation of the apparatus of the present invention configured as described above will be explained. First, to explain the function of the switching part 36 (Fig. 4), as shown in Table 1,

[Table] Logic signal 0 or ₁ (hereinafter referred to as "0" signal and "1" signal) is supplied to input terminal A 1, and input terminal A ₂
In the mode in which a "0" signal is supplied to the output terminals _B1 and _B2 , a "1" signal is sent out from the output terminal B1 and a "0" signal is sent out from the output terminal _B3 . Also,
A “0” signal is supplied to input terminal A ₁ , and the input terminal
In the mode where “1” signal is supplied to _A2 ,
A "0" signal is sent from the output terminal _B1 , and a "1" signal is sent from the output terminal _B2 and output terminal _B3 . Also,
In the mode where a “1” signal is supplied to both input terminal A ₁ and input terminal A ₂ , a “1” signal is supplied from output terminal B ₁ , a “0” signal is supplied from output terminal B ₂ , and a “0” signal is supplied from output terminal B ₃ . 1” signal is sent. Moreover, the analog switches 26, 32, 34 are
When a "0" signal is supplied to the operation input terminal, each circuit is closed, and when a "1" signal is supplied, each circuit is opened. When the commercial frequency power supply e is currently in a power outage state, the DC power of the inverter 14 is supplied from the power storage 16, and the AC power reversely converted by the inverter 14 is supplied to the load 18. In this case, since a "0" signal is supplied to the input terminal _A2 of the switch 36 from which the synchronization command signal is sent from the synchronization command signal generator 38, the switch A "1" signal is supplied from output terminal B ₁ and output terminal B ₂ of 36, and a "0" signal is supplied from output terminal B ₃ to the respective operation input terminals of analog switches 26, 32, and 34. The analog switch 34 is in an open state, and the analog switch 34 is in a closed state. Therefore, the output v ₀ of the integrator 28 becomes zero, and since no input is supplied to one input terminal a of the voltage-frequency converter 48, the frequency setting signal generator 50 outputs a signal to the other input terminal a of the voltage-frequency converter 48. The inverter frequency setting value* supplied to the input terminal b is directly frequency-converted and supplied to the gates of each thyristor constituting the inverter 14 via the pulse distributor 52. Therefore, the frequency of the inverter output is determined by the inverter frequency setting signal* having a predetermined frequency set in the frequency setting signal generator 50. Now, if the commercial frequency power supply e is restored, the rectifier 1
AC power is supplied to 2 and converted to DC power,
This DC power is reversely converted by the inverter 14 and AC power is supplied to the load 18 . in this case,
A “1” signal is supplied as a synchronization command signal from the synchronization command signal generator 38 to the input terminal A ₂ of the switch 36, and the synchronization reference input s* of the commercial frequency is transmitted to the frequency difference detector 20, the phase difference detector 22, and the synchronization The inverter output is supplied to one input terminal a of each of the detectors 24, and the inverter output is fed back to the other input terminal b of each detector 20, 22, 24, and this feedback input and the synchronization reference input s* are connected. However, at this stage, the inverter output is not yet synchronized with the synchronization reference input s*, so
A "0" signal is supplied from the output terminal of the synchronization detector 24 to the input terminal A ₁ of the switch 36 . Therefore, as shown in Table (), the switching device 3
A “0” signal is output from the output terminal B ₁ of the analog switch 26, and a “1” signal is output from the output terminals B ₂ and B ₃ of the analog switch 26.
The analog switch 26 is closed, the analog switch 32 is connected in an open state, and the analog switch 34 is opened. Detection output detected by frequency difference detector 20
v ₁ is supplied to the input terminal of the integrator 28 via the resistor R ₁ and the analog switch 26, and the detection output v ₂ detected by the phase difference detector 22 is connected to the resistor
It is supplied via R ₂ and analog switch 26 to the input terminal of an integrator 28, where both inputs are summed and integrated. This integral output v ₀
is supplied to one input terminal a of the voltage-frequency converter 48, but in the voltage-frequency converter 48, the inverter frequency setting value * supplied to the input terminal b from the frequency setting signal generator 50 is input to the input terminal a. It is corrected and converted into a frequency corresponding to the integral output v ₀ supplied to a, and is supplied to the gate of each thyristor constituting the inverter 14 via the pulse distributor 50. In this case, the resistance value of the resistor R ₁ connected to the output side of the frequency difference detector 20 is set to be smaller than that of the resistor R ₂ connected to the output side of the phase difference detector 22. Therefore, frequency control is performed faster than phase control, and the output frequency of the inverter 14 almost matches the frequency of the synchronization reference input s*. However, the synchronization reference input s*
If there is a phase difference between the input signal and the feedback input, the detection output _v2 is sent out from the phase difference detector 22, and since a slight frequency difference remains between the two inputs, this component is used to control the phase so that they match. The operation is performed and the inverter output is synchronized to the synchronization reference input s*. In this case, the frequency difference component changes depending on the output v ₂ of the phase difference detector 22 and the magnitude of the resistor R ₂ , so this output v ₂ and the resistor R ₂
By adjusting the load 18, the inverter 1
The synchronization speed can be adjusted to an appropriate synchronous speed that can normally follow the change in the output frequency of No. 4. In this way, the inverter output is the synchronous reference input s*
When synchronized with , a "1" signal is supplied from the output terminal of the synchronization detector 24 to the input terminal A ₁ of the switch 36 as a synchronization detection signal. Therefore, Table 1 ()
As shown in the figure, a "1" signal from the output terminal B ₁ of the switching device 36, a "0" signal from the output terminal B ₂ , and a "1" signal from the output terminal B ₃ are sent to the analog switch 26,
The analog switch 26 is opened, the analog switch 32 is closed, and the analog switch 34 remains open. Therefore, the output side of the phase difference detector 22 is switched to a proportional-integral adjustment circuit with a fast response speed consisting of a differentiator 30 and an integrator 28, and the phase of the synchronization reference input s* changes, causing the phase difference detector 2 to change.
When the detection output v ₂ occurs at the output terminal of 2,
Inverter output is quickly adjusted. In the embodiments described above, the differentiator 30 can be replaced by various types of proportional-integral regulators, and the switch 36 can be replaced with a NAND circuit 40 and an exclusive OR circuit 42, 44, 4, as shown in FIG.
A similar effect can be obtained by replacing the switching device 56 with a switching device 56 composed of 6 and 54. However, in this case, when a "1" signal is supplied to the input terminals A ₁ and A ₂ , a "0" signal is sent from the output terminal B ₃ , and a synchronization command signal is sent from the synchronization command signal generator 38. When a synchronization detection signal is sent from the synchronization detector 24 in a state where the analog switch 34 is closed, the resistor _R3 is inserted in parallel with the integrator 28, and a rapid response control system is constructed. Moreover, the synchronization detector 24 in the above-mentioned embodiment
is replaced with a comparator 58 as shown in FIG.
The same effect can be achieved even if the configuration is such that an output is generated when the detection output of the phase difference detector 22 decreases below a predetermined reference amount. Furthermore, the differentiator 3 in the embodiment shown in FIG.
0 is omitted, and as shown in FIG. 6, a resistor _R4 is connected in series with the integrator capacitor, and an analog switch 60 is connected in parallel with this resistor _R4 .
In addition, the switch 56 shown in FIG. 5 is replaced with a switch 64 composed of a NAND circuit 40, exclusive OR circuits 42, 44, 46, 54, and a NOT circuit 62, as shown in FIG. vessel 6
Even if the output terminal B _2a of No. 4 is connected to the operation input terminal of the analog switch 60, the same effect as in the previous embodiment is obtained. That is, when the synchronization detection signal is not output from the comparator 58 while the synchronization command signal is supplied to the switch 64, the analog switch 26 is closed and the analog switches 32 and 34 are closed, as in the previous embodiment. At the same time, the analog switch 60 is closed and the resistor R ₄ is short-circuited. However, when the synchronization detection signal is supplied from the comparator 58 to the input terminal A ₁ of the switch 64, the analog switch 26 is opened. Analog switch 32,3
4 is closed, and the input terminal B _2a of the switch 64
A "1" signal having the opposite polarity to the output terminal _B2 is supplied to the operation input terminal of the analog switch 60, the analog switch 60 is opened, and the resistor _R4 is inserted to form a quick response control system. According to the device of the present invention, it is possible to synchronize the inverter at a slow speed that the load can follow without any trouble, and if the phase of the synchronization reference input fluctuates after the synchronization is completed, this fluctuation can be quickly corrected. The phase can be controlled accordingly, which has an extremely large effect on improving the performance of this type of inverter synchronous control device. Although the preferred embodiments of the present invention have been described above, it goes without saying that various design changes can be made without departing from the spirit of the present invention.

[Brief explanation of drawings]

Fig. 1 is a block wiring diagram showing the configuration of a conventional inverter synchronous control device, Fig. 2 is a block wiring diagram showing the configuration of an inverter synchronous control device for which a patent application was filed at the same time, and Fig. 3 is a block wiring diagram showing the configuration of an inverter synchronous control device according to the present invention. 4 is a circuit diagram showing an example of the configuration of a switching device in the device of the present invention shown in FIG. 3, and FIG. 6 is a block wiring diagram showing another embodiment of the device of the present invention, and FIG. 7 is an example of the configuration of the switch in the device of the present invention shown in FIG. 6. FIG. 10... Uninterruptible power supply main circuit, 12... Rectifier, 14... Inverter, 16... Condenser, 18
... Load, 20 ... Frequency difference detector, 22 ... Phase difference detector, 24 ... Synchronization detector, 26 ... Analog switch, 28 ... Integrator, 30 ... Differentiator, 32, 34 ... Analog switch, 36...
Switcher, 38... Synchronous command signal generator, 40...
NAND circuit, 42, 44, 46...exclusive OR circuit, 48...voltage-frequency converter, 5
0... Frequency setting signal generator, 52... Pulse distributor, 54... Exclusive OR circuit, 56...
...Switcher, 58...Comparator, 60...Analog switch, 62...NOT circuit, 64...Switcher.

Claims (1)

[Claims] 1. An integral obtained by detecting the phase difference and frequency difference between the synchronization reference input and the inverter output using a phase difference detector and a frequency difference detector, respectively, and integrating these detection outputs using an integrator. The circuit is configured to correct the inverter frequency setting value according to the value, synchronize the inverter output with the synchronization reference input based on the corrected inverter frequency command signal, and detect that the inverter output is synchronized with the synchronization reference input. and a proportional-integral adjustment circuit with the integrator that corrects the inverter frequency set value according to the phase difference between the synchronization reference input and the inverter output when the phase of the synchronization reference input fluctuates, and controls the inverter frequency. a differentiator or a proportional-integral regulator, and a switch for switching a circuit to supply the detection output of the phase difference detector to the proportional-integral regulation circuit when receiving the detection output of the synchronous detector. A synchronous control device for an inverter, characterized in that: 2 The phase difference and frequency difference between the synchronization reference input and the inverter output are detected by a phase difference detector and a frequency difference detector, respectively, and these detection outputs are integrated by an integrator. The circuit is configured to correct the frequency setting value and synchronize the inverter output with the synchronization reference input based on the corrected inverter frequency command signal, and when the detected output of the phase difference detector decreases below a predetermined reference amount. a comparator that detects that the inverter output is synchronized with the synchronization reference input and generates a predetermined output; a resistor connected in series to the integrating capacitor of the integrator; a switch connected in parallel to the resistor; 1. A synchronous control device for an inverter, comprising: a switch that switches a circuit to supply the detection output of the phase difference detector to the integrator based on the output of the inverter, and opens the switch.