JPS6365261B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a four-phase phase demodulator that is required during demodulation on the receiving side of a four-phase phase modulation system.

Conventionally, carrier wave regeneration methods have used multiplication methods and inverse modulation methods, but because they involve many high-frequency circuits, they have many disadvantages such as large circuit scale and troublesome adjustment.・From the band signal,
The mainstream method is to reproduce the carrier wave (baseband processing method).

Various baseband processing methods are known, but recently DECISION
FEEDBACK type (MK Simon, “Offset
Quadrature Communications with Decision−
Feedback Carrier Synchronization”, IEEE
Transaction on Communications, Vol.COM−
22, No. 10, Oct. 1974) is attracting attention. However, this method is
It is abbreviated as ), which will be described in detail later, requires a DC multiplier that complicates the circuit, and also requires a DC multiplier to keep the eye pattern opening constant after demodulation. Automatic gain control (hereinafter referred to as
The drawback was that it did not have the AGC (abbreviated as AGC) function.

It is an object of the present invention to eliminate the above-mentioned conventional drawbacks, to be easy to implement by combining ordinary simple circuits and digital circuits, and to provide carrier wave regeneration and AGC.
The object of the present invention is to provide a four-phase phase demodulator having both functions.

According to the present invention, there is provided a first signal branching means for branching a signal from an input into two, and a first and second phase detection means for receiving each of the two branched signals and performing orthogonal synchronous detection. , a voltage-controlled oscillation means controlled by an automatic phase control signal for obtaining local signals of the first and second phase detection means, and a second branch for branching the output signal of the voltage-controlled oscillation means into two. and means for shifting the phase of one output signal from the second signal branching means by 90°;
and first and second first and second binary signals that receive the output signal of the second phase detection means and output first and second binary signals, respectively.
In a four-phase phase demodulator having identification means,
variable gain amplification means for receiving an input signal and outputting a signal having a constant amplitude to the first signal branching means according to an automatic gain control signal; means for outputting first and second error signals; means for outputting the automatic gain control signal using the first and second error signals; and the first error signal and the first binary signal. means for receiving the second error signal and outputting a third error signal; and a fourth means for receiving the second error signal and the second binary signal.
and means for outputting the automatic phase control signal using the third error signal, the second binary signal, the fourth error signal, and the first binary signal. A four-phase phase demodulator is obtained, which is characterized by comprising:

A detailed explanation will be given below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a conventional four-phase demodulator. In the figure, 1 is a first signal branch circuit, 2 and 3 are first and second phase detectors, 4 is a voltage controlled oscillator, 5 is a second signal branch circuit, and 6 is a 90° phase shifter. , 7, 8 are the first,
a second binary discriminator; 9 and 10 are first and second DC multipliers, respectively; 11 is a circuit that calculates the sum of two signals;
12 is a low frequency filter.

Regeneration of the carrier wave, that is, the local signals of the phase detectors 2 and 3, is performed by a voltage controlled oscillator 4, a second signal branching circuit 5 and a 90° phase shifter 6. Therefore, the first and second phase detectors 2 and 3 perform orthogonal synchronous detection by the first and second local signals output from the 90° phase shifter 6 and the second signal branch circuit 5, respectively. Let's do it. However, this conventional example has the disadvantage that DC multipliers 9 and 10 with complicated circuits are required in order to obtain an automatic phase control (hereinafter abbreviated as APC) signal for controlling the voltage controlled oscillator 4. Ta. In addition, it does not have an AGC function, and has drawbacks such as the inability to maintain a constant eye pattern opening after demodulation.

FIG. 2 is a block diagram showing the structure of an embodiment of a four-phase demodulator according to the present invention. In the figure, the same symbols as in FIG. 1 are circuits having the same functions, 13 is a variable gain amplifier, 14,
15 is a full-wave rectifier, 16 and 17 are binary discriminators whose threshold is the 1-value level after rectification, 18 and 19 are exclusive NOR circuits, 20 and 21 are exclusive OR circuits,
22 represents a circuit that takes the difference between two input signals, and 23 represents a circuit that takes the sum of the two input signals.

The operating principle of the present invention will be explained below with reference to FIG.

The variable gain amplifier 13 that receives the IF input signal is controlled by an AGC signal, which will be described later, and outputs a signal with a constant amplitude to the first signal branch circuit 1. The respective signals branched into two by this first signal branching circuit 1 are supplied to phase detectors 2 and 3. In the phase detectors 2 and 3, synchronous detection is performed using mutually orthogonal local signals from the 90° phase shifter 6 and the second signal branch circuit 5. At this time, the detection outputs of phase detectors 2 and 3 are respectively expressed as shown in the figure.
Let D _P and D _Q. D _P and D _Q are binarized by binary discriminators 7 and 8, respectively, and become output data D^ _P and D^ _Q , which are first and second binary signals. Also, D _P and D _Q are
The signals are rectified by full-wave rectifiers 14 and 15, respectively, with the center level of the waveform as a reference, and converted into a one-value waveform. The 1-value waveforms output from the full-wave rectifiers 14 and 15 are subjected to binary discrimination using the 1-value level as a threshold in binary discriminators 16 and 17, respectively, and the first and second error signals E^ Obtain _P , E^ _Q.

FIGS. 3a and 3a' show the above-mentioned threshold level and the waveform after rectification. In the figure, level l ₂
indicates the threshold value identified by the discriminators 7 and 8, and level l ₁ indicates the threshold value identified by the discriminators 16 and 17. Also,
As shown in FIG. 3a, in the present invention, D _P ,
Decompose D _Q into four regions. Exclusive NOR circuit 1
In 8 and 19, input D^ _P and E^ _P , D^ _Q and E^ _Q , respectively.
Third and fourth error signals Y^ _P and Y^ _Q shown by the following equations are obtained.

Y^ _P = D^ _P ○†

Claims (1)

[Claims] 1: a first signal branching means for branching a signal from an input into two; first and second phase detection means for receiving each of the two branched signals and performing orthogonal synchronous detection; Voltage controlled oscillation means controlled by an automatic phase control signal for obtaining a local signal of the second phase detection means; second signal branching means for branching the output signal of the voltage controlled oscillation means into two; and one output signal from the second signal branching means.
90° phase shifting means; and first and second phase detection means receiving the output signals of the first and second phase detection means, respectively.
a four-phase phase demodulator having first and second discriminating means for outputting a binary signal, which receives an input signal and outputs a signal having a constant amplitude to the first signal branching means by an automatic gain control signal; variable gain amplification means for outputting first and second error signals using the output signals of the first and second phase detection means, and means for outputting first and second error signals using the first and second error signals, means for outputting the automatic gain control signal;
means for receiving the error signal and the first binary signal and outputting a third error signal; and receiving the second error signal and the second binary signal and outputting a fourth error signal. means, the third error signal and the second
A four-phase phase demodulator, comprising means for outputting the automatic phase control signal using the binary signal, the fourth error signal, and the first binary signal.