JPS6366057B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrated circuit device in the form of a circuit that requires resistive termination.

It has a net wiring from a certain output to a load,
A lumped constant circuit or a distributed constant circuit is determined depending on whether the wiring length reaching the farthest point is larger or smaller than the pulse rise time. When working with distributed constant circuits, terminate the resistor (far end) to prevent reflections.
It is necessary to provide One type of circuit formation that requires termination with such a resistor is ECL (emitter termination).
When configuring a hybrid integrated circuit device (coupled logic), as shown in Figure 1,
In addition to IC chips 1, 2, 3...5, resistor chips 6,
7...9 are prepared respectively, and signal wirings a, b, and c are routed from IC1, which is the drive source, through express ICs 2 and 3.
is provided, and the signal wiring is connected by wiring d using the resistor chip 9 corresponding to the final end IC 4 as a terminating resistor.

By the way, the connection d between the IC and the terminating resistor has no logical meaning unlike the connection between the ICs. Therefore, the connection between the IC and the terminating resistor becomes an obstacle in the wiring layout between the ICs, which has a logical meaning, and this places a large burden on the design and manufacture of wiring boards for hybrid integrated circuits. Furthermore, by adding a resistor chip in addition to the IC chip, the number of chips to be mounted increases and the required area increases, resulting in an increase in the size of the entire circuit device and a heavy burden on manufacturing technology.

The present invention has been made to solve the problems of the prior art described above, and an object of the present invention is to provide an effective integrated circuit device for hybrid mounting of a circuit that requires a terminating resistor. Another object of this invention is to realize hybridization of ultra-high-speed circuits.

In order to achieve the above object, the present invention includes a circuit that allows selection of whether or not to connect a terminating resistor to a circuit configured on a semiconductor chip, and electrically connects the semiconductor chip to a wiring board. an integrated circuit device comprising: forming circuit connection bumps on the semiconductor chip to serve as external connection terminals of the circuit;
Further, a terminating resistor is formed on the semiconductor chip, and a terminating resistor bump electrically connected to the terminating resistor is formed corresponding to the circuit connecting bump, and the wiring of the wiring board is used to connect the terminating resistor to the semiconductor chip. When the terminating resistor is electrically connected to the circuit of the semiconductor chip, the circuit connecting bump is electrically connected to the terminating resistor bump, and when the terminating resistor is not electrically connected to the circuit of the semiconductor chip. The present invention is characterized in that the circuit connection bump is not electrically connected to the termination resistor bump.

FIG. 2 shows the basic configuration of the present invention. 10
is a semiconductor IC chip using the CCB (control collapse bonding) method, and there are bumps (protruding electrodes) for signal input along the periphery of the chip.
11 are arranged, and each bump is connected to an internal circuit by an internal wiring (see FIG. 4). A termination resistor 13 is formed on the periphery of the chip substrate, and a termination resistor bump 12 is provided corresponding to each input signal bump. In the figure, broken line 14
indicates the wiring on the board, and depending on whether or not the wiring on the board is connected to the transistor bump 12, the pellet 10 can be connected to the chips 2 and 3 that are not connected to the resistor chip in FIG. 1 and to the terminating resistor. It is used for any of the chips 4, and when these chips are mounted on a wiring board, they are connected as shown in FIG.

By the way, as a means of selecting whether or not the wiring 14 is connected to the bump 12, it is possible to form a wiring connecting the two as shown in FIG. There is a way to form one and short-circuit it in some way. As shown in FIG. 6, method a is provided so that the wiring 14 on the substrate 15 is connected to the bumps 11 and 12, and if this chip requires connection to the final resistor, it is left as is.
If the connection is not required, the wiring is cut using, for example, a laser beam 16 as shown in FIG. For method b, refer to FIG. 8 and leave a gap 17 of several μm between a part of the wiring corresponding to the terminal resistor pad 12.
On the other hand, as shown in FIG. 9, the capillary 18 of the wire bonder is operated to short-circuit the gap 17 between the wiring pads with a wire (gold wire or aluminum wire) 19.

According to the present invention described in the embodiments above, (1) termination
There is no need to newly install a resistor chip in addition to the IC chip, the number of chips to be mounted is reduced, and the overall area of the hybrid integrated circuit device does not increase. (2) The area around the IC chip is empty, and this is where the termination Providing a resistor does not increase the size of the chip, (3)
Since there is no need to provide wiring for connection between the IC chip and the resistor chip on the wiring board, there is no burden on designing and manufacturing wiring for the necessary logic circuits, and circuits that require termination with a resistor can be realized. The present invention is extremely effective for hybrid implementation. As a result, it has become possible to create hybrid ultra-high-speed circuits that require terminating resistors.

The present invention is not limited to the embodiments described above, and can be implemented in various other forms.

[Brief explanation of drawings]

FIG. 1 is a schematic connection diagram showing a conventional example of a hybrid integrated circuit in a circuit type that requires a terminating resistor. FIGS. 2 to 9 are diagrams for explaining the present invention, and
FIG. 2 is a principle explanatory diagram for explaining one chip, FIGS. 3a and 3b are schematic diagrams showing connection means between board wiring and bumps, and FIG. 4 is a plan view showing the arrangement of bumps on the chip. Fig. 5 is a cross-sectional view showing the connection form between the bumps on the chip and the wiring on the board, Fig. 6 is a plan view showing one method of connecting the bumps and the wiring, Fig. 7 is the same cross-sectional view, and Fig. 8 is the bump FIG. 9 is a plan view showing another method of connecting wires, and FIG. 9 is a cross-sectional view of the same. 1... Drive source IC chip, 2, 3, 4, 5...
IC chip, 6, 7, 8, 9...terminal resistor chip,
10...IC chip, 11...input signal bump,
12...Resistance bump, 13...Terminal resistor formed in IC chip, 14...Wiring on wiring board, 15...Substrate, 16...Laser light, 17...
...Wiring bump gap, 18...Capillary, 19
...Wire.

Claims (1)

[Claims] 1. An integrated circuit device comprising a circuit configured on a semiconductor chip in which it is possible to select whether or not to connect a terminating resistor to a circuit configured on a semiconductor chip, and the semiconductor chip is electrically connected to a wiring board, the integrated circuit device comprising: A circuit connection bump is formed on a semiconductor chip to serve as an external connection terminal of the circuit, a terminating resistor is formed on the semiconductor chip, and the terminating resistor bump electrically connected to the terminating resistor is connected to the circuit. When the termination resistor is electrically connected to the circuit of the semiconductor chip by the wiring of the wiring board, the circuit connection bump is formed corresponding to the termination resistor bump. an integrated circuit device, characterized in that when the terminal resistor is not electrically connected to the circuit of the semiconductor chip, the circuit connecting bump is not electrically connected to the terminal resistor bump.