JPS6366424B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to fixed segment LSIs, that is, multilayer LSIs in which segments are fixedly provided in specific layers.
The present invention relates to a wiring pattern creation processing method.

In recent years, multilayer
Fixing basic gate circuits, terminals, and independent segments (segments that are free from the terminals) on a specific layer of an LSI, and then wiring between the through holes on the terminals or segments of the specific layer on other wiring layers. A master slice type LSI is generally used to realize a desired logic circuit.

When wiring an LSI using this method, the first thing to consider is how to use the fixed layer segments effectively without waste. That is, by effectively utilizing the segments of the fixed layer, the degree of freedom of the free wiring layer increases, and the risk of generating unconnected sections decreases accordingly. Therefore, conventional free wiring pattern creation processing has been performed from the viewpoint of effective use of the fixed segments. By the way, fixed segments are usually provided with through holes not only at both end points but also in the middle of the segment for convenience of wiring.
Therefore, not all fixed segments form a pattern through both end points, and some segments are connected through through holes in the middle of the segments.

In this way, the segments forming a pattern through the through holes in the middle of the segments are
Some or all of them are redundant in terms of pattern formation, and the electrical characteristics of the circuit deteriorate accordingly. As described above, in the conventional wiring pattern creation process, there is a problem in that an electrically undesirable pattern is generated.

The main purpose of the present invention is to solve the above-mentioned problems of the conventional type, and to improve the LSI wiring pattern by changing a pattern with poor electrical characteristics to a pattern with better electrical characteristics in the creation of a wiring pattern of a fixed segment type LSI. An object of the present invention is to provide a method for improving the electrical characteristics of a semiconductor device.

According to the present invention, there is provided a wiring pattern creation processing method for a fixed segment LSI, including the step of detecting a fixed segment having a redundant portion in the wiring pattern, and the step of freely creating a route different from a route via the detected fixed segment. a step of discovering in the wiring layer; a step of comparing the electrical characteristics of the route via the detected fixed segment with the discovered route; removing a route via the fixed segment from the wiring pattern;
There is provided a wiring pattern creation processing method for a fixed segment LSI, comprising the step of embedding the discovered route into the wiring pattern of the free wiring layer.

Segment fixed type as an embodiment of the present invention
The LSI wiring pattern creation processing method will be explained below using FIGS. 1, 2, and 3. FIG. 1 shows a wiring pattern created by a conventional method, and FIG. 2 shows a wiring pattern improved using the wiring pattern creation processing method of the present invention. Further, FIG. 3 shows the operating procedure in the wiring pattern creation processing method according to the present invention.

The wiring pattern in FIG. 1 consists of a route connecting terminals A and B, and a route connecting terminals C and D. In FIG. 1, 11, 12, 13, 14 are fixed segments provided in the fixed layer, and 21, 22, 23, 2
4, 25, and 26 are patterns in the free wiring layer, and 31, 32, and 33 are wiring obstacles such as unused terminals. The fixed segment 11 is provided with through holes 111, 112, 113, 114, and the fixed segment 12 is provided with through holes 12.
1, 122, 123, 124 are provided, and the fixed segment 13 has through holes 131, 132,
Through holes 141, 142, 143, and 144 are provided in the fixed segment 14, respectively.

In the wiring pattern shown in FIG. 1, terminal A and terminal B cannot be directly connected due to obstacles 31, 32, etc. in the free wiring layer.
from the through hole 112 through the pattern 21 of the free wiring layer, from the through hole 114 through the fixed segment 11 to the through hole 121 again through the pattern 22 of the free wiring layer, and further from the through hole 124 through the segment 12. It is connected to terminal B via the pattern 23 of the free wiring layer. In the route from terminal A to terminal B, the portion of fixed segment 11 between through holes 111 and 112 is a redundant portion that is not included in the connection path. Furthermore, in the route connecting the terminals C and D, all of the fixed segments 13 serve as a redundant part in the connection path.

In the wiring pattern creation processing method according to the present invention, in order to remove the redundant portions of the fixed segments as described above, after all wiring processing is completed, the free wiring layer is created without considering the degree of freedom of the free wiring layer. Any free trace can be used.

The wiring pattern shown in FIG. 1 can be changed to the wiring pattern shown in FIG. 2 based on the principle of the present invention described above. In the wiring pattern of FIG. 2, the patterns 21 and 22 on the free wiring connected to the fixed segment 11 having a redundant part in the route from terminal A to terminal B of FIG. A pattern 41 connecting A to the through hole 121 at the end of the fixed segment 12 is provided on the free wiring layer. Furthermore, in the route connecting terminals C and D, patterns 24 and 25 connected to fixed segment 13 having a redundant portion are removed, and a new pattern 42 is provided.
The wiring pattern shown in FIG. 2 has a reduced total metal capacitance and a reduced number of intervening through holes compared to the wiring pattern shown in FIG. 1, and has clearly improved electrical characteristics.

Means for carrying out the wiring pattern creation processing method according to the present invention will be explained below with reference to FIG. At the start of the processing procedure shown in FIG. 3, it is assumed that the wiring pattern of a conventional fixed segment LSI has been input as data.

In the wiring pattern creation process according to the present invention, first, it is checked whether such a fixed segment exists in step 1 of detecting a fixed segment having a redundant part from a conventional wiring pattern. If no such fixed segment exists, the wiring process ends. If a detected fixed segment is detected, step 2 explores whether a different route can be realized in the free wiring layer in place of the route through the fixed segment. If another route is not found, as shown in FIG. 3, the process returns to step 1 to continue processing the unprocessed portion of the wiring pattern.

If a new route different from the route via the detected fixed segment is found in step 2, a comparison of the electrical characteristics of the new route and the original route is performed in step 3.

If the electrical characteristics of the new route are comparable to or lower than those of the old route, the process returns to step 1 and wiring processing is performed on the unprocessed portions. If the electrical characteristics are improved by the new route, in step 4, the route via the detected fixed segment is removed from the wiring pattern based on the results of the comparison in the step of comparing electrical characteristics. The route is embedded in the wiring pattern of the free wiring layer.

Thereafter, the process returns to step 1 and the same process is repeated for the unprocessed portion. The process ends when no new fixed segments with redundant parts are detected. In this way,
Electrically undesirable parts of LSI wiring patterns will disappear.

According to the present invention, a pattern with poor electrical characteristics can be changed to a pattern with good electrical characteristics in the wiring pattern creation process of a fixed segment LSI.
Thereby, the electrical characteristics of the LSI wiring pattern can be improved.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a wiring pattern of a segment fixed type LSI obtained by a conventional wiring pattern creation processing method, and FIG. 2 is a diagram showing a wiring pattern of a segment fixed type LSI obtained by using a wiring pattern creation processing method according to the present invention. FIG. 3 is a diagram showing a processing procedure in a wiring pattern creation processing method for a fixed segment LSI according to the present invention. (Explanation of symbols) A, B, C, D...terminals, 1
1, 12, 13, 14...Fixed segment, 11
1,112,113,114,121,122,
123, 124, 131, 132, 133, 13
4, 141, 142, 143, 144...Through hole, 21, 22, 23, 24, 25, 26, 4
1, 42...Free wiring layer pattern, 31, 32,
33...Wiring obstruction.

Claims (1)

[Claims] 1. A wiring pattern creation processing method for a fixed segment LSI, which comprises: detecting a fixed segment having a redundant portion in the wiring pattern; and creating a route different from a route passing through the detected fixed segment; a step of discovering in the free wiring layer; a step of comparing the electrical characteristics of the route via the detected fixed segment with the discovered route; and based on the comparison result in the comparing step, a fixed segment type characterized by comprising the steps of: removing a route via the fixed segment from the wiring pattern; and embedding the discovered route in the wiring pattern of the free wiring layer.
LSI wiring pattern creation processing method.