JPS637487B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a filter using a biquad circuit in which signal polarities at input and output terminals can be made in phase.

Conventionally, a filter using a biquad circuit composed of a plurality of switched capacitors and two stages of integrators has the configuration shown in FIG. Operational amplifier OP ₁ ,
OP ₂ and integrating capacitors C ₁ and C ₂ (C ₁ = C ₂ = C
), two stages of integrators are connected in cascade, and the switched capacitors are connected in four stages: K ₀ C, K ₁ C, K ₂ C, K ₄ C.
In a filter using an ordinary capacitor K ₃ C, the input voltage V ₁ and the output voltage V ₂ have opposite polarities. Now, if the integral function connected to the switched capacitor is approximately expressed as an analog integrator function -1/S (S=jω), the equivalent circuit shown in FIG. 2 is obtained.
In Figure 2, α ₀ =K ₀ /T, α ₁ =K ₁ /T, α ₂ =K ₂ /T, α ₃ =K ₃ ,
Letting α ₄ = K ₄ /T (where T indicates the sampling period of the switched capacitor), the relationship between V ₁ , Vm, and V ₂ can be expressed as Vm = α ₀ (-1 /S)V ₁ +α ₁ (-1/S)V ₂ ...(1) V ₂ =-α ₂ (-1/S)Vm+α ₄ (-1/S)V ₂ -α ₃ V ₁ ...( 2) Eliminate Vm from equations (1) and (2) to find V ₂ /V ₁ : V ₂ /V ₁ = - (α ₀ α ₂ + α ₃ S ² ) / α ₁ α ₂ + α ₄ S+S ² …
…(3) The negative sign in equation (3) is the output signal for input signal V ₁ .
V ₂ indicates that the polarity is reversed. Therefore, when obtaining an output signal V ₂ that is in phase with V ₁ , the first
It is necessary to additionally use an operational amplifier for phase inversion at the output section (or input section) shown in the figure. As a result, power consumption increases, and the filter becomes larger and more expensive.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a filter using a biquad circuit which improves the above-mentioned drawbacks and obtains an output signal in phase with the input with a simple configuration.

Embodiments of the present invention shown in the drawings will be described below. FIG. 3 is a circuit configuration diagram showing a first embodiment of the present invention, and the same reference numerals as in FIG. 1 indicate the same components. K ₀ ′C is the switched capacitor K ₀ C in Figure 1.
Operational amplifier OP ₁ by inverting the input signal phase compared to
Switched capacitance applied to K ₃₁ C,
K ₃₂ C and K ₃₃ C use three switched capacitors compared to K ₃ C shown in FIG. Also φ ₁ ,
φ ₂ , φ ₃ and φ ₄ represent clock pulses applied to the switch, and FIG. 4 shows their phase relationship. Each switch conducts at the high level of the clock pulse and shuts off at the low level. Using three switched capacitors K ₃₁ C, K ₃₂ C, and K ₃₃ C, the difference charge between the value of the input signal V ₁ one cycle before and the current value is transferred to the integrating capacitor C ₂ of the second stage integrator. The data is transferred without reversing the polarity. The switched capacitor _K31C inverts the phase of the input signal charge and transfers it to the integrating capacitor _C2 every cycle. Switched capacitors K ₃₂ C and K ₃₃ C alternately transfer input signal charges sampled one cycle earlier than switched capacitor K ₃₁ C to integrating capacitor C ₂ without inverting the polarity. This relationship is expressed by the following equation.

CV ₂ = K ₃₁ CV ₁ - K ₃₂ (or K ₃₃ ) CV ₁・Z ^-1 + CV ₂ Z ^-1 ...(5) If we now select K ₃₁ = K ₃₂ = K ₃₃ = K ₃ , V ₂ /
V ₁ =K ₃ is obtained. That is, in this circuit, the polarity of the input/output signal is not inverted. As in the case of Fig. 1, if the switched capacitor integrator function in Fig. 3 is approximately represented by the analog integrator function -1/S (S = jω), the equivalent circuit shown in Fig. 5 is obtained. . Comparing Figure 5 and Figure 2, the sign of α ₀ changes from (+) to (-)
, the sign of α ₃ changes from (-) to (+). Therefore, the relationship between the input and output signals in FIG. 5 can be obtained by inverting the signs of α ₀ and α ₃ in equation (3), and is given as follows.

V ₂ /V ₁ =α ₀ α ₂ +α ₃ S ² /α ₁ α ₂ +α ₄ S+S ² ...(6) Next, FIG. 6 shows a second embodiment of the present invention, in which the input and output signals are FIG. 3 is a circuit configuration diagram when obtaining two output signals of opposite phases. The input of the operational amplifier OP ₁ is connected from the V ₁ terminal to the other switched capacitor K ₇ C
An input signal is applied via. In addition, the input of the operational amplifier OP ₂ is connected from the V ₁ terminal to another capacitor K ₈ C.
An input signal is applied via. The output of V ₂ is in phase opposite to the input from the V ₁ terminal, and the output of V ₂ is in phase with respect to the input from the V ₃ terminal. V ₁
For input from the terminal, operate as shown in Figure 1, V ₃
Since the operations shown in FIG. 3 are performed for inputs from the terminals, they can be switched as appropriate or used simultaneously.

In this way, according to the present invention, in a filter using a biquad circuit, a configuration in which the output signal is in phase with the input signal can be easily obtained, so that the filter is small and simple.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a conventional filter, FIG. 2 is an equivalent circuit diagram of FIG. FIG. 5 is an equivalent circuit diagram of FIG. 3, and FIG. 6 is a circuit configuration diagram of a second embodiment of the present invention. OP ₁ , OP ₂ ... operational amplifier, C ₁ , C ₂ ... capacitor, K ₀ C, K ₀ C, K ₁ C, K ₂ C, K ₃₁ C, K ₃₂ C,
K ₃₃ C, K ₄ C, K ₅ C, K ₇ C...Switched capacity.

Claims (1)

[Claims] 1. In a filter using a biquad circuit composed of a plurality of switched capacitors and two stages of integrators, the input signal input to the first stage integrator is connected to a switched capacitor for inverting the polarity. The second stage integrator includes a first switched capacitor that inverts the polarity of the input signal and inputs it every sampling period, and a first switched capacitor that inverts the polarity of the input signal and inputs it every sampling period. 1. A filter using a biquad circuit, characterized in that it is equipped with second and third switched capacitors that alternately transmit input signals. 2. Use of the biquad circuit according to claim 1, characterized in that the input terminals of the first and second stage integrators are further provided with input terminals via other switched capacitors and other capacitors, respectively. filter.