Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JPS638432B2 - - Google Patents
[go: Go Back, main page]

JPS638432B2 - - Google Patents

Info

Publication number
JPS638432B2
JPS638432B2 JP53149377A JP14937778A JPS638432B2 JP S638432 B2 JPS638432 B2 JP S638432B2 JP 53149377 A JP53149377 A JP 53149377A JP 14937778 A JP14937778 A JP 14937778A JP S638432 B2 JPS638432 B2 JP S638432B2
Authority
JP
Japan
Prior art keywords
circuit
patterns
circuit pattern
pattern
short
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53149377A
Other languages
Japanese (ja)
Other versions
JPS5575659A (en
Inventor
Fumihiro Hoshiai
Kazuo Pponda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14937778A priority Critical patent/JPS5575659A/en
Publication of JPS5575659A publication Critical patent/JPS5575659A/en
Publication of JPS638432B2 publication Critical patent/JPS638432B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Description

【発明の詳細な説明】 本発明は回路基板上に設けられた所定の回路を
構成するそれぞれの回路パターンの相互間の絶縁
状態を検出する回路基板の絶縁検査方法及びその
装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit board insulation testing method and apparatus for detecting the mutual insulation state of circuit patterns constituting a predetermined circuit provided on a circuit board.

一般にプリント配線板などの回路基板は第1図
に示すように絶縁基板上に所定の回路を構成する
ため導電性を有する多数の回路パターン1,2,
3……nが隣接しており、隣接する回路パターン
間が製造工程上の不備により短絡することがあ
る。このため短絡不良を検出する必要が生じる。
Generally, a circuit board such as a printed wiring board has a large number of conductive circuit patterns 1, 2,
3...n are adjacent, and adjacent circuit patterns may be short-circuited due to defects in the manufacturing process. Therefore, it is necessary to detect short-circuit defects.

従来、これらの短絡不良個所の検出は目視で行
うかテスター等の人手によつていたが、電子機器
の高集積化にともないプリント配線板の回路パタ
ーンが高密度化され、さらに小型精密機器の電子
化により、微少高密度配線のプリント配線板が多
品種量産化されるに至つている。このため目視検
査では不要個所の検出は不可能となり、電気的な
自動校出手段で短絡個所を検出する方法及び装置
が考案され実用化されるに至つている。
In the past, these short-circuit failures were detected visually or manually using a tester, but as electronic equipment becomes more highly integrated, the circuit patterns on printed wiring boards become more dense, and smaller precision equipment becomes more dense. Due to computerization, printed wiring boards with minute high-density wiring are being mass-produced in a wide variety of types. For this reason, it has become impossible to detect unnecessary points by visual inspection, and methods and devices for detecting short-circuit points using electrical automatic calibration means have been devised and put into practical use.

第2図は従来の不良個所の検出手段の一構成例
で絶縁試験回路図を示し、Tは測定回路、P1
P2……Pnは第1図に示す回路基板上の回路パタ
ーン1,2,……nにそれぞれ対応する検出プロ
ーブ、S1,S2……Snは検出プローブP1,P2,…
…Pnにそれぞれ切換接片d1,d2……dnが接続さ
れた回路切換スイツチであり、固定接片b1,b2
…bnが測定回路Tの一方の端子Aに接続され、
固定接片C1,C2……Cnが測定回路Tの他方の端
子Bに接続され、切換接片d1,d2……dnが常時接
するオープン接片a1,a2……anを有している。
FIG. 2 shows an insulation test circuit diagram as an example of the configuration of a conventional defect detection means, where T is a measurement circuit, P 1 ,
P 2 ...Pn are detection probes corresponding to circuit patterns 1, 2, ... n on the circuit board shown in Fig. 1, S 1 , S 2 ...Sn are detection probes P 1 , P 2 , ...
...It is a circuit changeover switch in which switching contacts d 1 , d 2 ...dn are connected to Pn, respectively, and fixed contacts b 1 , b 2 ...
...bn is connected to one terminal A of the measurement circuit T,
The fixed contacts C 1 , C 2 ...Cn are connected to the other terminal B of the measuring circuit T, and the open contacts a 1 , a 2 ...an, which are always in contact with the switching contacts d 1 , d 2 ...dn, are connected to the other terminal B of the measuring circuit T. have.

このような構成により、二つの回路パターン間
の絶縁検査を行う場合は、回路基板上の回路パタ
ーン1,2……nに対して検出プローブP1,P2
……Pnを接触させ、回路切換スイツチS1,S2
…Snのうちの1個を切換え接片diが固定接片biに
接するように切換えて検出プローブpiが端子Aに
接続されるように切換え操作し、端子Aが接続さ
れている検出プローブが接触する回路パターンを
基準として、それ以外の独立した回路パターンの
全てを順次切換え接片diが固定接片ciに接するよ
うに回路切換スイツチを切換え操作し、B端子に
接続して測定回路TにてAB両端子間の絶縁状態
を検出することにより基準とした回路パターン
と、他の全てのパターンとの間の短絡を検出する
ことが出来る。同様にして基準となる回路パター
ンを順次端子Aに接続し、各々の場合に基準とな
る回路パターン以外の独立した回路パターンを順
次端子Bに接続すれば全回路パターン間の絶縁試
験が出来る。なお、この場合、回路パターン間の
絶縁試験の重複を避けるためには、各検出プロー
ブに固有のアドレス1,2……nを付け、アドレ
スnに対してはn−1,n−2,……1までの絶
縁検査、アドレスn−1に対してはn−2,n−
3……1までの絶縁検査というように常に低いア
ドレスに向つて絶縁検査を行えば良い。
With this configuration, when performing an insulation test between two circuit patterns, detection probes P 1 , P 2 are used for circuit patterns 1, 2...n on the circuit board.
...Pn is brought into contact with the circuit changeover switches S 1 , S 2 ...
...Switch one of Sn so that switching contact di contacts fixed contact bi, and switch operation so that detection probe pi is connected to terminal A, and the detection probe to which terminal A is connected comes into contact. Using the circuit pattern as a reference, switch all other independent circuit patterns sequentially so that the contact di contacts the fixed contact ci, connect it to the B terminal, and connect it to the measurement circuit T. By detecting the insulation state between the AB terminals, short circuits between the reference circuit pattern and all other patterns can be detected. Similarly, by sequentially connecting a reference circuit pattern to terminal A and, in each case, sequentially connecting an independent circuit pattern other than the reference circuit pattern to terminal B, an insulation test between all circuit patterns can be performed. In this case, in order to avoid duplication of insulation tests between circuit patterns, a unique address 1, 2...n is assigned to each detection probe, and n-1, n-2,... …Insulation test up to 1, n-2, n- for address n-1
It is sufficient to always perform the insulation test toward lower addresses, such as the insulation test up to 3...1.

しかし、かかる従来の絶縁検査方法では次の欠
点を有していた。
However, such conventional insulation testing methods have the following drawbacks.

(イ) まず、任意の基準回路パターンに対して全て
の回路パターンを切換えスイツチによつて選択
して試験する操作を全ての独立した回路パター
ン毎に行わなければならないため、今仮りに独
立したパターンがN個あるものとすれば、切換
え操作の回数は NC2=N(N−1)/2 にも及ぶ。例えば、N=200とすると19900回の
切換え操作が必要であり、試験に要する時間は
膨大なものとなり、操作も複雑となる。なお、
切換スイツチを半導体スイツチで構成すれば、
時間短縮が可能となるが、プリント配線板の持
つ容量及び制御プログラムの走行時間等の影響
で大幅な短縮は困難である。
(b) First, it is necessary to perform the operation of selecting and testing all circuit patterns with a changeover switch for any reference circuit pattern for each independent circuit pattern. If there are N, the number of switching operations reaches NC 2 =N(N-1)/2. For example, if N=200, 19,900 switching operations are required, resulting in an enormous amount of time and complicated operations. In addition,
If the changeover switch is configured with a semiconductor switch,
Although it is possible to shorten the time, it is difficult to significantly shorten the time due to the capacity of the printed wiring board and the running time of the control program.

(ロ) また、切換えスイツチは独立した回路パター
ンの数だけ必要であり、特に半導体スイツチの
場合は一般に双方向性では無いため、1回路パ
ターンにつき電流の流れる方向別に2個のスイ
ツチが必要であり、これらのスイツチ群を制御
する回路も含めると多大な費用を要していた。
(b) Also, the number of changeover switches required is equal to the number of independent circuit patterns, and in the case of semiconductor switches in particular, they are generally not bidirectional, so two switches are required for each direction of current flow per circuit pattern. Including the circuits to control these switches required a large amount of cost.

本発明の目的は上述した欠点を解決した、低コ
ストで操作が容易かつ短時間で検査可能な回路基
板の絶縁検査方法及び装置を提供することにあ
る。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method and apparatus for testing the insulation of a circuit board, which solves the above-mentioned drawbacks and can be tested at low cost, easily operated, and in a short time.

本発明によればいくつかの図形に分割された平
面を互いに隣接した図形は必ず異なつた色になる
ように塗り分けると最低4色で塗り分けることが
可能であるといういわゆる4色分類法を利用して
回路基板上の回路パターンと同一形状の写図上の
全回路パターンを4色で分類し、異なる色で分類
された回路パターンに対応する回路基板上の回路
パターン間の絶縁検査を行うものであり、上記写
図上の回路パターン中の第1の回路パターンに隣
接し、かつ第1の回路パターンと短絡可能性を有
する第2の回路パターンを第1の回路パターンと
異なる色別着色し、次に第2の回路パターンに隣
接し、かつ第2の回路パターンと短絡可能性を有
する第1の回路パターンを除いた第3の回路パタ
ーンを第1、第2の回路パターンと異なる色別着
色し、次に第3の回路パターンに隣接しかつ第3
の回路パターンに短絡可能性を有する第1、第2
の回路パターンを除いた第4の回路パターンを第
1、第2、第3の回路パターンと異なる色別着色
させ、上記写図上の同一色の回路パターンに対応
する全ての回路基板上の回路パターンを短絡させ
て1検査端子とし、4端子中の二端子間を順次絶
縁試験することを特徴とする。
According to the present invention, a so-called 4-color classification method is used, in which a plane divided into several figures can be painted in at least four colors if adjacent figures are always painted in different colors. All circuit patterns on the map that have the same shape as the circuit patterns on the circuit board are classified by four colors, and insulation inspection is performed between the circuit patterns on the circuit board that correspond to the circuit patterns classified in different colors. A second circuit pattern that is adjacent to the first circuit pattern among the circuit patterns on the map and has a possibility of shorting with the first circuit pattern is colored in a different color from the first circuit pattern. Next, a third circuit pattern that is adjacent to the second circuit pattern and excluding the first circuit pattern that has the possibility of short circuit with the second circuit pattern is colored differently from the first and second circuit patterns. color, then adjacent to the third circuit pattern and the third
The first and second circuit patterns have the possibility of short circuit.
The fourth circuit pattern excluding the circuit pattern is colored differently from the first, second, and third circuit patterns, and all the circuits on the circuit board corresponding to the circuit patterns of the same color on the above map are colored. The pattern is short-circuited to form one test terminal, and the insulation test is sequentially performed between two of the four terminals.

次に本発明の一実施例を第3図及び第4図によ
り説明する。第3図は第1図に示すプリント配線
板の回路パターンの写図で、回路パターン1,2
……nの一部を4色で分類したものであり、図中
斜線は赤、横線は青、格子は緑、白地は黄を表わ
すものとすると、互いに隣接しかつ直接短絡する
可能性のある回路パターン間は必ず赤と青、ある
いは緑と青のように異つた色で分類することが出
来る。例えば赤で分類された回路パターン1に対
して直接短絡する可能性のある回路パターンは
2,3,4,6,7,8であり、これらは全て赤
以外の色で分類されており、これらの回路パター
ンの中で2と7は直接短絡する可能性が無いた
め、同一の黄で分類されているが、2と3,2と
4は直接短絡する可能性があり、黄、赤以外で分
類する必要があり、かつ3と4も直接短絡する可
能性があるため青及び緑で分類されている。ま
た、回路パターン5は回路パターン1と直接短絡
する可能性が無いため、回路パターン1と同一の
赤で分類しても良い。
Next, one embodiment of the present invention will be described with reference to FIGS. 3 and 4. Figure 3 is a diagram of the circuit pattern of the printed wiring board shown in Figure 1, with circuit patterns 1 and 2.
...A part of n is classified using four colors, and in the diagram, the diagonal lines represent red, the horizontal lines represent blue, the grid represents green, and the white background represents yellow. Circuit patterns can always be classified using different colors, such as red and blue, or green and blue. For example, circuit patterns 2, 3, 4, 6, 7, and 8 are likely to cause a direct short circuit to circuit pattern 1, which is classified in red, and these are all classified in colors other than red. In the circuit pattern, 2 and 7 have no possibility of being directly short-circuited, so they are classified with the same yellow color, but 2 and 3 and 2 and 4 have the possibility of being directly short-circuited, so they are classified in colors other than yellow and red. 3 and 4 are also classified in blue and green because they need to be classified and there is a possibility that they may be directly shorted. Furthermore, since there is no possibility that circuit pattern 5 will be directly short-circuited with circuit pattern 1, it may be classified using the same red color as circuit pattern 1.

第4図は本発明による絶縁試験回路の一例であ
り、Tは測定回路P1,P2……P12は第1図に示す
プリント配線板上の回路パターンの一部1,2…
…12及び第3図の回路パターン1,2……12
にそれぞれ対応する検出プローブである。回路切
換えスイツチS1,S2,S3,S4の固定接片b1,b2
b3,b4は測定回路Tの端子Aには接続され、固定
接片C1,C2,C3,C4は測定回路Tの端子Bに接
続され、切換え接片d1,d2,d3,d4は常時オープ
ン接片a1,a2,a3,a4に接している。また回路切
換えスイツS1の切換え接片d1は第3図の赤にて分
類される回路パターン群1,5,11に対応する
検出プローブP1,P5,P11に電気的に接続されて
おり、P1,P5,P11は常時短絡された状態にあ
る。同様にして切換え接片d2は黄にて分類される
回路パターン群に対応する検出プローブ群に、d3
は青にて分類される回路パターン群に対応する検
出プローブ群にd4は緑にて分類される回路パター
ン群に対応する検出プローブ群にそれぞれ電気的
に接続されており、同一色にて分類された回路パ
ターン群に対応する検出プローブ群は常時短絡さ
れた状態にある。
FIG. 4 shows an example of an insulation test circuit according to the present invention, and T indicates measurement circuits P 1 , P 2 . . . P 12 indicate portions 1, 2 .
...12 and circuit patterns 1, 2 in Fig. 3...12
These are the detection probes corresponding to each. Fixed contacts b 1 , b 2 of circuit changeover switches S 1 , S 2 , S 3 , S 4 ,
b 3 and b 4 are connected to terminal A of measurement circuit T, fixed contacts C 1 , C 2 , C 3 and C 4 are connected to terminal B of measurement circuit T, and switching contacts d 1 and d 2 are connected to terminal B of measurement circuit T. , d 3 , and d 4 are always in contact with the open contacts a 1 , a 2 , a 3 , and a 4 . Furthermore, the switching contact d 1 of the circuit switching switch S 1 is electrically connected to the detection probes P 1 , P 5 , and P 11 corresponding to the circuit pattern groups 1, 5 , and 11 classified in red in FIG. Therefore, P 1 , P 5 , and P 11 are always shorted. Similarly, switching contact d 2 connects d 3 to the detection probe group corresponding to the circuit pattern group classified in yellow.
is electrically connected to the detection probe group corresponding to the circuit pattern group classified in blue, and d4 is electrically connected to the detection probe group corresponding to the circuit pattern group classified in green, and is classified by the same color. The detection probe groups corresponding to the circuit pattern groups that have been detected are always in a short-circuited state.

以上の構成により、回路パターン間の絶縁検査
を行う場合は第1図のプリント配線板上の回路パ
ターン1,2……12にそれぞれ対応する検出プ
ローブP1,P2……P12を全て接触させ、第3図の
写図上で同一色の回路パターンに対応するプリン
ト配線板上の回路パターンを全て短絡させてそれ
ぞれ1検査端子とし、従来の絶縁試験回路と同様
にして回路切換えスイツチS1,S2,S3,S4を操作
し、4端子中の2端子を順次測定回路Tに接続し
て行けば良い。例えば、回路初換えスイツチS1
切換接片d1を固定接片b1に接触させて赤にて分類
される回路パターン群に対応する検出プローブ群
を全て測定回路Tの端子Aに接続し、次に回路切
換えスイツチS2,S3,S4の切換接片diが固定接片
Ciに接するように順次操作して黄、青、緑で分類
される回路パターン群に対応する検出プローブ群
を全て順次端子Bに接続してAB両端子間の絶縁
状態を検出することにより、赤にて分類された回
路パターンと、青、黄、緑で分数された回路パタ
ーン間のそれぞれの絶縁検査を行うことが出来
る。以下同様にして、4つの回路パターン群の中
から2つの回路パターン群の組合せに関して絶縁
検査を行えば、第3図の写図上で着色された全て
の回路パターンに対応するプリント配線板上の回
路パターンの中で互いに隣接し、かつ直接短絡す
る可能性のある2つの回路パターン間の絶縁検査
を全て実行したことになる。
With the above configuration, when performing an insulation test between circuit patterns, all detection probes P 1 , P 2 ...P 12 corresponding to circuit patterns 1, 2 ... 12 on the printed wiring board in Fig. 1 are contacted. Then, short-circuit all the circuit patterns on the printed wiring board that correspond to the circuit patterns of the same color on the diagram in Figure 3 to form one test terminal, and connect the circuit changeover switch S 1 in the same way as the conventional insulation test circuit. , S 2 , S 3 , and S 4 to connect two of the four terminals to the measuring circuit T in sequence. For example, contact contact piece d 1 of circuit initial switch S 1 with fixed contact piece b 1 and connect all detection probe groups corresponding to circuit pattern groups classified in red to terminal A of measurement circuit T. , then the switching contacts di of circuit changeover switches S 2 , S 3 , and S 4 are fixed contacts.
By sequentially operating the detection probes corresponding to the circuit pattern groups classified as yellow, blue, and green so that they are in contact with terminal B and detecting the insulation state between both terminals A and B, red It is possible to perform insulation tests between circuit patterns classified by , and circuit patterns divided by blue, yellow, and green. Similarly, if the insulation test is performed on the combination of two circuit pattern groups from among the four circuit pattern groups, then the printed wiring board corresponding to all the circuit patterns colored on the map in FIG. This means that all insulation tests have been performed between two circuit patterns that are adjacent to each other and have the possibility of being directly short-circuited.

なお、本実施例では回路切換スイツチを機械的
スイツチとして説明したが、これを半導体スイツ
チで構成しても良いことは勿論である。
In this embodiment, the circuit changeover switch has been described as a mechanical switch, but it goes without saying that it may be constructed as a semiconductor switch.

以上、本発明では絶縁検査の対象とする回路基
板上の独立した回路パターンの数に関係なく、4
つに分類された回路パターン群間の絶縁検査を行
うため、それぞれの回路パターン群を順次測定回
路に接続する回路切換えスイツチの切換え操作は
4C2=6回で良く、従来の絶縁試験法に比較して
試験に要する時間は飛躍的に短縮され、操作も非
常に容易になる。例えば独立した回路パターン数
が200の場合試験に要する時間は4C2/200C2=6/19900 となる。また、従来の絶縁試験法では独立した回
路パターンの数だけ回路切換えスイツチを必要と
したのに比べて、本発明では4個で良く、(半導
体スイツチの場合8個)試験回路を構成する部品
コストは大幅に低減される。さらに回路切換スイ
ツチを半導体スイツチに置き換え、自動的に切換
え操作をするようにした場合は、これらのスイツ
チ群を制御する回路も簡単な構成で済む利点があ
る。
As described above, in the present invention, regardless of the number of independent circuit patterns on a circuit board to be inspected for insulation, four
In order to conduct an insulation test between circuit pattern groups classified as
4 C 2 =6 times is enough, and the time required for the test is dramatically shortened compared to the conventional insulation testing method, and the operation is also extremely easy. For example, when the number of independent circuit patterns is 200, the time required for testing is 4C 2 /200C 2 =6/19900. In addition, compared to the conventional insulation testing method, which required as many circuit changeover switches as the number of independent circuit patterns, the present invention requires only four switches (eight in the case of semiconductor switches), which reduces the cost of parts constituting the test circuit. is significantly reduced. Furthermore, if the circuit changeover switch is replaced with a semiconductor switch and the switching operation is performed automatically, there is an advantage that the circuit for controlling the group of these switches can be of a simple configuration.

なお、以上の説明においては本発明をプリント
配線板の絶縁検査に適用した場合について説明し
たが、プリント配線板以外にも検出プローブを接
触させて検査しうる種々の回路基板、例えば薄膜
厚膜配線板等についても本発明は広く適用出来る
ものである。また本実施例では片面に回路パター
ンがあるプリント配線板の絶縁検査に関して説明
したが、両面に回路パターンがあり、かつスルホ
ールで導通しているプリント配線板の場合でも全
回路パターンを4つのパターン群に分類した時に
互いに直接短絡する可能性のある回路パターン同
士は必ず異なるパターン群に属するようにプリン
ト配線板を設計することが出来、両面プリント配
線板にも本発明の絶縁検査方法を適用できること
は勿論である。
In the above explanation, the present invention was applied to the insulation inspection of printed wiring boards. The present invention can also be widely applied to plates and the like. In addition, in this example, insulation inspection of a printed wiring board with a circuit pattern on one side was explained, but even in the case of a printed wiring board with circuit patterns on both sides and conduction through through holes, all circuit patterns can be divided into four pattern groups. It is possible to design a printed wiring board in such a way that circuit patterns that have the possibility of directly shorting each other when classified as such belong to different pattern groups, and that the insulation testing method of the present invention can also be applied to double-sided printed wiring boards. Of course.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は一般的プリント配線板の回路パターン
例、第2図は従来の絶縁試験回路の構成該略図、
第3図、第4図は本発明の説明図であり、第3図
はプリント配線板の回路パターン写図を4色で分
類したもので斜線は赤、横線は青、白地は黄、格
子は線を表わし、第4図は絶縁試験回路を示す。 図中の符号、50……絶縁基板、1,2,3…
…12:回路パターン、P1,P2……Pn:検出プ
ローブ、S1,S2……Sn:回路切換スイツチ、a1
a2……an:固定接片、b1,b2……bn:固定接片、
C1,C2……Cn:固定接片、d1,d2……dn:切換
接片、T:測定部、A,B:端子。
Figure 1 is an example of a circuit pattern of a general printed wiring board, Figure 2 is a schematic diagram of the configuration of a conventional insulation test circuit,
Figures 3 and 4 are explanatory diagrams of the present invention, and Figure 3 is a circuit pattern map of a printed wiring board classified in four colors: diagonal lines are red, horizontal lines are blue, white backgrounds are yellow, and grids are Figure 4 shows the insulation test circuit. Codes in the figure: 50... Insulating substrate, 1, 2, 3...
...12: Circuit pattern, P 1 , P 2 ... Pn: Detection probe, S 1 , S 2 ... Sn: Circuit changeover switch, a 1 ,
a 2 ... an: Fixed contact piece, b 1 , b 2 ... bn: Fixed contact piece,
C 1 , C 2 ... Cn: Fixed contact piece, d 1 , d 2 ... dn: Switching contact piece, T: Measuring part, A, B: Terminal.

Claims (1)

【特許請求の範囲】 1 回路基板の第1の回路パターンと、該第1の
回路パターンと短絡可能性を有する第2の回路パ
ターンと、該第2の回路パターンと短絡可能性を
有する、前記第1の回路パターンを除いた第3の
回路パターンと、該第3の回路パターンと短絡可
能性を有する、第1および第2の回路パターンを
除いた、第4の回路パターンとの各回路パターン
ごとに短絡させてそれぞれ1検査端子とみなし、
4端子中の2端子間を順次絶縁試験することを特
徴とする回路基板の絶縁検査方法。 2 少くとも4つの回路切換えスイツチと、2端
子間の絶縁状態を検出する測定回路と、回路基板
の被検査回路パターンに対応した数の検出プロー
ブとを有し、短絡可能性のある回路パターンを少
くとも4つの回路パターンに分離した場合に、該
4つの回路パターンに対応する検出プローブが短
絡されていることを特徴とする回路基板の絶縁検
査装置。
[Scope of Claims] 1. A first circuit pattern of a circuit board, a second circuit pattern having a short circuit possibility with the first circuit pattern, and a second circuit pattern having a short circuit possibility with the second circuit pattern. A third circuit pattern excluding the first circuit pattern, and a fourth circuit pattern excluding the first and second circuit patterns that may have a short circuit with the third circuit pattern. Short-circuit each terminal and consider each terminal as one test terminal.
A circuit board insulation testing method characterized by sequentially testing insulation between two of four terminals. 2. It has at least four circuit changeover switches, a measurement circuit that detects the insulation state between two terminals, and a number of detection probes corresponding to the circuit patterns to be tested on the circuit board, and detects circuit patterns that may have a short circuit. 1. An insulation testing device for a circuit board, characterized in that when the circuit board is separated into at least four circuit patterns, detection probes corresponding to the four circuit patterns are short-circuited.
JP14937778A 1978-12-01 1978-12-01 Insulation inspection method for circuit board and its unit Granted JPS5575659A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14937778A JPS5575659A (en) 1978-12-01 1978-12-01 Insulation inspection method for circuit board and its unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14937778A JPS5575659A (en) 1978-12-01 1978-12-01 Insulation inspection method for circuit board and its unit

Publications (2)

Publication Number Publication Date
JPS5575659A JPS5575659A (en) 1980-06-07
JPS638432B2 true JPS638432B2 (en) 1988-02-23

Family

ID=15473795

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14937778A Granted JPS5575659A (en) 1978-12-01 1978-12-01 Insulation inspection method for circuit board and its unit

Country Status (1)

Country Link
JP (1) JPS5575659A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4678989B2 (en) * 2001-06-05 2011-04-27 日置電機株式会社 Short circuit inspection target setting method, circuit board inspection method, and circuit board inspection apparatus
JP4810058B2 (en) * 2003-09-24 2011-11-09 トヨタ自動車株式会社 Multi-pole terminal short detection method and short detection system

Also Published As

Publication number Publication date
JPS5575659A (en) 1980-06-07

Similar Documents

Publication Publication Date Title
US3975680A (en) Non-contact coupling plate for circuit board tester
JPS59168375A (en) Method and device for testing electric connection network
JP4068248B2 (en) Insulation inspection apparatus for substrate and insulation inspection method thereof
US5263240A (en) Method of manufacturing printed wiring boards for motors
US5432460A (en) Apparatus and method for opens and shorts testing of a circuit board
GB2278965A (en) Electrical continuity testing apparatus
JP3163265B2 (en) Inspection apparatus and inspection method for flat cable and multilayer board
JPS638432B2 (en)
JP3784479B2 (en) Circuit board inspection method
JPS62187258A (en) Inspecting method for circuit board
JPS6223827B2 (en)
JPH04315068A (en) Apparatus for inspecting printed circuit board
JPH0511022A (en) Circuit board inspecting device
JPH04355378A (en) Confirmation of contact probe
SU968772A2 (en) Device for testing electric wiring
JPH0142387B2 (en)
JP4369002B2 (en) Circuit board inspection equipment
JPS6033064A (en) Method and device for inspecting pattern of printed wiring board
SU1510112A1 (en) Device for inspective printed circuit-boards
JPS6329261Y2 (en)
JPH0541419A (en) Estimation method of test equipment
JP2591453B2 (en) Burn-in board inspection apparatus and burn-in board inspection method
JPS6122268A (en) Inspecting machine for printed circuit board
KR100311010B1 (en) Method for testing ic
JPH07287042A (en) In-circuit inspection method