JPS644158B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece with an electronic device control function, which is configured to be able to control the operation of an electronic device such as a television or a radio. More specifically, the present invention provides an alarm device such as a buzzer or a speaker, for example, every hour on the hour (N:00:00), or every hour and 30 minutes after the hour (N::0:00 and N:30). The present invention provides an electronic timepiece configured to perform a time signal operation using a voice recognition device and to control the operation of a predetermined electronic device by voice each time via a voice recognition device.

In recent years, with the development of electronic technology, voice-related technologies such as speech synthesis and speech recognition are rapidly developing, and products that apply speech synthesis and speech recognition technologies have begun to be proposed in the field of electronic watches. However, the electronic clocks that have been proposed in the past have been configured to simply notify the current time or alarm setting time by voice output by using voice synthesis technology, or by using voice recognition technology to simply notify the current time or alarm setting time by voice output. Everything involved configuring the time and alarm setting time to be corrected by voice input, and the application of voice-related technology was limited to simply informing and correcting the contents of the time counter and alarm memory. . In other words, regarding the application of audio-related technology to electronic watches that have been proposed in the past, it is possible to replace the display of the current time and alarm setting time using an electro-optical display device with a display using audio output, and to display the current time using external operation switches. Instead of correcting the time or alarm setting time, the correction is done by voice input.

However, compared to time display using electro-optical display devices such as liquid crystal display devices, it is difficult to say that audio output notifications are particularly superior, and similarly, compared to correction operations using external operation switches. The reality is that corrections using voice input are not particularly convenient, and even though they use advanced voice-related technology, electronic watches with the above configuration lack commercial appeal. There is.

For reference, the reason for this is that, whether it is to notify the time or to adjust it, the user of the watch has the intention in advance of wanting to know or adjust the time, and then interacts with the watch. (Specifically, the order of action is to visually check the displayed time or manually correct it), so after having the above intention,
Activating the audio output device again to hear the audio time notification, or activating the audio input device to input the audio corrections is not an easy procedure, and may even become troublesome. The first reason is that there is no such thing. In other words, the reality is that it is easier to immediately look at an electro-optical display device or operate external operation switches when one has the above-mentioned intention. Moreover, if one has to operate the ON switch of the voice output device or voice recognition device at least once in order to activate the device itself, the meaning of taking the trouble to apply voice technology is halved.

Conversely, if you configure the clock so that the voice output device and voice recognition device are always working, so that you can omit the operation of the ON switch, the clock will always notify you of the time by voice. In addition to the risk of the clock becoming noisy or malfunctioning due to the recognition of voices from normal conversations, there is also the disadvantage that power consumption increases significantly due to the constant operation of the audio device. can also be mentioned.

As mentioned above, electronic watches with audio devices that have been proposed in the past do not necessarily have sufficiently improved product appeal compared to applying new and advanced technology related to audio. There is no
Therefore, there is currently a strong need to propose an electronic timepiece with new appeal that would be difficult to realize without applying audio technology.

On the other hand, by adding a voice recognition device to electronic devices such as televisions, radios, tape recorders, stereos, etc., commands related to the operation of the electronic devices can be issued via voice, such as operation ON commands (power-on commands), tuning instructions, etc. It has also been proposed to configure the system so that the frequency, channel, volume, etc. can be input, but even in such cases, it is necessary to always operate the switch to turn on the voice recognition device in advance. It is clear that in a configuration in which commands must be input by voice after the command has been set, the convenience of being able to input the command by voice is also halved.

On the other hand, if the voice recognition device is kept running all the time, there is a risk of malfunction, and the voice recognition device wastes power. This is the same as in the case of a configuration in which a device is added.

An object of the present invention is to provide an electronic timepiece with a novel configuration that is sufficiently attractive compared to conventional timepieces by using audio-related technology, and more specifically, to provide an electronic timepiece with a novel configuration that is sufficiently attractive compared to conventional timepieces. By organically combining a voice recognition device with a predetermined electronic device, when an alarm element for time notification such as a speaker or buzzer is activated, the voice recognition device will also automatically start operating. The present invention aims to realize an electronic timepiece configured so that commands related to the operation of a predetermined electronic device such as a radio or television can be input by voice while the voice recognition device is operating.

Hereinafter, specific examples of the present invention will be described with reference to the drawings.

FIG. 1 is a front view showing a radio-equipped cassette recorder (hereinafter referred to as a radio-cassette) equipped with an electronic clock according to an embodiment of the present invention.

The electronic clock installed in the radio/cassette player of this example has a current time display section 1 as its electro-optical display device.
a, a first liquid crystal display device 1 consisting of a voice recognition operation display section 1c, a buzzer 4 as an alarm element for time signal notification, and a microphone 5 as a voice input device. The buzzer 4 can also be used as a speaker 6 for sound output of the radio section and the cassette recorder section, and the microphone 5 can also be used as a microphone for sound input of the cassette recorder section. It is something that exists.

Further, the second liquid crystal display device 2 and the third liquid crystal display device 3 are provided to display the tuning frequency and volume (volume of the speaker 6) level of the radio section, respectively. Further, _S1 is a switch for controlling ON/OFF of the power of the radio section, and _S2 is a switch for switching the volume level of the radio section.

Note that a description of other external operating members such as switches provided for controlling the radio section and the cassette recorder section will be omitted.

Next, FIG. 2 is a block diagram schematically showing a system of an electronic timepiece according to an embodiment of the present invention, in which 7 is a crystal oscillation circuit, 8 is a frequency dividing circuit, and the frequency dividing circuit generates a frequency of 1 Hz. The frequency-divided signal is inputted to a time counter 9, which constitutes a counting means and is composed of second, minute, and hour counters, and counts the time signal. Further, the output side of the time counter 9 is connected to the input side of a time signal operation time detection circuit 11 provided as a time signal operation time detection means for detecting that the time counter 9 has reached a predetermined value. .

The time signal time detection signal J output from the time signal operation time detection circuit 11 as a time signal operation control signal every 30 minutes, for example, is configured to be input to a voice recognition operation control circuit 13 which is a voice recognition operation control means. There is. Further, the aforementioned buzzer 4 is connected to the voice recognition operation control circuit 13 via a buzzer drive circuit 14, and a voice recognition block 15, which is a voice recognition means, is also connected.

The output of the time counter 9 and a part of the output of the voice recognition operation control circuit 13 are also input to a decoder/driver circuit 12 to drive the first liquid crystal display device 1 described above. There is.

The 1 Hz output signal of the frequency dividing circuit 8 is also supplied to the voice recognition operation control circuit 13 as a clock signal.

On the other hand, the voice recognition block 15 is also connected to the microphone 5 and the radio unit 16, and the radio unit 16 drives the speaker 6 and the decoder/driver circuit 1.
7 to drive the second liquid crystal display device 2 and the third liquid crystal display device 3.

In the block diagram shown in FIG. 2, illustration of the constituent elements of the cassette recorder section is omitted.

Next, FIG. 3 shows the voice recognition operation control circuit 13.
2 is a circuit diagram showing the configuration of the time signal operation time detection circuit 11, in which the time signal time detection signal J from the time signal operation time detection circuit 11 is input to a logical differentiation circuit 18.

The output side of the differentiating circuit 18 is connected to the set terminal S of a flip-flop circuit (hereinafter abbreviated as FF) 19 and the operation control terminal 15a of the aforementioned voice recognition block 15, and the Q output terminal of the FF 19 is The input side of the INH circuit 20, the input side of the inverter 21, and the AND circuits 22, 23
are connected to one input side of each as shown in the figure. Further, the other input side of the AND circuits 22 and 23 is configured to receive a 1 Hz signal from the frequency dividing circuit 8, and the
The output sides of AND circuits 22 and 23 are connected to timer circuits 24 and 25, respectively.

Further, the output side T ₁ of the timer circuit 24 is connected to the INH terminal of the INH circuit 20 and one input side of the EX-OR circuit 27, and the output side T ₂ of the timer circuit 25 is connected to the INH terminal of the INH circuit 20 and one input side of the EX-OR circuit 27. circuit 27
It is connected to the other input side of the FF 19 and the reset terminal R of the FF 19. Furthermore, the EX-
The output side of the OR circuit 27 is the voice recognition block 15.
It is connected to the operation control terminal 15b of the voice recognition operation display section 1C, and is also connected to the decoder/driver circuit 12 described above, so as to control the display state of the voice recognition operation display section 1C.

Note that the output side of the inverter 21 is connected to the reset terminal R of the timer circuit 24 and the OR circuit 2.
The output side of the OR circuit 26 is connected to the reset terminal R of the timer circuit 25.

The other input side of the OR circuit 26 is configured to receive the voice recognition operation time extension command signal A from the voice recognition block 15, while the output side of the INH circuit 20 is connected to the INH circuit 20.
It is connected to the INH terminal of circuit 28. Further, the input side of the INH circuit 28 is connected to the Q output terminal of an FF 62 for ON/OFF control of the radio section 16, which will be described later, and the output side of the INH circuit 28 is connected to the input side of the INH circuit 28.
It is connected to the buzzer 4 via a buzzer drive circuit 14.

Next, FIG. 4 is a block diagram schematically showing an example of the system configuration of the above-mentioned voice recognition block 15. 35. The audio analog signal amplified by the preamplifier 35 is input to an audio feature parameter extraction circuit 36, and the extraction circuit 36 is configured to detect audio spectrum envelope information, audio level, etc. There is. That is, since the audio spectrum is stationary for about 20 mS, the analog multiplexer in the extraction circuit 36 samples the audio analog signal at intervals of about 20 mS, and extracts waveform envelope information (spectral envelope information) from the audio spectrum. ) is detected. In this case, an audio spectrum extraction circuit is provided within the audio feature parameter extraction circuit 36 in order to detect the waveform envelope information.

In other words, the audio information required for speech recognition generally corresponds to a range of about 200Hz to 7KHz, so in the audio spectrum extraction circuit, the range of 200Hz to 7KHz is extracted by a bandpass filter. Divide into 5 to 20 types of bands,
The waveform envelope information is detected by generating a voltage proportional to the output of each band.

Furthermore, the audio level detection circuit provided in the extraction circuit 36 detects the level of the audio analog signal, and when this detected value reaches a certain level or higher, an analog switch in the A/D converter 37 (described later) is activated. The CPU 42, which will be described later, is notified of the presence of voice input via the interface 38 and starts a voice recognition program. On the other hand, the output signal of the waveform envelope information from the audio spectrum extraction circuit is input to the A/D converter 37 via the analog multiplexer in the audio feature parameter extraction circuit 36, where it is converted into an 8-bit digital code signal. is converted to Further, the digital code signal is input to the CPU 42 via the interface 38. The CPU is composed of, for example, a 16-bit logic operation unit, and executes a speech recognition program temporarily stored in the control unit 43 to read and process the voice information converted into the digital code signal described above, and performs the necessary processing. The system is configured to perform standard pattern registration, final judgment of voice recognition processing, etc.

Further, the control unit 43 reads a voice recognition program written in a PROM in an interface processor (hereinafter abbreviated as IFP) 41, which will be described later, through the CPU 42 and temporarily stores the voice recognition program. It functions to control the CPU 42 to perform arithmetic processing according to the following.

In this case, the timing at which the voice recognition program is read from the IFP 41 to the control unit 43 is at the moment when the above-mentioned differentiating circuit 18 outputs a pulse signal, that is, when the time signal time detection signal J is output from the time signal operation time detection circuit 11 to the differentiating circuit 18.
It is controlled so that it starts the moment it is input to 8. That is, the reason why the output side of the differentiation circuit 18 is connected to the operation control terminal 15a of the speech recognition block 15 is to control the timing of reading the above-mentioned speech recognition program.

On the other hand, the standard pattern memory unit (hereinafter referred to as
The SPM (abbreviated as SPM) 40 is composed of a RAM, and stores a standard pattern of voice characteristics necessary for recognizing a voice command input when controlling an alarm operation as described later. An input pattern memory unit (hereinafter abbreviated as IPM) 39 is a working memory that stores voice information, recognized word names, etc. taken into the CPU 42. Furthermore, the above-mentioned IFP41 is, for example, 8
It consists of a bit microprocessor and has functions such as providing an interface between the voice recognition block 15 and the outside (clock circuit system other than the voice recognition block).

That is, the IFP 41 is, for example, an interface circuit for signals input to the voice recognition block 15 from the outside, an interface circuit with the CPU 42, a control program for controlling the overall operation of the voice recognition block 15, and a recognition output. A ROM that stores application programs, etc. for outputting in a predetermined code, and an interface circuit that outputs appropriate radio unit control signals, etc. to the outside based on the content of the finally recognized voice input command. , etc.

Note that during voice recognition operation, the CPU 42 samples the digital code signal of voice information inputted via the interface 38 at intervals of approximately 20 mS, and when a voice analog signal of a certain level or higher is detected, the signal is sampled. is captured and stored in the IPM 39. On the other hand, the SPM4
0, the voice features necessary for voice recognition are stored as standard patterns, and the standard pattern is used as a comparison standard to compare the digital code signal of input voice information, that is, the input pattern. The input voice information is recognized by comparing it with the standard pattern. As a specific recognition method in this case, for example, the distance between the input pattern and the standard pattern is determined, the one with the smallest distance is selected, and it is determined whether the recognition condition is satisfied.
If it is satisfied, processing is executed to output an output according to the recognized result.

Note that when determining the above-mentioned distance, it is determined by determining the difference between each data of the input pattern and the standard pattern, and calculating the sum of the absolute values.
Further, the process of outputting a signal for controlling the operation of the radio unit 16 to the outside of the voice recognition block 15 according to the result of recognizing the content of the command by voice input is performed by:
This is executed via the IFP 41 mentioned above.

Next, FIG. 5 is a block diagram schematically showing the configuration of the radio section 16 mentioned above. In FIG. 5, 50 is an antenna, 51 is a high frequency amplifier, 52 is a mixer, 53 is an intermediate frequency amplifier, 54 is a detector, 5
5 is a low frequency amplifier, 56 is a local oscillator, and the low frequency amplifier 55 is connected to the speaker 6, and when the radio section 16 is in operation, the speaker 6 is
is configured to drive.

That is, a radio signal received by antenna 50 is first amplified by high frequency amplifier 51, then mixed with the output from local oscillator 56 by mixer 52, and converted into an intermediate frequency signal. Further, the intermediate frequency signal is amplified by an intermediate frequency amplifier 53, and then detected by a detector 54 at the next stage and converted into a low frequency signal in an audible frequency band.
The low frequency signal is further amplified by a low frequency amplifier 55 to drive the speaker 6, and the above is exactly the same as in the case of a well-known superheterodyne radio receiver. On the other hand, the microcomputer section (hereinafter referred to as
(abbreviated as MC) 57 switches the receiving band or receiving frequency in accordance with the tuning signal from the tuning switch 58 or preset tuning circuit 59 or the tuning command signal from the voice recognition block 15. It is provided to supply received frequency data to the decoder/driver circuit 17 described above, and switches the oscillation frequency of the local oscillator 56, which is configured by, for example, a PLL circuit, in accordance with the received frequency. , control, etc. Note that 60 is an external operation switch for controlling the preset channel selection circuit 59 from the outside.

On the other hand, the above-mentioned switch _S1 is connected to the logic differentiator circuit 61.
It is connected to the toggle terminal T of FF62 via
MOS transistor (hereinafter referred to as N-type FET) 6
3 and the input side of the INH circuit 28 of the voice recognition operation control circuit 13 described above.
Further, the switch _S2 is connected to a shift register 65 for volume level control via a logic differentiator circuit 64, and the output side of each stage of the shift register 65 is connected to the decoder/driver circuit 17. The third liquid product display device 3 is configured to display the volume level. Furthermore, the output sides of the second and third stages of the shift register 65 are also connected to the gate sides of N-type FETs 66 and 67, respectively.
67 and the volume control resistors R ₁ and R ₂ are connected to each other as shown.

Here, the FF 62 is the power source for the radio section 16.
It is provided to control ON-OFF, and once the switch _S1 is closed, a toggle operation is performed. That is, when the FF 62 is in the set state, the N-type FET 63 is in the set state.
The power supply potential V _DD is supplied to the high frequency amplifier 51 to the detector 54 etc., and the radio section 1 is turned on.
6 is in operation ON state.

Further, when the FF 62 is in the reset state, the N-type FET 63 is in the OFF state and the power supply is cut off, so that the radio unit 16 is in the operational OFF state. On the other hand, the shift register 65 for volume level control is constructed so that its contents are shifted one step each time the switch _S2 is closed. As a result, when the above-mentioned FF 62 is in the set state and the N-type FET 63 is in the ON state, in other words, when the radio unit 16 is in the operating ON state, the volume level is switched according to the contents of the shift register 65. It will be done. That is, the contents of the shift register 65 are
When in the state of 1|0|0 as shown in the figure,
Since both of the N-type FETs 66 and 67 are in the OFF state, the power supply potential V _DD is lower than that of the resistors R ₁ and R _{2 .}
Power is supplied to the low frequency amplifier 55 while the voltage is stepped down by , and the volume level is controlled to be the lowest. In this state, the third liquid crystal display device 3 displays “Vol.1”.
will be displayed. Furthermore, when the switch _S2 is once closed from the above state, the contents of the shift register 65 are shifted to the state of 0|1|0, and 67 of the N-type FETs 66 and 67 are in the ON state, and 66 is in the OFF state. will be controlled by.
As a result, the power supply is connected to the resistor _R1 and the N type which is in the ON state.
Since the low frequency amplifier 55 is supplied to the low frequency amplifier 55 via the FET 67, that is, the power supply potential V _DD is stepped down only by the resistor R ₁ , the volume level is switched to an intermediate level. Further, in this state, as shown in FIG. 1, the third liquid crystal display device 3 displays "Vol.2".
will be displayed. Further, when the switch _S2 is closed again from the above state, the contents of the shift register 65 become 0|0|1, and 66 of the N-type FETs 66 and 67 are turned on. As a result, the power supply is turned on.
Through the FET, that is, the power supply potential V _DD is connected to the resistor R ₁ ,
The signal is supplied to the low frequency amplifier 55 without being stepped down by any of _R2 , and the volume level is controlled to be the maximum level. Further, in this state, "Vol. 3" is displayed on the third liquid crystal display device 3. Furthermore, from the above state, switch again.
When _S2 is closed, the contents of the shift register 65 will return to the state of 1|0|0.

Note that the radio unit operation ON command signal B output from the IFP 41 of the aforementioned voice recognition block 15, which is the electronic equipment operation control means, is sent to the set terminal S of the FF 62, and the volume level designation signal C is sent to the shift register 65. Reception frequency designation signal D
are configured to be input to the MC 57, respectively.

Here, the operation when a predetermined time signal time to perform the time signal notification operation is reached will be described.

Note that all of the circuits described above operate with positive logic, and when simply written as [H], it means that they are at the logical [H] level, and when written as [L], it means that they are at the logical [L] level. Each level shall be indicated.

Furthermore, in FIG. 2 described above, illustrations of external operating members and circuit components for correcting the current time, that is, correcting the contents of the time counter 9 are omitted; Since it may be exactly the same as in the case of a watch, a detailed explanation thereof will also be omitted.

By the way, in the electronic timepiece of this embodiment, the time signal operation time detection circuit 11 is configured to generate the time signal time detection signal J one minute earlier on the hour and 30 minutes after the hour. Therefore, when the content of the time counter 9 reaches, for example, 10:59 (one minute before 11:00) or 10:29, the time signal operation time detection circuit 11 outputs the time signal time detection signal J. be.

First, when the hourly time detection signal J is output as described above, the detection signal J is input to the differentiation circuit 18 that constitutes the voice recognition operation control circuit 13.

As a result, one pulse signal formed by the differentiating circuit 18 is applied to the set terminal S of the FF 19 and the operation control terminal 15a of the voice recognition block 15 described above.
is input, the FF19 becomes set state,
At the same time that the AND circuits 22 and 23 turn on, the voice recognition block 15 outputs the IFP.
Reading of the speech recognition program from 41 to control unit 43 is started.

On the other hand, the timer circuits 24 and 25 constituting the voice recognition operation control circuit 13 are provided to control the operation timing and operation duration of the buzzer 4 and the voice recognition block 15 provided as alarm elements, and are provided as described above. When the FF 19 enters the set state and the output side of the inverter 21 becomes [L], the timer circuits 24 and 25 are released from the reset state and the ON state is
Counting of the 1 Hz signal inputted from the frequency dividing circuit 8 via the circuits 22 and 23 is started.

Here, the timer circuits 24 and 25 respectively count a predetermined number of signals (that is, after predetermined times t ₁ and t ₂ respectively), the output sides T ₁ and T ₂ become [H]. In this example, each of the timer circuits 2
4 and 25 are configured such that t ₁ <t ₂ .

That is, as an example, the configuration may be such that t ₁ =10 seconds and t ₂ =120 seconds (2 minutes).
Therefore, as described above, timer circuits 24 and 2
5 starts the counting operation of the 1Hz signal, the output side _T1 of the timer circuit 24 becomes [H] when _t1 hour elapses, and then the output side of the timer circuit 25 becomes [H] when _t2 time elapses. The output side of each timer circuit 24, 25 is set to [H] in sequence over a predetermined period of time so that the side _T2 becomes [H].
It will become familiar.

By the way, after the FF 19 is in the set state, that is, each of the timer circuits 24 and 2
5 starts the counting operation, the output sides T ₁ and T ₂ are both in the [L] state until time t ₁ has elapsed, and therefore the output side of the EX-OR circuit 27 is [L]. L].

On the other hand, since the FF 19 is in the set state, the output side of the INH circuit 20 is [H], and if the FF 62, which will be described later, is not in the set state, that is, the radio section 16 is in the operating ON state. When it is not used, the INH circuit 28 mentioned above
The output side also becomes [H], and as a result, the buzzer 4 is driven by the buzzer drive circuit 14, and an alarm sound is generated to notify that the hour is approaching or 30 minutes past the hour. That will happen. Next, after t ₁ time has passed, the output side T ₁ becomes [H]
Then, the output side of the EX-OR circuit ₂₇ becomes [H] until a further time _t2 elapses and the output side T2 also becomes [H].

As a result, even though the FF 19 is still in the set state, the output side of the INH circuit 20 becomes [L], the output side of the INH circuit 28 also becomes [L], and the generation of the alarm sound is interrupted.

Furthermore, when the operation control terminal 15b of the voice recognition block 15 detects that the output side of the EX-OR 27 becomes [H],
Preamplifier 3 configuring speech recognition block 15
5. The voice feature parameter extraction circuit 36, the A/D converter 37, the interface 38, etc. are controlled to be powered on and the entire system of the block 15 starts operating, and during this time the microphone 5 is turned on. When a voice radio unit operation control command is input through the radio unit 16, processing for controlling the operation of the radio unit 16 is executed as described below.

Here, in the watch of this example, types of operation control of the radio section 16 that can be processed through commands by voice input are listed below.
This includes control of ON/OFF (power on) of the operation in step 6, specification of volume level, specification of reception frequency (or channel), etc.

First of all, a voice command, for example "Switch on the radio", is input to the voice recognition block 15 via the microphone 5, and
If the meaning of the command is correctly recognized by comparison with the characteristic information of the voice "Switch on the radio" stored as a standard pattern in the SPU 40, the IFP 41 constituting the voice recognition block 15 , radio unit operation ON command signal B
One pulse signal is output as FF
It will be input to the set terminal S of 62.

As a result, the FF62 is forced into the set state, and the N-type FET63 is turned on.
The radio power supply V _DD is supplied to the radio function blocks such as the high frequency amplifier 51 to the detector 54 through the FET 63, and the radio section 16 is controlled to be in an ON state.

Next, for example, "Volume 1", "Volume
Predetermined words for specifying the volume level, such as "ni", "volume san", etc., are input as voice into the microphone 5,
If the command is recognized by the voice recognition block 15, the IFP
C ₁ of the volume level designation signal C from 41,
Either C ₂ or C ₃ will be output. That is, the designation signal C is input to the shift register 65, but in this case, the designation signal C is input to the shift register 65.
When C ₁ is input, the shift register 65 is forcibly controlled to the state of 1|0|0, when C ₂ is input, 0|1|0, and when C ₃ is input, it is forcibly controlled to the state of 0|0|1. As a result, the volume level can be changed to the aforementioned low, medium,
The third liquid crystal display device 3 will display one of "Vol. 1, Vol. 2, and Vol. 3".

Further, when the receiving frequency is specified by voice and the specified content is recognized by the voice recognition block 15, the receiving frequency specifying signal D output from the IFP 41 is input to the MC 57, and as a result, The receiving frequency will be switched according to the above specification.

On the other hand, while the voice recognition block 15 is operating as described above, the voice is input to the microphone 5, and the voice level detection circuit in the voice characteristic parameter circuit 36 described above
If it is detected that the input audio has reached a certain level, the IFP41
The voice recognition operation time extension command signal A is generated, and the OR circuit 2 of the voice recognition operation control circuit 13 is output.
6, and as a result, the timer circuit 25 is reset.

Further, as mentioned above, if the above-mentioned time t ₂ elapses without a new input of the operation time extension command signal A, the output side T ₂ of the timer circuit 25
also becomes [H], and as a result, both T ₁ and T ₂ become [H], so the output side of the EX-OR circuit 27 becomes [L], and the voice recognition block 15
operation is stopped.

In addition, when the above output side T ₂ becomes [H],
The FF 19 also returns to the reset state, and as a result, the output side of the inverter 21 becomes [H] and the timer circuits 24 and 25 are also held in the reset state. It will return to its normal state before it was formed. In other words, in this example, when it is detected that there is a voice input of a certain level or higher, the operation time of the voice recognition block 15 is automatically extended.
This prevents the voice recognition operation from suddenly being interrupted while the user is inputting instructions regarding the operation by voice.

Furthermore, if no new voice input of a certain level or higher is detected for a time period of _t2 hours, the operation of the voice recognition block 15 is automatically terminated, so that the voice recognition block 15 continues to operate indefinitely. Continuation of the operation is also prevented.

Note that the output side of the EX-OR circuit 27 mentioned above is [H]
While the voice recognition block 15 continues the voice recognition operation, the voice recognition operation display section 1c is in a blinking state (flashing state) to visually indicate that voice input is possible. It will be clearly stated.

On the other hand, when the time signal time detection signal J is generated by the time signal operation time detection circuit 11, the FF6 has already been generated.
2 is in the set state, and the radio section 16 is in operation.
When it is in the ON state, even if the output side of the INH circuit 20 becomes [H] in the voice recognition operation control circuit 13, the output side of the INH circuit 28 remains [L]. The buzzer 4, which is an alarm element, will not be driven. This is to prevent the buzzer sound from being generated and interrupting the user's listening to the radio while the user is listening to the radio.In this embodiment, the voice recognition block is also used in this case. 15 is
When the radio unit 16 is not in the ON state (FF6
2 is in the reset state), it is configured to be able to perform voice recognition operations. Therefore, in this case as well, it is possible to change the receiving frequency by voice input, and while the voice recognition block 15 continues to operate, the voice recognition operation display section 1c
will be blinking to clearly indicate that voice input is possible.

Therefore, according to the present invention, as the predetermined time approaches or reaches a predetermined time such as on the hour or 30 minutes after the hour, a time signal notification operation is performed using sound such as a buzzer sound or melody sound, or voice. By doing this, once the user's attention has been attracted, the operation of a predetermined electronic device such as a television or radio can be controlled by voice commands from the user. It will be very easy to operate the electronic device in this configuration.

In other words, the television and radio programs mentioned above are generally organized so that one program changes to another on the hour or 30 minutes after the hour. In addition to notifying the user of the proximity and arrival at 1:30 p.m., electronic equipment such as radios and televisions will be sent to the By configuring the system so that it can be commanded by voice input so that it can operate freely, flexibly, quickly, and in a desired manner, it is well adapted to the temporal characteristics of radio and television programming. Products that can provide a progressively new sense of use will be realized, and the range of functions that watches can perform will be significantly expanded.

In addition, by configuring the voice recognition device to control at least part of its operation in a form that is correlated with the signal for controlling the time signal operation, the voice recognition device can be continuously driven, thereby reducing power consumption. It is also possible to prevent wastage and erroneous reactions of the speech recognition device to unintentional speech input. That is, in the present invention, the operation of the voice recognition means is automatically started when the alarm element is activated, and after the time required for voice recognition has elapsed,
Since the system is configured to automatically stop the operation of the voice recognition means, it is possible to automatically control the voice recognition means to be in operation only when necessary, without requiring any manual switch operations. .

In the above-mentioned embodiment, the buzzer 4 is configured to generate an alarm sound when the time signal reaches the time, but by providing a voice synthesizer or the like, it is possible to notify the arrival of the predetermined time by sound. It is also possible to configure it to notify. In that case, for example, a signal for outputting a sound such as "It's almost 10 o'clock." may be synthesized and a speaker provided as an alarm element may be driven. In addition, in the above-mentioned embodiment, the time signal operation is performed one minute earlier than the hour or half past the hour, but this is because the program starts on the hour or half past the hour. This is designed to allow the desired control to be completed before the start of the process. In this sense, on the hour or on the hour
Although it is preferable to perform the notification operation about 10 seconds to 3 minutes before the 30 minutes, the notification operation may be performed at the hour or just 30 minutes before the hour.

On the other hand, in the above-mentioned embodiment, the voice recognition block 1 after the time for performing the time signal notification operation has arrived.
5 is configured such that the progress of the operation is regulated by an output signal etc. from a voice recognition operation control circuit 13 consisting of a timer circuit, etc. teeth,
It is also possible to configure the processing to be performed by ROM. In that case, the progress program etc. is stored in the ROM in advance, and the ROM is programmed according to the contents of the counter synchronized with the clock signal.
It is conceivable to sequentially shift the address designations within the ROM and execute the instruction content stored in the corresponding ROM address each time. That is, it is also possible to adopt a so-called microcomputer format for all operations related to basic timekeeping operations and time alarm operations as a watch.

Furthermore, in the embodiment described above, all the drives of the voice recognition block are directly controlled by the time signal time detection signal J that is output when the current time value in the time counter 9 matches a predetermined value. For example, a preamplifier or the like is configured so that its operation is controlled indirectly from a time signal time detection signal through the output of a timer circuit or the like.

However, in addition to this embodiment, it is also possible to configure so that driving, arithmetic processing, etc. of all or most of the speech recognition blocks are directly started by the time signal time detection signal.

In the above embodiment, the time signal time detection signal is configured to control both the operation of the alarm element and the operation of the voice recognition block. It is also possible to form the operation control signals separately (i.e. separately at appropriate time intervals from each other).

In addition, when controlling the operation of a television using the electronic clock of the present invention, including voice input means such as a microphone, a buzzer for an alarm element, etc.
It is also possible to configure the electronic timepiece as a remote control unit. In that case, at the predetermined hourly notification time, the voice input unit and transmitter start operating, and the operation control signal from the electronic clock unit to the voice recognition block and the input voice are transmitted to radio waves, etc. A conceivable configuration is to convert the data and then transmit it to a receiving section provided in a part of the television main body. Furthermore, it is also possible to add means for selecting a time period for performing a time signal notification operation or a voice recognition block operation.
In other words, in the middle of the night or when the user is absent, the above operations may disturb sleep or be completely useless, so the above operations are performed only at the user's desired time and at the desired time. It is also possible to consider it as follows.

[Brief explanation of the drawing]

1 to 5 show one embodiment of the present invention. FIG. 1 is a front view showing a cassette recorder with radio equipped with an electronic clock according to one embodiment of the present invention, and FIG. , a block diagram schematically showing the system of the electronic timepiece shown in FIG. 1, and FIG. 3 a circuit diagram showing the configuration of the voice recognition operation control circuit shown in FIG. 2. FIG. 4 is a block diagram schematically showing an example of the system configuration of the voice recognition block in FIG. 3, and FIG. 5 is a block diagram schematically showing the configuration of the radio unit in FIG. 4. 1...First liquid crystal display device, 1a...Current time display section, 1c...Voice recognition operation display section, 2...Second
Liquid crystal display device, 3...Third liquid crystal display device, 4...
Buzzer, 5... Microphone, 6... Speaker, 7... Crystal oscillation circuit, 8... Frequency division circuit, 9...
...Time counter, 11...Time signal operation time detection circuit, 12, 17...Decoder/driver circuit,
13... Voice recognition operation control circuit, 14... Buzzer drive circuit, 15... Voice recognition block, 15a,
15b...Operation control terminal, 16...Radio section, 2
4, 25...Timer circuit, 35...Preamplifier, 36...Audio feature parameter extraction circuit, 37
...A/D converter, 38...Interface,
39...Input pattern memory unit (IPM), 40...Standard pattern memory unit (SPM), 41...Interface processor (IFP), 42...CPU, 43...Control unit, 51...High frequency amplifier , 52...
Mixer, 53... Intermediate frequency amplifier, 54... Detector, 55... Low frequency amplifier, 56... Local oscillator, 57... Microcomputer section (MC),
62...Flip-flop circuit for radio section ON-OFF control, 65...Shift register for volume level control, J...Time signal time detection signal, _S1 ...Switch for radio section ON-OFF control, _S2 ...Volume control switch, A...Voice recognition operation time extension command signal, B...Radio section operation ON command signal, C...
...Volume level designation signal, D...Reception frequency designation signal.

Claims (1)

[Claims] 1. A clock means for counting time, a time signal operation time detection means for forming at least one type of time signal operation control signal according to the contents of the time measurement means, and an alarm that performs a time signal operation in response to the time signal operation control signal. an audio input device such as a microphone, a voice recognition means for recognizing voice input from the voice input device, and a start of a voice recognition operation of the voice recognition means in conjunction with the time signal operation control signal. a voice recognition operation control means for controlling the operation of a predetermined electronic device such as a television or a radio; An electronic timepiece with an electronic device control function, characterized in that it is provided with an electronic device operation control means for controlling the operation of the device.