JPS644265B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a PCM recording and reproducing device.

Generally, in digital signal recording and reproducing apparatuses including fixed head type PCM recorders, various modulation methods as shown in FIGS. 1A to 1F are widely used for recording signals on recording media. A indicates the NRZ system, and the numbers "0" and "1" at the bottom indicate digital input signals. B is the NRZI method (T _nio = T, T _nax = ∞), C is the PE method (T _nio =
0.5T, T _nax = T), D is MFM method (T _nio = T,
T _nax = 2T), E is GCR method (T _nio = 0.8T, T _nax
= 2.4T), F is 3PM method (T _nio = 1.5T, T _nax =
6T) are shown respectively. All of these provide information on the pulse inversion interval, and are considered to be a type of pulse width modulation.

When using these modulation methods, since the pulse reversal interval carries information, there is no particular problem if the recording medium such as a magnetic tape is running at a steady speed during recording, but when recording → stopping → recording, there is no problem. When intermittent recording is performed, the running speed changes due to the rising and falling of the running system before and after the discontinuous recording point, and the recording wavelength changes, so the regularity of the pulse inversion interval is greatly disturbed. If this is played back continuously as it is, unexpected error data will be demodulated before and after the discontinuous recording point, especially when performing real-time processing.
With PCM recorders, etc., errors may occur that exceed the correction ability.
There is even a possibility that it will make strange noises.

In conventional PCM recording/playback devices, in order to avoid the above-mentioned problems, either continuous recording is performed so as not to create discontinuous recording portions during recording, or the error detection ability of the device during recording/playback is improved (i.e., the circuit In either case, the recording/playback device There were problems in terms of operability and cost.

Therefore, an object of the present invention is to provide a PCM recording and reproducing apparatus that can inexpensively prevent the generation of abnormal noise without reducing operability.

An embodiment of this invention is shown in FIGS. 2 to 4. In Figure 2, 1a, 1b,..., 1n are n
Channel analog signal input terminal, 2a, 2
b,..., 2n are A/D converters, 3 is a digital signal processing unit including time axis conversion and error correction code addition, 4a and 4b are generation circuits for synchronization signals A and B, respectively, and 5 is a synchronization signal switch. circuit, 6
are the operation switch group, 6a is the fast forward switch (FF), 6b is the rewind switch (REW), 6c is the playback switch (PLAY), 6d is the record switch (REC), 6e is the stop switch (STOP), and 6f is the temporary switch. Stop switch (PAUSE), 6g is a recording and muting switch (REC MUTE), 7 is a switch control circuit, 8 is a delay circuit, 9 is a synchronization signal addition circuit, 10 is a recording circuit including an electromagnetic converter system, 1
1 is a recording medium including a magnetic tape, 12 is a reproduction/demodulation circuit including an electromagnetic transducer system, 13a and 13b are synchronization signal extraction circuits for extracting synchronization signals A and B, respectively, 14 is a mutating signal generation circuit, 15 is a digital signal processing unit including time axis conversion and error correction, 16 is a D flip-flop, 17a, 17b, ..., 17n are D/A converters, and 18a, 18b, ..., 18n are analog signal outputs, respectively. It is a terminal.

Next, a concrete circuit of the operation switch group 6, switch control circuit 7, and delay circuit 8 is shown in FIG.
Their operations will be explained with reference to FIG. The switch control circuit 7 consists of NAND gates 19-28 and AND gates 29-32 forming five flip-flops. In addition, the delay circuit 8
consists of monostable multivibrators 33 and 34 having time constants T ₁ and T ₂ respectively, an OR gate 35 and an AND gate 36.

Figure 5A shows the playback switch 6c and the stop switch 6.
Fig. 5B shows the operation of the monostable multivibrator 33 operated at the falling edge of Fig. 5A, and Fig. 5C shows the operation of the monostable multivibrator 33 operated at the rising edge of Fig. 5A. The operation of the multivibrator 34 is shown. Figure 5 D is or gate 3
5 shows the control signal of the driving system which is a combination of FIG. 5A and FIG. 5B. FIG. 5E shows a recording muting (REC MUTE) signal for instructing muting of any part during recording, which is given by the recording muting switch 6g. FIG. 5F shows the switching command of the synchronization signal output from the AND gate 36, in which the regular synchronization signal A changes in the "H" section.
A synchronization signal B instructing muting is recorded in the "L" section. That is, when stopping the running during recording, when the stop switch 6e or the pause switch 6f is turned on, the synchronizing signal is switched from A to B and recorded, and the running system is stopped after time _T1 . When recording is to be started again, the travel system is activated at the same time as the playback switch 6c is turned on, and the synchronizing signal is switched from B to A after a time _T2 .
In this case, the time T ₁ is a period of time that allows the synchronization signal B to be sufficiently detected without error during playback and does not cause any unnatural operation, and is approximately 10 to 10 minutes depending on the recording format.
The time _T2 may be set to about 1 to 2 seconds, which is the time required for the running system to start up, to about 100 msec. Also,
If you want to mute any part during recording, by turning on the recording muting switch 6g, you can switch the synchronization signal from A to B for an arbitrary period of time _T3 while keeping the vehicle running.

In addition, when recording, press the record switch 6d together with the playback switch 6c to open the NAND gates 25 and 26.
It is necessary to send a recording command to the recording circuit 10 via the recording circuit 10. Also, if the fast forward switch 6a is pressed, a fast forward command is issued via the NAND gates 19 and 20.
Similarly, when the rewind switch 6b is pressed, a rewind command is issued via the NAND gates 21 and 22.

Next, specific circuits of the synchronizing signal extracting circuits 13a, 13b and the muting signal generating circuit 14 are shown in FIG. 4, and their operations will be explained with reference to FIG. 6. In Figure 4, 37 and 3
8 are obtained from the reproducing/demodulating circuit 12, respectively.
PCM signal data and reproduction clock input terminals, 39 and 40 are shift registers for serial-parallel conversion, 41 and 42 are digital comparators, respectively, 43 and 44 are synchronization signal setting switches, and 45 and 46 are synchronization signals, respectively. 47 is a bistable multivibrator, 48 is a monostable multivibrator with a time constant τ, and 49 is an AND gate.

Shift registers 39, 40 for serial-parallel conversion
The data of the PCM signal applied to the clock is sequentially shifted by the regenerated clock. This shift register 3
The parallel outputs of 9 and 40 are synchronized signal setting switch 4.
The data of the synchronization signals A and B set in steps 3 and 44 are compared by digital comparators 41 and 42, respectively.
When these match, the digital comparator 41,
Synchronizing signals A and B are output from 42, respectively.
However, the synchronization signal setting switch 4 is
There is a high possibility that data matching the data of the synchronization signals A and B set by 3 and 44 will appear. A positive synchronization signal extraction circuit 4 extracts such an erroneous synchronization signal.
5 and 46 to extract the correct synchronization signal. That is, the positive synchronization signal extraction circuits 45, 4
6 passes the correct synchronizing signal among the synchronizing signals A and B output from the digital comparators 41 and 42 every time a fixed number of reproduced clocks are counted, and cuts off the erroneous synchronizing signal during counting.

FIG. 6A shows the playback synchronization signal A in the case of normal playback. When muting is instructed during recording and the synchronization signal is switched, the playback synchronization signal A becomes intermittent, and the playback synchronization signal A becomes intermittent as shown in FIG. 6B instead. A playback synchronization signal B appears. By the signals shown in Fig. 6 A and B,
Switch the bistable multivibrator 47. However, in the digital signal processing section 15, a time delay occurs between input and output due to the memory, etc., so the monostable multivibrator 48 delays the delay time τ caused by the digital signal processing section 15 to cancel muting. Therefore, the total muting time is (T ₁ +T ₂ +τ). To perform muting, a muting signal (FIG. 6C) is applied to the clear terminal of the D flip-flop 16 provided immediately before the D/A converters 17a to 17n.
Naturally, during muting, the codes are made to match so that the outputs of the D/A converters 17a to 17n become OV.

Note that the muting time when manually mutating is (T ₃ +τ).

Next, FIG. 7 shows a recording format of a signal on the recording medium 11. In the figure, 50 is a synchronization signal, 51
is data, 52 is a redundant bit for error detection and correction of data, and repetitions of the synchronizing signal 50, data 51 and redundant bit 52 are recorded on the recording medium 11. The synchronization signals A and B can be distinguished by providing two types of synchronization signals 50 completely independently as shown in FIG. 7A, or by dividing the synchronization signal part into two as shown in FIG. 7B. Signal 50a followed by identification signal section 5
0b (usually called a flag) may be provided.

As a result of this configuration, the PCM recording/playback device can perform discontinuous recording/continuous playback and recording/muting in the same way as a conventional analog recording/playback device, and its operability is greatly improved.

As described above, the PCM recording and reproducing apparatus of the present invention uses different synchronization signals between the steady recording part and the areas before and after the discontinuous recording point, detects the type of synchronization signal during playback, and detects the type of synchronization signal before and after the discontinuous recording point. Since the playback output level is temporarily lowered, the generation of abnormal noise can be prevented at low cost without reducing operability.

[Brief explanation of the drawing]

FIG. 1 is a waveform diagram showing various modulation methods used in digital magnetic recording, FIG. 2 is a block diagram of a PCM recording and reproducing apparatus according to an embodiment of the present invention, and FIG.
Figures 5 and 4 are specific circuit diagrams of the main parts of Figure 2, respectively, Figures 5 and 6 are signal waveform diagrams of various parts of the circuits of Figures 3 and 4, respectively, and Figure 7 is
FIG. 3 is a diagram showing a recording format used for recording a PCM signal. 2a to 2n...A/D converter, 4a, 4b...
Synchronous signal generation circuit, 5... Synchronous signal switching circuit, 6
...operation switch group, 7...switch control circuit,
8...Delay circuit, 9...Synchronization signal addition circuit, 10
... Recording circuit, 11 ... Recording medium, 12 ... Reproduction/demodulation circuit, 13a, 13b ... Synchronization signal extraction circuit, 14 ... Muting signal generation circuit, 1
6...D flip-flop (temporary level lowering means), 17a to 17n...D/A converter.

Claims (1)

[Claims] 1. On the recording side, A/D conversion means converts an analog signal into a PCM signal, and performs time axis conversion and generation and addition of an error correction code to the A/D converted PCM signal. A digital signal processing means, a synchronization signal generation means for generating first and second synchronization signals, and switching to the first synchronization signal side during normal recording and outputting the first synchronization signal, and outputting the first synchronization signal immediately after starting recording and immediately after stopping recording. synchronous signal switching means for switching to and outputting a second synchronous signal side in a transient state; synchronous signal adding means for adding the synchronous signal switched by the synchronous signal switching means to the output of the digital signal processing means; It consists of a recording means for recording a digital signal to which a synchronization signal has been added by a synchronization signal addition means onto a recording medium, and on the reproduction side, a reproduction means for reproducing the recorded information from the recording medium, and a reproduction means for reproducing the recorded information from the recording medium; a first device that detects the first synchronization signal from a digital signal;
synchronous signal detection means, second synchronous signal detection means for detecting the second synchronous signal from the digital signal reproduced by the reproduction means, and time axis conversion based on the detected first synchronous signal. and a digital signal processing means for correcting code errors, a D/A conversion means for converting the digital signal output from the digital signal processing means into an analog signal, and a second synchronizing signal detecting means. Temporary level drop signal generating means for generating a temporary level drop signal from when the synchronization signal is detected until the first synchronization signal is stably detected by the first synchronization signal detection means; During the generation period of the temporary level drop signal from the temporary level drop signal generating means, the level of the output analog signal of the D/A converter is temporarily lowered and restored in response to disappearance of the temporary level drop signal. A PCM recording and reproducing device equipped with a temporary level lowering means. 2. According to claim 1, the synchronization signal switching means is provided with a switch that independently operates the synchronization signal switching means.
PCM recording and playback device. 3. The PCM recording and reproducing apparatus according to claim 1, wherein the first and second synchronization signals are composed of two completely independent types of synchronization signals. 4. The PCM recording and reproducing apparatus according to claim 1, wherein the first and second synchronization signals are composed of a common synchronization signal section and different identification signal sections.