JPS645498B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a data communication system that exchanges and connects data lines having multiple types of communication speeds, and particularly relates to data communication systems that detect the communication speed of data arriving at the data line. Concerning improvement of line speed detection method.

(b) Technical background In a data communication system that connects asynchronous data lines with multiple communication speeds, such as from 50 baud to 2400 baud, the communication speed of the opposite data line that is connected in an exchange is first detected. There is a need.

(c) Prior Art and Problems In an example of a conventional data communication system, a character assembly/disassembly unit that operates at each of the plurality of communication speeds is provided for each data line, and after the exchange connection is completed, the first Predetermined character data transmitted to the character assembly/disassembly section is received in parallel by each of the character assembly/disassembly sections, and the communication speed is detected by the character assembly/disassembly section that detects the predetermined character. However, according to such means, it is necessary to provide a plurality of character assembly/disassembly sections for each data communication line, which may impair the economic efficiency of the data exchange system, and has the disadvantage that the communication speed that can be received is also limited. Ta.

In another example of a conventional data communication system, the transmitting data line transmits predetermined character data with as many spaces as possible after the switching connection is completed, and the receiving data line samples the character data at the highest communication speed. If the stop bit is in a space state when it should be detected at the communication speed, the communication speed is sequentially lowered and detection is attempted, and the above process is repeated until the predetermined character is successfully received. However, according to such means, the character data to be transmitted for detecting the communication speed is limited, and the receivable communication speed is also limited, which has the drawback of impairing the flexibility of the data communication system.

(d) Purpose of the Invention The purpose of the present invention is to eliminate the drawbacks of the conventional data line speed detection methods as described above, and to realize a data line speed detection method that does not impair the economy and flexibility of data communication systems. exist.

(e) Structure of the Invention The object is to provide an asynchronous system that has multiple types of communication speeds, is in a mark state (logical value 1) when not in use, and becomes a space state (logical value 0) when character data arrives. In a data communication system in which a data line is exchange-connected, a timer for measuring the time that the data line remains in a space state is provided in a character assembly/disassembly unit provided corresponding to the data line, and the character assembly/disassembly unit The speed before character data reception speed detection is set in advance so that the data is received at the highest communication speed, and when a call arrives on the data line, the central processing unit initializes the timer, The timer automatically measures the space state time of predetermined character data that arrives first at After the reception time has elapsed, an interrupt is issued to the central processing unit, and the central processing unit calculates a reception start time for receiving at the maximum communication speed from the time of the interruption, and calculates the minimum communication speed of the data line from the reception start time. After a predetermined time period during which the predetermined character data can be received, reads the measurement result of the timer, detects the communication speed of data arriving at the data line based on the measurement result, and determines the reception speed of the character assembly/disassembly unit. This is achieved by setting .

(f) Embodiment of the invention An embodiment of the invention will be described below with reference to the drawings. The drawing is a diagram showing a data line speed detection method according to an embodiment of the present invention. In the figure, a character assembly/disassembly section 3 provided corresponding to a reception data line 1 and a transmission data line 2 includes a counter circuit 4, a logic A sum gate 5 and an address selection circuit 6 are also provided. When the receiving data line 1 is in the mark state (logical value 1), the OR gate 5 always outputs the logical value 1, so the clock signal input to the OR gate 5
cp is not transmitted to the counting circuit 4, but when the receiving data line 1 is in the space state (logical value 0), the clock signal cp is transmitted to the counting circuit 4 via the OR gate 5, 4 is incremented at a predetermined period. Initially, the baud rate generator 31 in the character assembly/disassembly section 3 is configured so that the reception circuit 32 can detect a start bit no matter what communication speed character data arrives from the reception data line 1.
The communication speed is set to the highest. When a call is now set up on the receive data line 1 and the send data line 2, the central processing unit 7 controls the address selection circuit 6 via the bus 8 to initialize the counting circuit 4. In this state, the receiving data line 1 is in the mark state, so the counting circuit 4 does not increment. Subsequently, when the opposite data line (not shown) sends out predetermined character data (for example, a CR code), the character data is transmitted to the receiving data line 1 via an exchange (not shown). The counting circuit 4 is incremented by the clock signal CP while the receiving data line 1 is in the space state due to the character data, according to the process described above. On the other hand, the receiving circuit 3 in the character assembly/disassembly section 3
2 has a function of detecting the start of reception by detecting a start bit, and as described above, receives the character data at the maximum communication speed set in the baud rate generator 31, and when the expected reception completion time has elapsed. After storing received character data rc, status information st, received interrupt information ir, etc. in the receiving buffer 34, a reception completion interrupt signal is transmitted to the central processing unit 7 via the interrupt control circuit 35. Since this expected reception completion time is initially set to the highest communication speed, it may match the speed of the received data or may be faster than the speed of the received data.

When the central processing unit 7 receives the reception completion interrupt signal, it calculates the reception start time of the predetermined character data based on the time when the reception completion interrupt signal was received and the communication speed set in advance. That is, the central processing unit 7 assumes that the character data has been received by receiving the reception completion interrupt signal, and from this point on, the currently set communication speed is set to the maximum speed, so the communication speed is set at the maximum speed. By subtracting the character data reception time, the reception start time can be determined.

Next, if the communication speed is slower than the maximum communication speed set on the receiving side, data reception has not yet been completed at the time the reception completion interrupt signal is received, so the central processing unit 7 Waits for a predetermined time during which the predetermined character data can be received even at the lowest communication speed. After this predetermined time has elapsed, the counting result is read from the counting circuit 4 via the bus 8. The counting result at this point in time corresponds to the cumulative value of the space state time of the character data. The central processing unit 7 has a built-in reference value for the space state cumulative time when the character data is transmitted at various communication speeds, and by comparing the counting result received from the counting circuit 4 with the reference value, The communication speed of the line is detected, and the baud rate generator 31 in the character assembly/disassembly section 3 is set to the detected communication speed via the bus 8. Thereafter, the character assembly/disassembly section 3 receives data arriving at the receiving data line 1 at the communication speed of the opposing data line, and also transmits data to the transmitting data line 2.

As is clear from the above description, according to this embodiment, the character assembly/disassembly section 3 is provided with a counting circuit 4, an OR gate 5, and an address selection circuit 6, thereby making it possible to select It becomes possible to measure the cumulative space state time of character data and detect the communication speed to be set in the character assembly/disassembly section 3 from the measurement result. The predetermined character data can be arbitrarily selected as long as it includes a space state. Furthermore, even when a new communication speed is added, this can be easily handled by adding a reference value for the cumulative space state time built into the central processing unit 7.

Note that the drawings are merely one embodiment of the present invention; for example, the character data is not limited to the CR code, and many other modifications may be considered; The effect remains the same. Further, the configurations of the timekeeping means and the character assembly/disassembly section 3 are not limited to those shown in the drawings, and many other modifications may be considered, but the effects of the present invention will not change in any case.

(g) Effects of the Invention As described above, according to the present invention, it is possible to realize an economical and highly flexible data line speed detection method in the data communication system.

[Brief explanation of drawings]

The drawing is a diagram showing a data line speed detection method according to an embodiment of the present invention. In the figure, 1 is a receiving data line, 2 is a sending data line, 3 is a character assembly/disassembly unit, 4 is a counting circuit,
5 is an OR gate, 6 is an address selection circuit, 7 is a central processing unit, 8 is a bus, 31 is a baud rate generator, 32 is a receiving circuit, 33 is a transmitting circuit, 34 is a receiving buffer, 35 is an interrupt control circuit, 36 is an input/output control circuit, 37 is a transmission buffer, cp is a clock signal, ir is reception interrupt information, rc is reception character data,
st indicates status information.

Claims (1)

[Claims] 1. An asynchronous data line that has multiple types of communication speeds, is in a mark state (logical value 1) when not in use, and becomes a space state (logical value 0) when character data arrives. In a data communication system in which a character assembly/disassembly section provided corresponding to the data line is provided with a timer for measuring the time that the data line remains in a space state, the character data of the character assembly/disassembly section is connected in an exchange manner. The speed before reception speed detection is set in advance to receive at the highest communication speed, and when a call arrives on the data line, the central processing unit initializes the timer, The space state time of the predetermined character data that arrives is automatically measured by the clocking means, and the character assembly/disassembly section measures the elapsed reception time of the character data to be received at the maximum communication speed after starting to receive the character data. Later, an interrupt is issued to the central processing unit, and the central processing unit calculates a reception start time for receiving data at the highest communication speed from the time of the interrupt, and calculates a reception start time at the minimum communication speed of the data line from the reception start time. After a predetermined time period during which character data can be received has elapsed, the measurement result of the timer is read, the communication speed of data arriving at the data line is detected based on the measurement result, and the reception speed of the character assembly/disassembly unit is set. A data line speed detection method characterized by: