JPS64752B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a notification method suitably implemented in fire alarm equipment and the like. Large buildings such as hotels are equipped with a large number of detectors to detect the occurrence of a fire, and are configured so that the location of a fire can be determined in a control room or the like. In the prior art, when a fire occurs, a carrier signal having a predetermined frequency corresponding to the detector is transmitted from a detector that detects the fire, and by identifying this frequency, it is possible to know the location of the fire. . In such prior art, when a large number of detectors simultaneously detect a fire and generate multiple frequency signals, it becomes difficult to identify the detection location. Also, although it is important to accurately set the frequency generated by the detector, it is difficult to do so. Moreover, once the frequency is set for each detector, it is difficult or troublesome to change the frequency. Therefore, there is a limit to the number of detectors that can be set. It is an object of the present invention to provide a notification system that can discriminate between outputs from multiple detectors. FIG. 1 is an electrical circuit diagram of an embodiment of the present invention. This embodiment can notify the location of a fire in a building such as a hotel. The main control device 1 is provided in a management room or the like. In this main control device 1, terminal devices 11 and 21 are installed in each room via lines 2 and 3. The terminal device 11 includes a plurality of detectors S, for example, five in this embodiment.
11 to S15 are provided. These detectors S1
1 to S15 have a configuration in which two contacts are electrically connected by detecting a rise in temperature or generation of smoke when a fire occurs. One contact point of these detectors S11 to S15 is commonly connected to line 3. Detector S
The other contacts 11 to S15 are commonly connected to another line 2 via incandescent indicator lamps Z11 to Z15 as impedance elements, respectively. Detectors S11 to S15 and indicator lamps Z11 to
Each connection point with Z15 is a repeater that performs logical processing.
They are respectively connected to terminals A11 to A15 of TC11. Terminal B11 of this repeater TC11 is connected to line 2. The other terminal 21 is also constructed in a similar manner, and corresponding components are designated by the reference numeral 2 in the 10th place.
, and omit the explanation. Further terminal devices may be added. In the main control device 1, the positive side terminal of the DC power supply E is connected to the relay coil CL of the relay RY and the diode D1.
connected to line 2 via. A negative terminal of DC power supply E is connected to line 3. DC power supply E is connected to terminal F,
Power is supplied between the terminals G and energizes the logic processing device 4. From the output terminals J and K of the logic processing device 4, a line 2 is connected via a diode D2.
A transmission signal SG (see FIG. 3, 1), which will be described later, is sent out. Output terminal K is connected to line 3. The connection point between relay coil CL and diode D1 is
It is connected to line 3 via a self-holding relay switch RS2 that is turned on by excitation of relay coil CL. FIG. 2 shows a repeater TC1 included in the terminal device 11.
FIG. 1 is a specific electrical circuit diagram of No. 1. The transmission signal SG input from the terminal B11 is given to the power generation circuit 16. The power generated by the power generation circuit 16 energizes the pulse detection circuit 17 and the signal processing circuit 18 comprising an integrated circuit or the like. The power generation circuit 16 includes a diode D3 for half-wave rectification, smoothing capacitors C1 and C2,
It includes a constant voltage transistor TR1, a Zener diode D4, and a resistor R1. The pulsed transmission signal SG thus input from terminal B11
DC power is derived between the lines 41 and 42 by receiving the . Between terminal B11 and terminals A11 to A15,
A series circuit consisting of switching circuit 43 and diodes D5 to D9 directionally coupled in the forward direction is connected. A connection point 51 between the switching circuit 43 and these diodes D5 to D9 is connected to the line 42.
commonly connected to The switching circuit 43 is
Switching transistors TR2 and TR3,
It includes resistors R2 and R3 connected in series with these transistors, respectively. Switching circuit 4
The signal processing circuit 18 is connected to the transistor TR2 of No. 3.
The return signal (third
2) is input via line 44. When the transistor TR2 becomes conductive, the transistor TR3 becomes conductive, thereby causing the terminal B11 to become conductive.
and terminals A11 to A15 are transistors TR2,
TR3, resistors R2, R3 and diode D5~
It becomes conductive via D9. The input terminal W of the pulse detection circuit 17 has a terminal B.
A transmission signal SG from 11 is input. Terminals U and V for power activation of the pulse detection circuit 17 are connected to lines 41 and 42, respectively. The pulse detection circuit 17 receives at the input terminal W a pulse superimposed on the DC component input from the terminal B11, and connects the low level of the pulse to the ground level, that is, the line 4.
A pulse of level 2 is applied from output terminal Y to signal processing circuit 18 via line 45. Line 41 is an impedance element such as resistor R5 to R.
9 to the input terminals H1 to H of the signal processing circuit 18
5 and the diodes D11-D1
5 to the terminals A11 to A15. An address setting circuit 46 is provided in association with the signal processing circuit 18. This address setting circuit 46
is the terminal device 11, 21 and therefore the repeater TC11,
It has switches S1 to S4 corresponding to each bit for setting an address for identifying the TC 21. By selectively conducting or cutting off these switches S1 to S4, the signal processing circuit 18
The address input terminals M1 to M4 of the
When a voltage is applied between 1 and 42, a high level or low level address setting signal is input. Assume that a fire occurs in a room in which the terminal device 11 is installed, and the detector S11 becomes conductive. The indicator lamp Z1 is turned on by the conduction of the detector S11.
1 lights up, and the relay coil CL of the relay RY is excited. Therefore, the relay switch RS
1 becomes conductive and the logic processing circuit 4 is energized. Furthermore, the relay switch RS2 becomes conductive, thereby self-maintaining the excitation state of the relay coil CL and therefore the switching mode of the relay switches RS1 and RS2. FIG. 31 shows the waveform of the voltage between lines 2 and 3. At time t1, the detector S11
becomes conductive, and relay RY operates at time t2. The logic processing circuit 4 sequentially and cyclically sends out the transmission signal SG to the lines 2 and 3 from the output terminals J and K to the terminals 11 and 21 and thus to the repeaters TC11 and TC21. This transmission signal SG includes a start signal SG1 indicating the beginning of the transmission signal SG, a repeater TC11,
Address signal SG2 to address TC21
, a control signal SG3 included here although not used in this embodiment, and a repeater TC11,
It consists of a reply request signal SG4 for causing the TC 21 to send a reply signal. This transmission signal SG is composed of pulses, and the pulse duration W1 of logic "0" is equal to the pulse duration W2 of logic "1".
It is 1/2 of , which is the minimum. There is also a maximum pulse rest period W3. The pulse duration W4 of the reply request signal SG4 is equal to the pulse duration W1, W
2 and the pulse duration of the start signal SG1. Line 2 from the logic processing circuit 4 of the main controller 1,
The transmission signal SG derived during the period 3 is transmitted to the terminal device TC11.
The low level of the pulse is set to the ground level by the pulse detection circuit 17 and inputted to the signal processing circuit 18. The transmission signal SG is the power generation circuit 16
The current is converted into a direct current by the converter, and is supplied to lines 41 and 42. Detector S11 becomes conductive, and the remaining detector S1
If 2 to S15 are disconnected, terminal A11
is connected to line 3 via detector S11 and is at ground level. Therefore, the input terminal H1 of the signal processing circuit 18 is at a low level, and the remaining input terminals H2 to H5 are at a high level. The signal processing circuit 18 responds to the reply request signal SG4 when the address signal SG2 included in the transmission signal SG matches the address set by the address setting circuit 46, and during the duration of the reply request signal SG4. A return signal is derived on line 44 which is a series bit logic signal indicating that detector S11 is conducting. The waveform of this reply signal is shown in FIG. 32. The logic signals of the reply signals representing the conduction states of the detectors S11 to S15 are as shown in Table 1, and furthermore, the logic signals of the reply signals representing the conduction states of the detectors S11 to S15 are
A logic signal can be derived from signal processing circuit 18 on line 44 indicating that a plurality of 15 have become conductive at once.

[Table] The switching circuit 43 conducts and cuts off conduction according to the return signal derived from the line 44, and as a result, the terminal B11, and therefore the line 2 and the output terminal J of the logic processing circuit 4, Conducted or cut off at the same level. In the logic processing circuit 4, this reply request signal SG4
Equivalently, as shown in FIG. 4, the current value between lines 2 and 3, and thus between terminals F and J, is detected during the period when . A resistor R10 is equivalently connected between the terminals F and J, and the voltage measuring means 47 detects a voltage drop across the resistor R10 corresponding to the current of the DC power supply E flowing through the resistor R10.
By reading the voltage by this voltage measuring means 47, the switching state of the switching circuit 43 and therefore the return signal led out to the line 44 is detected, and accordingly it is determined that the detector S11 is conductive. That will happen. FIG. 5 is a specific electrical circuit diagram of the pulse detection circuit 17. The pulse of the return signal SG from the input terminal W passes from the diode D16 to the differential capacitor C3, and then to the transistors TR4 and TR5 that constitute the switching circuit 48.
It is given to the base as the control terminal of TR4.
These transistors TR4 and TR5 are connected to a resistor R
13 and R14 are connected in series. Resistor R13,
R14 and the switching circuit 48 have terminals U and V.
The voltage of the power generation circuit 16 is applied from the source. A time constant setting resistor R12 is connected between the base of the transistor TR4 and the terminal V. A diode D17 is connected in parallel to this resistor R12. A connection point 49 between diode D16 and capacitor C3 is connected to terminal V via resistor R11. The time constant C3·R12 of the capacitor C3 and the time constant setting resistor R12 is set to be sufficiently larger than the maximum pulse duration W4 (see FIG. 3, 1) (C3·R12≫W4). The operation of the pulse detection circuit 17 shown in FIG. 5 will be explained with reference to FIG. The pulse of the transmission signal SG shown in FIG. 6 is input to the input terminal W.
This signal is high level at VE and low level at VB. At the rising edge of this pulse with amplitude V1, a voltage is applied to the base of transistor TR4 via diode D16 and capacitor C3, causing transistor TR4 to conduct and transistor TR5 to shut off. Therefore, the level of the output terminal Y becomes the voltage VDD of the terminal U. The waveform of the output of the capacitor C3, that is, the signal applied to the base of the transistor TR4 is shown in FIG. 6, and the waveform of the output terminal Y is shown in FIG. 6. During the pulse duration the voltage at the base of transistor TR4 decreases according to a time constant determined by capacitor C3 and resistor R12. Since this time constant is sufficiently larger than the maximum pulse duration W4, the transistor TR
4. The switching behavior of TR5 remains as described above. At the falling edge of the pulse, the base of the transistor TR4 becomes a voltage obtained by subtracting the pulse amplitude V1 from the base-emitter voltage VBE of the transistor TR4. The base of transistor TR4 is therefore negatively biased and accordingly transistor TR4 is biased negatively.
4 is cut off, and transistor TR5 is turned on. Therefore, the output of the output terminal Y becomes the ground level of the terminal V. The low level of the pulse with the superimposed DC component input to the input terminal W in this way is set to a predetermined level (in this embodiment, the ground level), and the high level is set to the voltage VDD of the terminal U. becomes. In this way, regardless of the magnitude of the voltage of the DC component input to the input terminal W, as long as the amplitude V1 of the pulse is greater than the base-emitter voltage VBE of the transistor TR4, a pulse with an amplitude of VDD is derived from the output terminal Y. become. FIG. 7 is a specific electrical circuit diagram of the pulse detection circuit 17 according to another embodiment of the present invention. This embodiment is partially similar to FIG. 5, and corresponding components are provided with the same reference numerals. A noteworthy feature is the connection point 49 between diode D16 and capacitor C3.
is connected to voltage dividing resistor R1 via diode D18.
5, voltage VB1 divided by R16 is applied. When the signal shown in FIG. 81 is input to the input terminal W, the waveform at the connection point 49 is shown in FIG. 82. The voltage dividing resistor R is set so that the amplitude V2 of the pulse at the node 49 is greater than the base-emitter voltage VBE of the transistor TR4.
Select 15, R16. That is, V2≡VDD−VB1>VBE (1) As a result, the output from the capacitor C3, that is, the signal applied to the base of the transistor TR4 has the waveform shown in FIG. 8. As a result, the signal given to the output terminal Y becomes as shown in FIG. 8 and 4. In this embodiment, since the voltage VB1 determined by the voltage dividing resistors R15 and R16 is applied to the connection point 49, the noise 50 is not mixed into the signal input from the input terminal W as shown in FIG. However, if the voltage of the noise 50 is lower than VB1, it is not output to the output terminal Y. In this way, noise resistance performance is improved. FIG. 9 is a specific electrical circuit diagram of a pulse detection circuit according to still another embodiment of the present invention. Transmission signal
The SG pulse is passed from the input terminal W to the diode 19.
and an integrating capacitor C via the first resistor R17.
given to 4. The signal from this input terminal W is
It is also applied to one input terminal of the comparator COM.
The voltage across the capacitor C4 is divided by voltage dividing resistors R19 and R20 via a resistor R18. The divided voltage is applied to the other input terminal of the comparator COM. Resistance R from capacitor C4
The output via 18 powers comparator COM. This comparator COM consists of an integrated circuit or the like.
Time constant C between capacitor C4 and first resistor R17
4.R17 is selected to be sufficiently smaller than the minimum pulse duration W1 of the transmission signal SG (C4.R17≪
W1). Also, the resistance value of resistor R18 is the voltage dividing resistor R1
9. Select a value sufficiently smaller than the sum of the resistance values of R20 (R19+R20). Furthermore, the time constant C4·(R18+R19+R20) of the capacitor C4, resistor R18, and voltage dividing resistors R19 and R20 are selected to be sufficiently larger than the maximum pulse pause period W3 as shown in the second equation. C4・(R18+R19+R20)≫W3...(2) Referring to FIG. 10, connect the input terminal W to
When the transmission signal SG is input, the transmission signal SG
capacitor C4 is charged via diode D19 and resistor R17. Capacitor C
4 and the time constant C4·R17 of resistor R17 is sufficiently smaller than the minimum pulse duration W1, so that capacitor C4 is charged in a very short time. Also, since the time constant C4 (R18 + R19 + R20) of resistors R18, R19, R20 and capacitor C4 is sufficiently larger than the maximum pulse pause period W3, capacitor C4 is almost discharged during the period when a signal is applied to input terminal W. never be done. Resistor R18
The voltage at the connection point 50 between R19 and resistor R19 is as shown in FIG. Since the resistance value of resistor R18 is sufficiently smaller than the sum of voltage dividing resistors R19 and R20 (R19+R20), a voltage similar to that on line 41 of repeater TC11 described above is applied to connection point 50.
VDD is generated and this power is used to power the comparator COM. The voltage VR divided by the voltage dividing resistors R19 and R20 is set to be larger than the DC bias voltage VB of the signal applied to the input terminal W (VDD>VR>VB). As a result, the comparator COM outputs the pulse shown in FIG. 10 to the output terminal Y, and the low level of this output pulse becomes the ground level of the terminal V. Even if the high-level voltage value VDD of the signal applied to the input terminal W fluctuates, the voltage divided by the resistors R19 and R20 applied to the comparator COM also changes accordingly. Therefore, the ratio between the voltages VDD and VR is approximately constant as shown in the following third equation. VDD/VR=R20/(R19+R20)...(3) In this way, even if the high level value of the transmission signal fluctuates, the low level of the pulse is output from the output terminal at a predetermined potential (in this example, the ground potential). ) will be derived. Resistor R18 may be omitted. The present invention is not only related to fire alarm equipment, but can be implemented in a wide range of other ways. As described above, according to the present invention, it is possible to identify outputs from a large number of detectors.

[Brief explanation of drawings]

FIG. 1 is an overall electrical circuit diagram of an embodiment of the present invention, FIG. 2 is a specific electrical circuit diagram of the repeater TC11 shown in FIG. 1, and FIG.
A waveform diagram for explaining the operation of the notification method shown in the figure, FIG. 4 is an equivalent circuit diagram for explaining the operation at the time of reception in the logic processing circuit 4 of the main controller 1, and FIG. 5 is a pulse detection A specific electric circuit diagram of the circuit 17, FIG. 6 is a waveform diagram for explaining the operation of the pulse detection circuit 17 shown in FIG. 5, and FIG. 7 is a pulse detection circuit of another embodiment of the present invention. 17 is a specific electric circuit diagram, FIG. 8 is a waveform diagram for explaining the operation of the pulse detection circuit 17 shown in FIG. 7,
FIG. 9 is a specific electrical circuit diagram of a pulse detection circuit 17 according to still another embodiment of the present invention, and FIG.
FIG. 3 is a waveform diagram for explaining the operation of the pulse detection circuit 17 shown in the figure. DESCRIPTION OF SYMBOLS 1... Main control device, 2, 3... Line, 4... Logic processing circuit, 11, 21... Terminal device, 16... Power generation circuit, 17... Pulse detection circuit, 18... Signal processing circuit, 46... Address setting circuit, 48 ...Switching circuit, S11-S25...Detector, Z11-Z2
5...Display lamp, RY...Relay, D1-D19...
Diode, C1-C4...Capacitor, R1-R
20...Resistor, TR1-TR5...Transistor,
COM…Comparator.

Claims (1)

[Claims] 1 Connect one contact of the detector that becomes conductive due to the detection operation to one output terminal of the power supply, connect the other contact of the detector to the other output terminal of the power supply via an impedance element, and Each connection point between the contact and the impedance element is provided to a signal processing circuit, and a series circuit consisting of a switching circuit and a diode directionally coupled in the forward direction is provided between the other output terminal of the power supply and each connection point. and the processing circuit changes the switching mode of the switching circuit by applying a logic signal of series bits representing the conductive state of the detector to the switching circuit, and detects the current flowing through the power supply in accordance with the switching mode. A notification method characterized by identifying a detector that has become conductive.