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JPS648527B2 - - Google Patents
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JPS648527B2 - - Google Patents

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Publication number
JPS648527B2
JPS648527B2 JP58140769A JP14076983A JPS648527B2 JP S648527 B2 JPS648527 B2 JP S648527B2 JP 58140769 A JP58140769 A JP 58140769A JP 14076983 A JP14076983 A JP 14076983A JP S648527 B2 JPS648527 B2 JP S648527B2
Authority
JP
Japan
Prior art keywords
circuit
power supply
voltage
supply circuit
cmos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58140769A
Other languages
Japanese (ja)
Other versions
JPS6032525A (en
Inventor
Kimio Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP58140769A priority Critical patent/JPS6032525A/en
Publication of JPS6032525A publication Critical patent/JPS6032525A/en
Publication of JPS648527B2 publication Critical patent/JPS648527B2/ja
Granted legal-status Critical Current

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  • Direct Current Feeding And Distribution (AREA)
  • Safety Devices In Control Systems (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Power Sources (AREA)
  • Input From Keyboards Or The Like (AREA)

Description

【発明の詳細な説明】 本発明は、自動車、産業車両、移動農機等の車
両に採用される電子制御装置のための入力回路の
改良に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in input circuits for electronic control devices employed in vehicles such as automobiles, industrial vehicles, and mobile agricultural machinery.

従来、この種の入力回路としては、例えば、第
1図に示すごとく、車両用電子制御装置における
マイクロコンピユータ20を検出スイツチ10に
接続する抵抗31及び相補型金属酸化膜半導体集
積回路32(以下、CMOS回路32という)と、
マイクロコンピユータ20及びCMOS回路32
に接続される安定化電源回路33と、検出スイツ
チ10を安定化電源回路33に接続する抵抗34
とにより構成したものがある。
Conventionally, as shown in FIG. 1, this type of input circuit includes, for example, a resistor 31 that connects a microcomputer 20 to a detection switch 10 in a vehicle electronic control device, and a complementary metal oxide semiconductor integrated circuit 32 (hereinafter referred to as CMOS circuit 32),
Microcomputer 20 and CMOS circuit 32
and a resistor 34 that connects the detection switch 10 to the stabilized power supply circuit 33.
There is a structure composed of

しかして、このような構成においては、マイク
ロコンピユータ20及びCMOS回路32が、操
作スイツチSWの閉成のもとにバツテリBから給
電されて生じる安定化電源回路33からの定電圧
(+5V)を受けて作動状態にあるとき、両抵抗3
1,34を介しCMOS回路32を安定化電源回
路33に接続する導線及び(又は)抵抗31を介
しCMOS回路32を検出スイツチ10に接続す
る導線に乗りがちな当該車両のエンジンの点火ノ
イズ、オルタネータのノイズ等のパルス性高電圧
ノイズを抵抗31によつて減少させることによ
り、このように減少されたノイズが、安定化電源
回路33からの定電圧に重畳されて抵抗31を介
しCMOS回路32に加わつても、このCMOS回
路32がラツチアツプ現象を引起し破壊すること
のないようにしてある。
Therefore, in such a configuration, the microcomputer 20 and the CMOS circuit 32 receive a constant voltage (+5V) from the stabilized power supply circuit 33 that is supplied with power from the battery B when the operation switch SW is closed. When in operation, both resistors 3
The ignition noise of the vehicle's engine, the alternator, which tends to occur on the conductor connecting the CMOS circuit 32 to the stabilizing power supply circuit 33 through the resistor 31 and/or the conductor connecting the CMOS circuit 32 to the detection switch 10 through the resistor 31. By reducing pulsed high voltage noise such as the noise of The CMOS circuit 32 is designed to prevent the CMOS circuit 32 from causing a latch-up phenomenon and being destroyed even if the voltage is increased.

しかしながら、このような構成にあつては、検
出スイツチ10の数が両抵抗31,34と共に増
大すれば、個々の検出スイツチ10の消費電流が
少なくても安定化電源回路33の消費電流が増大
し、その結果、安定化電源回路33の電力容量を
増大させねばならず、その形状寸法が大きくなる
と共に高価になつてしまう。また、各検出スイツ
チ10の開閉作動に伴い安定化電源回路33から
の定電圧がその消費電流の変動に応じて変動しマ
イクロコンピユータ20及びCMOS回路32の
適正な作動を妨たげることとなる。
However, in such a configuration, if the number of detection switches 10 increases along with both resistors 31 and 34, the current consumption of the stabilized power supply circuit 33 increases even if the current consumption of each detection switch 10 is small. As a result, the power capacity of the stabilized power supply circuit 33 must be increased, resulting in an increase in size and cost. Furthermore, as each detection switch 10 opens and closes, the constant voltage from the stabilized power supply circuit 33 varies in accordance with the variation in current consumption, which prevents the microcomputer 20 and CMOS circuit 32 from operating properly.

このようなことを防止するために、例えば、第
2図に示すごとく、CMOS回路32を各一対の
トランジスタ回路35,36を介して各検出スイ
ツチ10に接続するとともに、バツテリBを操作
スイツチSW及び各トランジスタ回路36を介し
各検出スイツチ10に接続して、CMOS回路3
2のラツチアツプ現象の発生を防止しつつ、各検
出スイツチ10への給電を安定化電源回路33に
依存することなくバツテリBに依存して行ない安
定化電源回路33の電圧変動を防止するようにし
たものがある。しかしながら、このような構成に
おいては、検出スイツチ10の数が多い程トラン
ジスタ回路35,36の対数も多くなり、その結
果、部品数の増大によりコスト高となつてしま
う。
In order to prevent this, for example, as shown in FIG. 2, the CMOS circuit 32 is connected to each detection switch 10 via each pair of transistor circuits 35 and 36, and the battery B is The CMOS circuit 3 is connected to each detection switch 10 via each transistor circuit 36.
While preventing the occurrence of the latch-up phenomenon described in 2, power is supplied to each detection switch 10 by relying on the battery B without depending on the stabilizing power supply circuit 33, thereby preventing voltage fluctuations in the stabilizing power supply circuit 33. There is something. However, in such a configuration, as the number of detection switches 10 increases, the number of logarithms of the transistor circuits 35 and 36 also increases, resulting in an increase in cost due to an increase in the number of components.

また、第3図に示すごとく、第1図に示した入
力回路においてバツテリBを操作スイツチSWを
介し各抵抗34に直接接続することも考えられる
が、かかる場合には、各検出スイツチ10への給
電を、第2図の入力回路と同様にして、安定化電
源回路33に依存することなくバツテリBに依存
して行なつているため、安定化電源回路33の電
圧変動は防止し得るものの、各一対の抵抗31,
34を介しCMOS回路32をバツテリBに接続
する導線に乗る高エネルギーの高電圧ノイズが非
常に高くなり、CMOS回路32のラツチアツプ
現象を発生させる原因となる。また、各検出スイ
ツチ10の開成時にバツテリBから各抵抗31を
介しCMOS回路32に加えられる電圧が、この
CMOS回路32に加わる安定化電源回路33か
らの定電圧よりも高いため、同様にしてCMOS
回路32のラツチアツプ現象発生及びCMOS回
路32の各構成素子の性能劣化の原因となる。
Furthermore, as shown in FIG. 3, it is also conceivable to directly connect the battery B to each resistor 34 via the operation switch SW in the input circuit shown in FIG. Since the power supply is performed by relying on the battery B without depending on the stabilized power supply circuit 33 in the same way as the input circuit in FIG. 2, voltage fluctuations in the stabilized power supply circuit 33 can be prevented. each pair of resistors 31,
The high-energy, high-voltage noise on the conductor connecting the CMOS circuit 32 to the battery B through the battery B becomes very high, causing the CMOS circuit 32 to latch up. Also, when each detection switch 10 is opened, the voltage applied from the battery B to the CMOS circuit 32 via each resistor 31 is this voltage.
Since it is higher than the constant voltage from the stabilized power supply circuit 33 that is applied to the CMOS circuit 32, the CMOS
This causes a latch-up phenomenon in the circuit 32 and performance deterioration of each component of the CMOS circuit 32.

本発明は、このようなことに対処してなされた
もので、その目的とするところは、車両用電子制
御装置のマイクロコンピユータ及び複数の検出器
に適用される入力回路を、少ない部品数で安価に
構成し、かつその安定化電源回路の定電圧の変動
を伴うことなくCMOS回路のラツチアツプ現象
の発生を常に確実に防止し得るようにすることに
ある。
The present invention has been made in response to the above-mentioned problems, and its purpose is to provide an input circuit that is applied to a microcomputer and a plurality of detectors of a vehicle electronic control device at low cost and with a small number of parts. The object of the present invention is to make it possible to always and reliably prevent the occurrence of latch-up phenomenon in a CMOS circuit without causing fluctuations in the constant voltage of the stabilized power supply circuit.

かかる目的を達成するにあたり、本発明の構成
上の特徴は、マイクロコンピユータと、少なくと
も第1及び第2の検出器とを備えた車両用電子制
御装置において、前記マイクロコンピユータに接
続されるCMOS回路と、直流電源から直流電圧
を付与されたとき前記マイクロコンピユータ及び
CMOS回路の各許容電源電圧を第1定電圧とし
て発生し当該マイクロコンピユータ及びCMOS
回路の各電源端子に付与する第1安定化電源回路
と、前記直流電源から直流電圧を付与されたとき
この直流電圧より低く前記第1定電圧より高い第
2定電圧を生じる第2安定化電源回路と、この第
2安定化電源回路、前記第1検出器及び前記
CMOS回路の第1信号入力端子の間に接続した
第1接続導線中に介装されて前記第2安定化電源
回路から前記第1検出器への電流の付与を許容す
るとともに前記第1接続導線に乗る高電圧ノイズ
を減少させつつ前記第2定電圧を前記第1定電圧
より低い電圧に分圧して前記CMOS回路の第1
入力端子に付与する第1抵抗回路と、前記第2安
定化電源回路、前記第2検出器及び前記CMOS
回路の第2信号入力端子の間に接続した第2接続
導線中に介装されて前記第2安定化電源回路から
前記第2検出器への電流の付与を許容するととも
に前記第2接続導線に乗る高電圧ノイズを減少さ
せつつ前記第2定電圧を前記第1定電圧より低い
電圧に分圧して前記CMOS回路の第2入力端子
に付与する第2抵抗回路とを設けたことにある。
To achieve such an object, the present invention has a structural feature that provides a vehicle electronic control device including a microcomputer and at least first and second detectors, including a CMOS circuit connected to the microcomputer; , when a DC voltage is applied from a DC power source, the microcomputer and
Each allowable power supply voltage of the CMOS circuit is generated as the first constant voltage, and the corresponding microcomputer and CMOS
a first stabilized power supply circuit applied to each power supply terminal of the circuit; and a second stabilized power supply that generates a second constant voltage lower than the DC voltage and higher than the first constant voltage when DC voltage is applied from the DC power supply. a circuit, the second regulated power supply circuit, the first detector and the second stabilized power supply circuit;
The first connecting conductor is interposed in a first connecting conductor connected between the first signal input terminals of the CMOS circuit to allow current to be applied from the second stabilized power supply circuit to the first detector. The first constant voltage of the CMOS circuit is divided by dividing the second constant voltage to a voltage lower than the first constant voltage while reducing high voltage noise on the CMOS circuit.
a first resistance circuit provided to the input terminal, the second stabilized power supply circuit, the second detector, and the CMOS
Interposed in a second connecting conductor connected between second signal input terminals of the circuit to allow current to be applied from the second stabilized power supply circuit to the second detector, and to allow the second connecting conductor to and a second resistor circuit that divides the second constant voltage to a voltage lower than the first constant voltage and applies it to the second input terminal of the CMOS circuit while reducing high voltage noise.

しかして、このように本発明を構成したことに
より、前記第2安定化電源回路が、前記直流電圧
の前記第2定電圧への変換時に、前記直流電源と
の接続導線に乗る高エネルギーの高電圧ノイズを
減少させ、かつ前記第1及び第2の抵抗回路が、
それぞれ、前記第1及び第2の接続導線に乗る低
エネルギーの高電圧ノイズを減少させるととも
に、前記第1及び第2の検出器の非作動時に前記
CMOS回路の第1及び第2の入力端子に加わる
電圧を、当該CMOS回路の電源端子に加わる前
記第1定電圧以下に低下させるので、前記
CMOS回路のラツチアツプ現象の発生及びこの
CMOS回路構成素子の性能劣化を確実に防止し
得る。かかる場合、前記CMOS回路が、前記各
検出器への電力供給源たる前記第2安定化電源回
路とは別の前記第1安定化電源回路からの第1定
電圧を受けているので、前記各検出器の作動に伴
い前記第2安定化電源からの流出電流に変動が生
じても、前記第1安定化電源回路からの第1定電
圧が変動することはなく、このため、前記
CMOSは、常に安定な定電圧のもとに、その入
力信号のレベル変換機能を行ない得る。また、本
発明においては、前記第2安定化電源回路及び各
抵抗回路を比較的簡単に構成し得るので、この種
入力回路が安価になる。
Therefore, by configuring the present invention in this way, the second stabilized power supply circuit is configured to reduce the amount of high energy that rides on the connecting conductor with the DC power supply when converting the DC voltage to the second constant voltage. reducing voltage noise, and the first and second resistor circuits
reduce low energy high voltage noise on said first and second connecting conductors, respectively, and reduce said
Since the voltage applied to the first and second input terminals of the CMOS circuit is lowered to below the first constant voltage applied to the power supply terminal of the CMOS circuit, the
Occurrence of latch-up phenomenon in CMOS circuits and
Performance deterioration of CMOS circuit elements can be reliably prevented. In such a case, since the CMOS circuit receives the first constant voltage from the first stabilized power supply circuit that is different from the second stabilized power supply circuit that is the power supply source to each of the detectors, Even if a fluctuation occurs in the outflow current from the second stabilized power supply due to the operation of the detector, the first constant voltage from the first stabilized power supply circuit does not fluctuate.
CMOS can always perform the level conversion function of its input signal under a stable constant voltage. Furthermore, in the present invention, the second stabilized power supply circuit and each resistance circuit can be constructed relatively easily, so this type of input circuit becomes inexpensive.

以下、本発明の一実施例を図面により説明する
と、第4図は、本発明に係る入力回路が、車両用
電子制御装置を構成するマイクロコンピユータ4
0及び複数の検出スイツチs1,s2,…,soに適用
された例を示している。入力回路は、主安定化電
源回路50、補助安定化電源回路60及び
CMOS回路70を備えており、主安定化電源回
路50はその入力端子にて車両のイグニツシヨン
スイツチIGを介してバツテリBの正側端子に接
続されて、イグニツシヨンスイツチIGの閉成に
よりバツテリBから直流電圧(+12V)を受けて
その出力端子から安定度の高い所定の定電圧を発
生しマイクロコンピユータ40及びCMOS回路
70の各電源端子に付与する。このことは、マイ
クロコンピユータ40及びCMOS回路70がそ
の各電源端子に主安定化電源回路50から定電圧
を受けて作動状態におかれることを意味する。か
かる場合、主安定化電源回路50からの定電圧
は、マイクロコンピユータ40及びCMOS回路
70の各許容電源電圧を考慮して+5Vとなつて
いる。なお、CMOS回路70はその出力端子に
てマイクロコンピユータ40の入力端子に接続さ
れている。
Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 4 shows a microcomputer 4 in which an input circuit according to the present invention constitutes a vehicle electronic control device.
An example in which the present invention is applied to zero and a plurality of detection switches s 1 , s 2 , . . . , s o is shown. The input circuit includes a main stabilized power supply circuit 50, an auxiliary stabilized power supply circuit 60, and
The main stabilized power supply circuit 50 is connected at its input terminal to the positive terminal of the battery B via the ignition switch IG of the vehicle, and when the ignition switch IG is closed, the main stabilized power supply circuit 50 is It receives a DC voltage (+12V) from the battery B, generates a highly stable predetermined constant voltage from its output terminal, and applies it to each power supply terminal of the microcomputer 40 and the CMOS circuit 70. This means that the microcomputer 40 and the CMOS circuit 70 receive a constant voltage from the main stabilized power supply circuit 50 at their respective power supply terminals and are put into operation. In this case, the constant voltage from the main stabilized power supply circuit 50 is set to +5V in consideration of each allowable power supply voltage of the microcomputer 40 and the CMOS circuit 70. Note that the CMOS circuit 70 is connected to the input terminal of the microcomputer 40 at its output terminal.

補助安定化電源回路60は、パワートランジス
タ61を有しており、このパワートランジスタ6
1はそのコレクタにてイグニツシヨンスイツチ
IGを介しバツテリBの正側端子に接続され、そ
のベースにてツエナーダイオード62を介して接
地されている。ツエナーダイオード62はツエナ
ー電圧Vz(+5V〜+12V)を有するもので、パワ
ートランジスタ61のベースに接続したカソード
にて抵抗63を介してパワートランジスタ61の
コレクタに接続されている。しかして、ツエナー
ダイオード62は、イグニツシヨンスイツチIG
の閉成下にてバツテリBから抵抗63を介し直流
電圧を受けてツエナー電圧Vzを生じパワートラ
ンジスタ61を導通させる。このことはパワート
ランジスタ61がその導通によりエミツタ(即
ち、安定化電源回路60の出力端子)からツエナ
ー電圧Vzを定電圧として発生することを意味す
る。かかる場合、バツテリBと安定化電源回路6
0との接続導線に乗るバツテリBからの高エネル
ギーを有する高電圧ノイズがパワートランジスタ
61、ツエナーダイオード62及び抵抗63の協
働作用により減少される。両コンデンサ64,6
5は、イグニツシヨンスイツチIGの閉成時に、
共にバツテリBと閉回路を形成し、この閉回路の
接続導線に乗る高周波ノイズを吸収する。
The auxiliary stabilizing power supply circuit 60 has a power transistor 61.
1 is the ignition switch on the collector.
It is connected to the positive side terminal of battery B via IG, and grounded via a Zener diode 62 at its base. The Zener diode 62 has a Zener voltage V z (+5V to +12V), and its cathode connected to the base of the power transistor 61 is connected to the collector of the power transistor 61 via a resistor 63 . Therefore, the Zener diode 62 is connected to the ignition switch IG.
When the power transistor 61 is closed, a DC voltage is received from the battery B through the resistor 63 to generate a Zener voltage Vz , making the power transistor 61 conductive. This means that the power transistor 61 generates the Zener voltage V z as a constant voltage from its emitter (that is, the output terminal of the stabilized power supply circuit 60) due to its conduction. In such a case, the battery B and the stabilized power supply circuit 6
The high-voltage noise with high energy from the battery B on the connection conductor with the power transistor 61, the Zener diode 62, and the resistor 63 is reduced by the cooperative action of the power transistor 61, the Zener diode 62, and the resistor 63. Both capacitors 64,6
5, when the ignition switch IG is closed,
Together, they form a closed circuit with battery B, and absorb high frequency noise riding on the connecting conductor of this closed circuit.

抵抗a1は、その一端にて安定化電源回路60の
出力端子に接続されるとともに、その他端にて検
出スイツチs1を介し接地されて、検出スイツチs1
の閉成時にこの検出スイツチs1に安定化電源回路
60からその定電圧に基き流入する電流を許容値
以下に制限し、抵抗a2は、その一端にて安定化電
源回路60の出力端子に接続されるとともに、そ
の他端にて検出スイツチs2を介し接地されて、検
出スイツチs2の閉成時にこの検出スイツチs2に安
定化電源回路60からその定電圧に基き流入する
電流を許容値以下に制限し、…、かつ抵抗aoは、
その一端にて安定化電源回路60の出力端子に接
続されるとともに、その他端にて検出スイツチso
を介し接地されて、検出スイツチsoの閉成時にこ
の検出スイツチsoに安定化電源回路60からその
定電圧に基き流入する電流を許容値以下に制限す
る。
The resistor a1 is connected at one end to the output terminal of the stabilized power supply circuit 60, and at the other end is grounded via the detection switch s1 .
When the detection switch S1 is closed, the current flowing into this detection switch S1 from the stabilized power supply circuit 60 is limited to a permissible value or less based on its constant voltage, and the resistor A2 is connected to the output terminal of the stabilized power supply circuit 60 at one end. It is connected and grounded at the other end via the detection switch s2 , and when the detection switch s2 is closed, the current flowing into the detection switch s2 from the stabilized power supply circuit 60 based on its constant voltage is set to a permissible value. Limit to..., and the resistance a o is
One end thereof is connected to the output terminal of the stabilized power supply circuit 60, and the other end is connected to the detection switch SO
When the detection switch SO is closed, the current flowing into the detection switch SO from the stabilized power supply circuit 60 based on its constant voltage is limited to a permissible value or less.

抵抗b1は、その一端にて、抵抗a1と検出スイツ
チs1との共通接続端に接続されるとともに、その
他端にてCMOS回路70の第1入力端子に接続
されて、検出スイツチs1とCMOS回路70の第1
入力端子との間の接続導線に乗る当該両車のエン
ジンの点火ノイズ、オルタネータのノイズ等のパ
ルス性高電圧ノイズによるCMOS回路70への
流入電流を減少させ、抵抗b2は、その一端にて、
抵抗a2と検出スイツチs2の共通接続端に接続され
るとともに、その他端にてCMOS回路70の第
2入力端子に接続されて、検出スイツチs2
CMOS回路70の第2入力端子との間の接続導
線に乗る前記高電圧ノイズによるCMOS回路7
0への流入電流を減少させ、…、かつ抵抗boは、
その一端にて、抵抗aoと検出スイツチsoの共通接
続端に接続されるとともに、その他端にて
CMOS回路70の第n入力端子に接続されて、
検出スイツチsoとCMOS回路70の第n入力端子
との間の接続導線に乗る前記高電圧ノイズによる
CMOS回路70への流入電流を減少させる。
The resistor b 1 has one end connected to the common connection terminal of the resistor a 1 and the detection switch s 1 and the other end connected to the first input terminal of the CMOS circuit 70 to connect the detection switch s 1 . and the first of the CMOS circuit 70
The resistor b 2 reduces the current flowing into the CMOS circuit 70 due to pulsed high voltage noise such as engine ignition noise and alternator noise of both vehicles on the connecting conductor between the input terminal and the resistor b 2 at one end. ,
It is connected to the common connection end of the resistor a 2 and the detection switch s 2 , and the other end is connected to the second input terminal of the CMOS circuit 70, so that the detection switch s 2 and
The CMOS circuit 7 due to the high voltage noise riding on the connecting conductor between the second input terminal of the CMOS circuit 70
0, and the resistance b o is
At one end, it is connected to the common connection end of the resistor a o and the detection switch so , and at the other end,
connected to the nth input terminal of the CMOS circuit 70;
Due to the high voltage noise riding on the connecting conductor between the detection switch SO and the n-th input terminal of the CMOS circuit 70.
The current flowing into the CMOS circuit 70 is reduced.

抵抗c1は、その一端にて接地されるとともにそ
の他端にて抵抗b1のCMOS回路70の第1入力端
子との接続端に接続されて、安定化電源回路60
からの定電圧を抵抗b1との協働により分圧しこの
分圧電圧をCMOS回路70の第1入力端子に付
与し、抵抗c2はその一端にて接地されるとともに
その他端にて抵抗b2のCMOS回路70の第2入力
端子との接続端に接続されて、安定化電源回路6
0からの定電圧を抵抗b2との協働により分圧しこ
の分圧電圧をCMOS回路70の第2入力端子に
付与し、…、かつ抵抗coはその一端にて接地され
るとともにその他端にて抵抗boのCMOS回路70
の第n入力端子との接続端に接続されて、安定化
電源回路60からの定電圧を抵抗boとの協働によ
り分圧しこの分圧電圧をCMOS回路70の第n
入力端子に付与する。かかる場合、CMOS回路
70の第1、第2、…、第n入力端子にそれぞれ
付与される分圧電圧が、各検出スイツチs1,…,
soの開成時におけるCMOS回路70の電源電圧
(5V)以下でCMOS回路70の入力を高レベルと
判定できる入力電圧(例えば、4V)以上(即ち、
CMOS回路70がラツチアツプ現象を起こさな
い値で入力を高レベルと判定できる値)となるよ
うに各抵抗c1,…,coの抵抗値が各抵抗a1,a2
…,aoの抵抗値及び各抵抗b1,b2,…,boの抵抗
値との関連にてそれぞれ定められている。
The resistor c 1 is grounded at one end and connected at the other end to the connection end of the resistor b 1 to the first input terminal of the CMOS circuit 70 , and is connected to the stabilized power supply circuit 60 .
The constant voltage from C2 is divided by cooperation with resistor b1 and this divided voltage is applied to the first input terminal of CMOS circuit 70, resistor c2 is grounded at one end and connected to resistor b at the other end. The stabilized power supply circuit 6 is connected to the connection terminal with the second input terminal of the CMOS circuit 70 of
A constant voltage from 0 is divided by the cooperation of resistor b2 , and this divided voltage is applied to the second input terminal of the CMOS circuit 70, and the resistor c0 is grounded at one end and grounded at the other end. CMOS circuit 70 with resistance b o at
is connected to the connection end with the n-th input terminal of the CMOS circuit 70, divides the constant voltage from the stabilized power supply circuit 60 in cooperation with the resistor b o , and applies this divided voltage to the n-th input terminal of the CMOS circuit 70.
Assigned to the input terminal. In such a case, the divided voltages applied to the first, second, ..., n-th input terminals of the CMOS circuit 70 are the same as those of the respective detection switches s 1 , ...,
The input voltage (e.g., 4 V) or higher that allows the input of the CMOS circuit 70 to be determined to be at a high level is lower than the power supply voltage (5 V) of the CMOS circuit 70 when the s
The resistance values of each resistor c 1 , ..., c o are set so that the CMOS circuit 70 has a value that does not cause a latch-up phenomenon and that allows the input to be determined as a high level .
..., ao and the resistance values of the respective resistors b 1 , b 2 , ..., b o, respectively.

以上のように構成した本実施例において、イグ
ニツシヨンスイツチIGの閉成により当該車両を
走行状態におけば、当該車両の点火系統その他の
各種系統が作動状態となり、主安定化電源回路5
0が定電圧を発生しマイクロコンピユータ40及
びCMOS回路70の各電源端子に付与してこれ
らを作動状態におき、補助安定化電源回路60が
定電圧を発生して各抵抗a1,a2,…,aoをそれぞ
れ介し各検出スイツチs1,s2,…,so及び各抵抗
b1,b2,…,boに付与する。すると、補助安定化
電源回路60からの定電圧が各一対の抵抗b1
c1;b2,c2;…;bo,coにより分圧されてCMOS
回路70の第1、第2、…、第nの入力端子に付
与される。かかる場合、CMOS回路70の第1、
第2、…、第nの入力端子にそれぞれ付与される
分圧電圧は、CMOS回路70の電源端子に付与
される主安定化電源回路50からの定電圧より高
くないので、CMOS回路70が分圧電圧により
ラツチアツプ現象を生じることはない。
In this embodiment configured as above, when the vehicle is placed in a running state by closing the ignition switch IG, the ignition system and other various systems of the vehicle are activated, and the main stabilizing power supply circuit 5 is activated.
0 generates a constant voltage and applies it to each power supply terminal of the microcomputer 40 and the CMOS circuit 70 to put them in an operating state, and the auxiliary stabilizing power supply circuit 60 generates a constant voltage and applies it to each power terminal of the microcomputer 40 and the CMOS circuit 70, and the auxiliary stabilizing power supply circuit 60 generates a constant voltage and applies it to each power terminal of the microcomputer 40 and the CMOS circuit 70 . ..., ao respectively through each detection switch s 1 , s 2 , ..., s o and each resistor
Assigned to b 1 , b 2 , …, bo o . Then, the constant voltage from the auxiliary stabilizing power supply circuit 60 is applied to each pair of resistors b 1 ,
CMOS voltage is divided by c 1 ; b 2 , c 2 ;…;
It is applied to the first, second, . . . , nth input terminals of the circuit 70. In such a case, the first of the CMOS circuits 70,
Since the divided voltages applied to the second, ..., n-th input terminals are not higher than the constant voltage from the main stabilized power supply circuit 50 applied to the power supply terminal of the CMOS circuit 70, the CMOS circuit 70 No latch-up phenomenon occurs due to piezoelectric voltage.

また、バツテリBと補助安定化電源回路60と
の間の接続導線にバツテリBからの高エネルギー
を有する高電圧ノイズが乗つても、この高電圧ノ
イズが補助安定化電源回路60のパワートランジ
スタ61、ツエナーダイオード62及び抵抗63
の協働作用により減少されるので、このように減
少された高電圧ノイズが補助安定化電源回路60
からの定電圧と共に各抵抗b1,b2,…,boに付与
されても、CMOS回路70の第1、第2、…、
第nの入力端子に加わる電圧が、各抵抗b1,b2
…,boの作用により、CMOS回路70の電源端子
に加わる定電圧より高くなることはなく、その結
果CMOS回路70がバツテリBからの高電圧ノ
イズの影響を受けてラツチアツプ現象を生じるこ
とはない。また、各検出スイツチs1,s2,…,so
をCMOS回路70の第1、第2、…、第nの入
力端子にそれぞれ接続する各接続導線に上述した
低エネルギーを有する高電圧ノイズズが乗つて
も、これら高電圧ノイズが各抵抗b1,b2,…,bo
により減少されるので、CMOS回路70がラツ
チアツプ現象を生じることはない。このようなこ
とは、低エネルギーを有する高電圧ノイズ、高エ
ネルギーの抑制された高電圧ノイズ、及び各抵抗
c1,c2,…,又はcoの分圧電圧が共に重畳されて
も同様である。また、各検出スイツチs1,s2
…,soの開閉作動により安定化電源回路60から
の流出電流に大きな変動が生じても、マイクロコ
ンピユータ40及びCMOS回路70が、共に、
補助安定化電源回路60とは別の主安定化電源回
路50から給電されているので、主安定化電源回
路50からの定電圧が容量不足により変動するこ
とはなく、マイクロコンピユータ40及び
CMOS回路70の適正な入力信号レベル変換作
動状態を常に維持し得る。なお、バツテリBと補
助安定化電源回路60との間の接続導線に高周波
ノイズが乗つても、コンデンサ64,65が当該
高周波ノイズを吸収するので、CMOS回路70
のラツチアツプ現象発生の原因となることはな
い。
Furthermore, even if high voltage noise with high energy from the battery B is placed on the connecting conductor between the battery B and the auxiliary stabilizing power supply circuit 60, this high voltage noise is transmitted to the power transistor 61 of the auxiliary stabilizing power supply circuit 60, Zener diode 62 and resistor 63
The thus reduced high voltage noise is reduced by the cooperative action of the auxiliary stabilizing power supply circuit 60.
Even if a constant voltage is applied to each resistor b 1 , b 2 , ..., b o of the CMOS circuit 70, the first, second, ...,
The voltage applied to the n-th input terminal is applied to each resistor b 1 , b 2 ,
Due to the action of ..., b o , the constant voltage applied to the power supply terminal of the CMOS circuit 70 will never be higher than the constant voltage, and as a result, the CMOS circuit 70 will not be affected by high voltage noise from battery B and will not cause a latch-up phenomenon. . In addition, each detection switch s 1 , s 2 ,..., s o
Even if the above-mentioned high-voltage noises having low energy are applied to the connecting conductors that connect to the first, second , . b 2 ,…, b o
Therefore, the CMOS circuit 70 does not cause a latch-up phenomenon. Such things include high voltage noise with low energy, suppressed high voltage noise with high energy, and each resistance
The same holds true even if the divided voltages of c 1 , c 2 , . . . , or c o are superimposed together. In addition, each detection switch s 1 , s 2 ,
..., even if large fluctuations occur in the outflow current from the stabilized power supply circuit 60 due to the opening and closing operations of the microcomputer 40 and the CMOS circuit 70,
Since power is supplied from the main stabilized power supply circuit 50 that is separate from the auxiliary stabilized power supply circuit 60, the constant voltage from the main stabilized power supply circuit 50 will not fluctuate due to insufficient capacity, and the microcomputer 40 and
A proper input signal level conversion operating state of the CMOS circuit 70 can be maintained at all times. Note that even if high-frequency noise is applied to the connecting conductor between battery B and the auxiliary stabilizing power supply circuit 60, the capacitors 64 and 65 absorb the high-frequency noise, so that the CMOS circuit 70
This will not cause the latch-up phenomenon.

また、本発明の実施にあたつては、例えば、各
抵抗c1,c2,…,coをその各一端にて接地すると
ともにその各他端にて各一対の抵抗a1,b1;a2
b2;…;ao,boの共通接続端に接続しても前記実
施例と同様の作用効果を達成し得る。
Further, in implementing the present invention, for example, each resistor c 1 , c 2 , ..., c o is grounded at one end thereof, and each pair of resistors a 1 , b 1 is connected at each other end. ;a 2 ,
Even if it is connected to the common connection end of b 2 ;...; a o and b o , the same effect as in the embodiment described above can be achieved.

【図面の簡単な説明】[Brief explanation of drawings]

第1〜第3図は、それぞれ、車両用電子制御装
置に採用された従来の入力回路のブロツク図、及
び第4図は、本発明に係る入力回路を示すブロツ
ク図である。 符号の説明、40……マイクロコンピユータ、
50……主安定化電源回路、60……補助安定化
電源回路、70……CMOS回路、B……バツテ
リ、a1〜ao,b1〜bo,c1〜co……抵抗、s1〜so
…検出スイツチ。
1 to 3 are block diagrams of a conventional input circuit employed in a vehicle electronic control device, and FIG. 4 is a block diagram showing an input circuit according to the present invention. Explanation of symbols, 40...Microcomputer,
50...Main stabilized power supply circuit, 60...Auxiliary stabilized power supply circuit, 70...CMOS circuit, B...Battery, a1 ~ ao , b1 ~ bo , c1 ~ co ...resistance, s 1 ~ s o
...detection switch.

Claims (1)

【特許請求の範囲】[Claims] 1 マイクロコンピユータと、少なくとも第1及
び第2の検出器とを備えた車両用電子制御装置に
おいて、前記マイクロコンピユータに接続される
CMOS回路と、直流電源から直流電圧を付与さ
れたとき前記マイクロコンピユータ及びCMOS
回路の各許容電源電圧を第1定電圧として発生し
当該マイクロコンピユータ及びCMOS回路の各
電源端子に付与する第1安定化電源回路と、前記
直流電源から直流電圧を付与されたときこの直流
電圧より低く前記第1定電圧より高い第2定電圧
を生じる第2安定化電源回路と、この第2安定化
電源回路、前記第1検出器及び前記CMOS回路
の第1信号入力端子の間に接続した第1接続導線
中に介装されて前記第2安定化電源回路から前記
第1検出器への電流の付与を許容するとともに前
記第1接続導線に乗る高電圧ノイズを減少させつ
つ前記第2定電圧を前記第1定電圧より低い電圧
に分圧して前記CMOS回路の第1入力端子に付
与する第1抵抗回路と、前記第2安定化電源回
路、前記第2検出器及び前記CMOS回路の第2
信号入力端子の間に接続した第2接続導線中に介
装されて前記第2安定化電源回路から前記第2検
出器への電流の付与を許容するとともに前記第2
接続導線に乗る高電圧ノイズを減少させつつ前記
第2定電圧を前記第1定電圧より低い電圧に分圧
して前記CMOS回路の第2入力端子に付与する
第2抵抗回路とを設けたことを特徴とする車両用
電子制御装置のための入力回路。
1. A vehicle electronic control device comprising a microcomputer and at least first and second detectors, which is connected to the microcomputer.
CMOS circuit, and when DC voltage is applied from a DC power supply, the microcomputer and CMOS
A first stabilized power supply circuit that generates each allowable power supply voltage of the circuit as a first constant voltage and applies it to each power supply terminal of the microcomputer and CMOS circuit; A second stabilized power supply circuit that generates a second constant voltage that is lower and higher than the first constant voltage, and a second stabilized power supply circuit that is connected between the second stabilized power supply circuit, the first detector, and a first signal input terminal of the CMOS circuit. The second stabilizing power supply circuit is interposed in the first connecting conductor to allow current to be applied from the second stabilized power supply circuit to the first detector, and reduces high voltage noise on the first connecting conductor. a first resistor circuit that divides a voltage into a voltage lower than the first constant voltage and applies it to a first input terminal of the CMOS circuit, the second stabilized power supply circuit, the second detector, and the first resistor circuit of the CMOS circuit; 2
The second connecting conductor is interposed in a second connecting conductor connected between the signal input terminals to allow current to be applied from the second stabilized power supply circuit to the second detector.
and a second resistor circuit that divides the second constant voltage to a voltage lower than the first constant voltage and applies it to the second input terminal of the CMOS circuit while reducing high voltage noise on the connecting conductor. An input circuit for a featured vehicle electronic control device.
JP58140769A 1983-08-01 1983-08-01 Input circuit for electronic controller for vehicle Granted JPS6032525A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58140769A JPS6032525A (en) 1983-08-01 1983-08-01 Input circuit for electronic controller for vehicle

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58140769A JPS6032525A (en) 1983-08-01 1983-08-01 Input circuit for electronic controller for vehicle

Publications (2)

Publication Number Publication Date
JPS6032525A JPS6032525A (en) 1985-02-19
JPS648527B2 true JPS648527B2 (en) 1989-02-14

Family

ID=15276316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58140769A Granted JPS6032525A (en) 1983-08-01 1983-08-01 Input circuit for electronic controller for vehicle

Country Status (1)

Country Link
JP (1) JPS6032525A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57156826A (en) * 1981-03-23 1982-09-28 Hitachi Ltd Hydraulic pressing-down device for rolling mill
JPH0692738B2 (en) * 1985-01-23 1994-11-16 ヤマハ発動機株式会社 Engine intake system
JP2579611Y2 (en) * 1990-01-17 1998-08-27 株式会社ゼクセル Detector

Also Published As

Publication number Publication date
JPS6032525A (en) 1985-02-19

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