JPS648938B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital signal receiver such as a television text multiplex receiver, and particularly to a method for preventing data and a framing code signal sent prior to the data from becoming undetectable due to group delay distortion of the transmission path. The purpose is to prevent.

Teletext broadcasting is a digital transmission system for television receivers, and as is well known, this system is used to transmit signals within an appropriate 1H to several H (H: horizontal scanning period) within the vertical blanking period of the television broadcast signal. In this method, digital signals representing data such as characters and figures are inserted and transmitted.

FIG. 1 shows the 1H of the 20th H within the vertical blanking period in which character signals (data) are inserted in such a television character multiplexing system.
That is, during this 20th H period, the horizontal synchronizing signal HS
Color burst signal located on the back pouch of
A clock run-in signal CRI that starts a certain time after CG and consists of repeating “1” and “0”;
The 8-bit framing code signal FRC following this CRI signal and the next bit of this FRC signal
A data signal DA that continues until the end of 1H is inserted.

As mentioned above, the CRI signal is configured as a 16 or 18 bit signal consisting of repeating "1" and "0", and is used when creating a sampling pulse for extracting the data signal DA in the television receiver. This is the time standard for Also,
The FRC signal is an 8-bit code signal selected to provide a 1-bit error protection function, and serves as a time reference when the sampled data signal is converted into parallel data signals 8 bits at a time. It is. Since there are many possible code configurations for this FRC signal, it is only necessary to adopt an appropriate one among them. For example,
11100101 is adopted in NHK's C55 system, and
The British Teletext system uses 11100100, and the French Antéaupe system uses 11100111.

FIG. 2 shows a schematic configuration of the above-mentioned character multiplex signal receiver. That is, 1 is a circuit including a tuner in the receiver and a VIF (video intermediate frequency) detector;
2 is a gate circuit for character signal extraction that extracts 1H to several H of character multiplexed signals inserted from the VIF detection output, and 3 is a gate circuit for extracting the gate output to 1/2 of the amplitude.
This is a slicer circuit that converts the signal into a square wave by slicing it at the level of . Also, 4 is a sampling clock generation circuit that obtains the CRI signal in the output signal of this slicer circuit (Fig. 1) and generates a sampling clock, and 5 detects the FRC signal in the output signal of the slicer circuit. Create a timing pulse for every 8 bits of the data signal
FRC signal detection and timing pulse generation circuit, 6
samples and extracts a data signal from the output signal of the slicer circuit using the sampling pulse, and converts the sequentially extracted data signals into parallel signals of 8 bits at a time using the timing pulse. This is a serial/parallel conversion circuit. And 7 is each derived 8
A character signal processing circuit 8 digitally processes the bit signal so that it can be displayed at an appropriate position on the television screen;
superimposed on the television video signal from the picture tube 9.
This is the video circuit that supplies the

The receiver shown in Figure 2 is generally configured as described above, but the point to be noted here is that the connection between the modulator on the broadcasting station side and the output point A of circuit 1, which includes the tuner and VIF circuit in the receiver, is as follows. This is the overall group delay characteristic.
That is, in general, television receivers are selected so that the group delay characteristics of the tuner to VIF circuit are canceled out by the group delay characteristics of the transmitter side, but this is due to the high-frequency portion of the video signal band ( 3~4MHz band)
This is true only for the low frequency band (0 to 2 MHz band) of the video signal band, and is not necessarily taken into account. Therefore, the group delay characteristic at point A in Fig. 2, that is, the low-frequency part of the overall group delay characteristic including the transmitter side and the receiver side (hereinafter referred to as the low-frequency group delay characteristic), is shown in Fig. 3. In some cases, it is flat (a), and in other cases (b, c), it is slanted.
Determined by the group delay characteristics of each VIF circuit.

By the way, the bit rate of the above-mentioned character multiplex signal is 5.73Mb/2, for example, in the NHK C55 system.
It has been selected as s. Therefore, in the case of a signal that repeats "1" and "0" for each bit, such as the clock run-in (CRI) signal mentioned above, the repetition frequency is 1/2 of the bit rate, that is, approximately
This corresponds to 2.86MHz. This is a CRI
The signal is in the low range (0 to 0) of the group delay characteristic shown in Figure 3.
2MHz band).

On the other hand, the bit rate of the framing code (FRC) signal in the character multiplex signal is naturally 5.73 Mb/s.
It's getting old. However, this FRC signal is not a periodic repeating signal for each bit as described above. This means that the FRC signal contains relatively low frequency components (i.e., below 2 MHz), and therefore the FRC signal is affected by the low group delay characteristics shown in Figure 3. Become. That is,
Figure 4 A to E are the NHK-C55 method (FRC:
11100101), the observed waveforms of the CRI signal and FRC signal derived from the gate circuit 2 in Figure 2 are shown when the low-frequency delay amount DL in Figure 3 is varied. be. As can be seen from Fig. 4, as the low-frequency delay amount DL shown in Fig. 3 increases, the waveform distortion and phase distortion of the FRC signal increase.
The result was that the signal could not be accurately detected by circuit 5 in FIG.

Therefore, the present invention is designed to detect waveform distortion when it occurs in the FRC signal and correct the low frequency group delay characteristic of the transmission path within the receiver.The details will be explained below.

FIG. 6 shows a schematic configuration of a character multiplex receiver according to the present invention, and the same functional blocks as those in FIG. 2 are given the same figure numbers and their explanation will be omitted.
This particular feature is characterized by the addition of the following circuit blocks. That is, a group delay characteristic correction circuit 10 is connected to a relay 11 between a circuit 1 including a tuner to a VIF detector and a gate circuit 2 for character signal extraction.
selectively connected to and separated from each other by
a peak detection circuit 12 into which the output signal from the gate circuit 2 is introduced; a low-pass filter/comparison circuit 13 which smoothes the output and then compares it with a constant voltage;
This is because a determination control circuit 15 consisting of a flip-flop circuit 14 whose output is used as a reset input is provided, and the relay 11 is switched by this circuit 15 .

Here, the group delay characteristic correction circuit 10 is provided to correct the slope of the group delay characteristic at point A in FIG. 6, and is composed of, for example, a suitable LC filter. The reason why we decided to make them approach and separate from each other is as follows. That is, as mentioned above,
Even if the low frequency group delay characteristic of circuit 1 in the receiver is uniform for the broadcast signal of each channel, if the low frequency group delay characteristic of the modulator on the broadcasting station side of each channel is different. For example, the overall group delay characteristic at point A becomes flat for a certain channel as shown in Figure 3 a, and slopes for other channels as shown in Figure 3 b or c. I will have it.
Therefore, when receiving the latter channel,
The slope of the overall low-frequency group delay characteristic at point B in FIG. 6 is made flat or sufficiently slow.
Therefore, for example, when two channels whose overall group delay characteristics at point A are a and b in FIG. 3 are targeted, the group delay characteristic correction circuit 1
0 must be constructed as a phase advance circuit that cancels out the characteristics shown in FIG. 3b.

On the other hand, the determination control circuit 15 specifically
It is configured as shown in the figure. That is, the peak detection circuit 12 consists of a diode _D1 , a capacitor _C1 , and a resistor _R1 connected to the output signal path of the gate circuit 2 for character signal extraction, and the low-pass filter/comparison circuit 13 consists of comparators _CP1 , CP. ₂ and capacitor C ₂
and resistors R ₂ , R ₃ , etc. Also,
OSC is a low frequency oscillator of several Hz to several tens of Hz,
This functions as a clock signal source for the JK flip-flop FF of the T flip-flop operation type that constitutes the flip-flop circuit 14 of FIG. 66. Furthermore, DR is a relay drive circuit that controls the relay 11 in response to the output of the flip-flop FF.

In the judgment control circuit 15 shown in FIG. 7, two stages of comparators CP ₁ and CP ₂ are connected in series, and a capacitor C ₂ for a low-pass filter and a resistor R ₃ are connected between them.
The reason why this is connected is to compensate for the time constant of the peak detection circuit 12.

Now, in FIG. 7, when teletext is not being received, the output of the peak detection circuit 12 is at a low level, so the comparators CP ₁ ,
Each output of CP ₂ (FIG. 7 B, D) is also at a low level, while the JK flip-flop FF is in a reset state by an initial clear (not shown) when the power is turned on. Therefore, even if the clock pulse from the low frequency oscillator OSC is supplied,
The state of the above flip-flop FF does not change,
Since its output (FIG. 7C) is maintained at a high level, relay 11 is not driven and its contacts are held in the position shown. For this reason, the sixth
The group delay characteristic correction circuit 10 shown in the figure is not connected between the circuits 1 and 2.

In such a situation, if a teletext channel with a relatively large low-frequency group delay DL, that is, a teletext channel whose group delay characteristic at point A is as shown in Fig. 3b, is received, then the image shown in Fig. 4 is received. As shown in FIG. 5, the peak level of the positive peak of the FRC signal increases, and the peak level increases as the group delay amount DL increases (see FIG. 5). Therefore, in this case, the output of the peak detection circuit 12 (FIG. 8A)
becomes high level, which causes the comparator
The respective outputs of CP ₁ and CP ₂ (B and C in the figure) become high level. For this reason, flip-flop
FF is the output pulse of the low frequency oscillator OSC (Figure 4)
Since the output (FIG. 6) becomes low level, the relay 11 is driven and the contact piece is switched to the opposite position as shown in the figure, and therefore the group delay characteristic correction circuit 10 of FIG. will be connected between circuits 1 and 2.

When the group delay characteristic correction circuit 10 is connected in this manner, the low frequency group delay characteristic at point B for the teletext channel described above becomes flat or sufficiently slow. Therefore, the waveform distortion of the FRC signal is corrected, and the peak level of its positive peak is lowered. As a result, the output A of the peak detection circuit 12 becomes low level, thereby causing the comparators CP ₁ and CP ₂
Since the outputs A and C of the flip-flop FF also become low level, the flip-flop FF does not invert even if the output pulse of the low frequency oscillator OSC is supplied, and therefore the relay 11
continues in the above state. Therefore, the FRC signal detection operation is performed accurately.

In addition, when receiving a teletext channel in which the low frequency group delay characteristic at point A is as shown in FIG. Conversely, the group delay characteristic is as shown in FIG. 3C. Therefore, in this case as well,
Since the FRC signal is subjected to waveform distortion, the output of the peak detection circuit 12 becomes high level, and the relay 11
is switched again to the state shown in the figure, and the FRC signal is accurately detected.

Up to now, we have explained the case of a teletext channel where the overall low-frequency group delay characteristic at point A in FIG. 6 is a or b in FIG. There may also be teletext channels, so in such a case, you can do the following. That is, by providing a plurality of group delay characteristic correction circuits each having a phase lead characteristic and a phase lag characteristic, and by using a rotary relay driven by the output of the flip-flop FF shown in FIG. The circuits may be sequentially switched and connected between points A and B in FIG. 6, and the switching operation may be stopped when a particular one of the correction circuits is connected.

In addition, although the above explanation was given as detecting changes in the peak level of the FRC signal, a data signal is derived from the gate circuit for character signal extraction following the FRC signal, and this data signal also has a low level like the FRC signal. Since the data signal is subject to waveform distortion due to group delay characteristics, changes in the peak level of this data signal are also detected at the same time.

Furthermore, the present invention is not limited to the above-mentioned television text multiplex receiver, but can be applied to any device that generally receives a data signal following an FRC (framing code) signal.

As explained above, the digital signal receiver of the present invention detects the waveform distortion of the FRC signal and changes the group delay characteristic of the transmission path within the receiver, thereby correcting the waveform distortion. There is an advantage that FRC signals and data signals can always be detected accurately and reliably.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the structure of a television text multiplex signal.
FIG. 2 is a diagram showing the schematic configuration of the main parts of a conventional receiver.
Figure 3 shows the overall group delay characteristics from the transmitter side to the receiver side, and Figure 4 shows the group delay characteristics detected within the receiver.
FIG. 5 is a diagram showing the observed waveforms of the CRI signal and FRC signal, FIG. 5 is a diagram showing the relationship between the low frequency delay amount DL in FIG. 3 and the amplitude of the FRC signal, and FIG. 6 is a diagram showing the schematic configuration of the receiver according to the present invention. FIG. 7 is a diagram showing a specific circuit example of the main part, and FIG. 8 is an operation waveform diagram of each part. 1: Circuit including tuner to VIF detector,
2: Gate circuit for character signal extraction, 3: Slicer circuit, 4: Sampling clock creation circuit,
5: FRC signal detection and timing pulse generation circuit,
6: Serial/parallel conversion circuit, 7: Character signal processing circuit, 8: Video circuit, 10: Group delay characteristic correction circuit,
12: Peak detection circuit, 13: Low-pass filter/comparison circuit, 14: Flip-flop circuit.

Claims (1)

[Claims] 1. A receiver that receives a digital signal of the type in which a clock run-in signal that determines data sampling timing and a framing code signal that determines parallel conversion timing of sampled data are sent sequentially prior to data. By identifying the magnitude of the peak level of the received and demodulated framing code signal or the magnitude of the peak level of the data signal, the transmission path from the broadcasting station side to the output end of the demodulation circuit in the receiver can be determined. a detection circuit for detecting transmission distortion of the framing code signal and data signal due to group delay characteristics; and a detection circuit provided in a transmission path before the demodulation circuit in the receiver and operated in response to the output of the detection circuit. and a group delay characteristic correction circuit that corrects the group delay characteristic at the output end of the demodulation circuit by correcting the transmission distortion.