JPH0113212B2 - - Google Patents
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- Publication number
- JPH0113212B2 JPH0113212B2 JP56058724A JP5872481A JPH0113212B2 JP H0113212 B2 JPH0113212 B2 JP H0113212B2 JP 56058724 A JP56058724 A JP 56058724A JP 5872481 A JP5872481 A JP 5872481A JP H0113212 B2 JPH0113212 B2 JP H0113212B2
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- Prior art keywords
- temperature
- substrate temperature
- indium
- substrate
- insb
- Prior art date
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
- H10P14/3422—Antimonides
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- Hall/Mr Elements (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Description
本発明はインジウムアンチモン系複合結晶半導
体の製造法に関するもので、更に詳しくはインジ
ウムアンチモン化合物結晶とインジウム単体結晶
から成る、向上した電気特性を有するインジウム
アンチモン系複合結晶半導体の製造法に関するも
のである。
インジウムアンチモン(以下InSbと略記する)
化合物の結晶薄膜は極めて高い移動度を有し、他
の化合物半導体、例えばインジウムヒ素やカリウ
ムヒ素に比べてはるかに優れた磁電変換効率を有
するので、ホール素子や磁気抵抗効果素子の素材
として好適であることが知られている。また、最
近は特にダイレクトドライブモーター用の位置検
出装置、あるいはVTRや音響機器などの部品と
して電子産業分野で注目されるようになつた。
しかして、InSbは―族化合物半導体とし
てよく知られた物質であり、ホール素子や磁気抵
抗効果素子として利用するには、インジウム元素
(In)のアンチモン元素(Sb)に対する原子比が
1.00の結晶であることが必要不可欠の条件であ
り、かかる条件の場合にその特性が高度に発揮さ
れると考えられてきたため、かかる考えに立脚し
て多くの研究がなされてきた。
例えば、ホール効果を考えるときは、ホール係
数RHとホール移動度μHとが重要なパラメーター
となる。ここで第1図のパターンに示すように、
InSb薄膜をパターニング及び電極付けを行なつ
て測定サンプルとし、金めつきされた電極a,
a′を入力電極、電極b,b′を出力電極として設
け、入力電極を定電流電源Iに接続したときの出
力電極間に生じる電圧をVHiとし、入力電極を定
電圧電源Vに接続したときの出力電極間に生じた
電圧をVHvとすると、VHiとVHvとはそれぞれ次式
で与えられる。ただし、第1図においてlはパタ
ーンの長さ、Wはパターンの幅であり、式中のt
は試料の膜厚である。
VHi=RHBI/t・f (1)
VHv=μHBV・W/l・f (2)
上式(1),(2)において、Bは印加される外部磁場
の磁束密度、Iは試料に流される電流でVは試料
に印加される電圧、fは試料の形状因子である。
またRHは試料のホール係数であり、μHは試料の
ホール移動度である。式(1)からわかるように、出
力電圧は電流の流れる材料の厚さに反比例するも
ので、高感度のホール素子や磁気抵抗効果素子を
作るに当つては薄膜を用いた方がよいことが明ら
かである。
しかし、本発明者らは、先にInとSbの原子比
が厳密に1対1に制御された場合のみ優れた素子
が得られるのではなく、Inが過剰の場合にも、特
にInのSbに対する原子比が1.1〜1.7の範囲にある
ならば結晶性に優れ、しかも高い移動度を示す複
合結晶が得られるという従来の技術概念からは到
底予測し得ない新事実を見出し提案した。かかる
新しい知見に基く優れたInSb系複合結晶薄膜は、
InとSbとを、Sb対Inの到達速度比(アライバ
ル・レート・レシヨ以下AIn/ASbと略記する)
が1:1.1〜1:1.7の条件下に基板上に蒸着させ
ることにより製造することができ、実質的に
InSb化合物結晶とIn単体結晶から成る複合結晶
として得られる。この製造は、従来のAIn/ASb
が1.00のInSb化合物結晶の製造に比べて工業的に
はるかに容易であり、組成及び特性のバラツキの
極めて少ない薄膜を容易に制御し製造し得る点で
優れている。
従来、InSbの如き化合物半導体は、周期律表
のb族元素とVb族元素の原子比が前記のよう
に1:1になつていることが必須の条件と考えら
れてきた。かかる基本概念に基いてInSb化合物
結晶を製造する方法が提案された。例えば比較的
簡単な方法としてギユンサー氏(K.G.Gunther)
によつて提案された、いわゆる三温度法(米国特
許第3172778号明細書)がある。この三温度法は
AIn/ASbを1.0以下に調整するとともに基板温
度をInSbの分解温度より高くすることによつて、
InとSbの原子比が1:1の化合物結晶薄膜を成
させる好都合なものである。
しかし、本発明者らが先に提案したAIn/ASb
を1.1〜1.7の範囲内に保つてInSb化合物複合結晶
半導体を製造する方法においては、Inが過剰のた
め、上記三温法における基板温度を分解温度より
高く設定する方法は本質的に適用できないことを
知つた。もしAIn/ASbが1.1〜1.7の条件下に基
板温度をInSb化合物半導体の分解温度より高く
設定して蒸着を強行するときは、無光沢、不均質
で穴のあいた膜しか得られず、特に重要な移動度
が10000cm2/Vsec以下の膜しか得られない。
本発明者らは、上記の知見に基づいて、先に提
案したInSb複合結晶半導体の、特に一層向上し
た移動度を示す改善された製造法についてさらに
研究を進めた結果、蒸着系の減圧圧力に関連して
基板の温度をある条件のもとに設定するときより
移動度の高い優れた複合結晶半導体が得られるこ
とを見出した。
すなわち本発明は、InとSbとを、Sb対Inの到
達速度比(AIn/ASb)が1:1.1〜1:1.7とな
る条件下で蒸着させるに際し、蒸着初期の基板温
度を、下記式;
1/T=9.98×10-4−5.66×10-5IogP (3)
〔ここに、Tは極限の基板温度(絶対温度)、
Pは蒸着中の真空度(Torr)である〕
で与えられる極限の基板温度よりも低い温度に設
定することを特徴とするInSb化合物結晶とIn単
体結晶から成るInSb複合結晶半導体の製造法を
提供する。
上記式(3)で与えられる極限の基板温度Tは、後
述するように、InSb化合物結晶の分解温度に相
当するもので、実際には蒸着初期の設定温度は、
この分解温度よりも少なくとも20℃低い温度とす
ることが望ましいこともわかつた。しかし設定さ
れた蒸着初期の基板温度は、薄膜形成時には温度
が上昇するが、InSbのmpである約530℃を上限
として、この温度より低い温度にコントロールさ
れねばならない。かかるコントロールは得られる
薄膜のひずみやぜい性を考慮するならば連続的か
つ均一速度の上昇とすることが好ましい。
本発明の方法において極限の基板温度とは、前
記式(3)で与えられるように、真空度に依存する温
度であつて、単位飛量(ボートから飛んだInと
Sbの量)当りの単位面積についての基板への付
着量が急激に小さくなる温度である。従つて、あ
る真空度で付着量/飛量の値が急に小さくなる基
板温度と定義することができる。
本発明者らは、かかる極限の基板温度と真空度
との関係について検討したところ第2図に示す結
果が得られた。第2図は縦軸に圧(10gP)を横
軸に基板温度の逆数をとつてあり、図中1は式(3)
で与えられる理論分解線、2,2′,2″は真空度
を変えた実験で得られた点で、それらの各実験点
はほぼ理論分解線にのつていることが一見して明
らかである。この実験点はリヒター氏らのInSb
の熱データ〔トランス・メタラージカル・ソサイ
エテイ(Trans.Metallurgical SOC.AIAE245,
99′69)〕及びストル氏らの元素の熱データ〔サー
モダイナミツク・プロパテイーズ・オブ・ザ・エ
レメンツ(Themodynamic Properties of the
Elements ACS′56)〕を用いて計算したInSbの分
解圧の理論曲線(式(3)に近似)とよく一致するこ
とがわかつた。すなわち蒸着中の真空度を固定し
た場合、その極限の基板温度は分解温度にほぼ相
当している。
本発明の方法においては、Sbに対するInの到
達速度比を1.1〜1.7となる条件で、InとSbを蒸着
させるが、好ましい該速度比は1.2〜1.5である。
また、蒸着させる蒸発源としては単体のInと
Sbを用いるのが極めて好ましいが、飛量の比に
対応するAIn/ASbが1.1〜1.7になるように、ボ
ートへのパワーを制御すればよい。従つて、例え
ばSb源としてSb含有化合物例えばInSbやGaSb等
を使用することもできる。またInやGaはSbに比
べて蒸気圧が極めて小さいから、これらの化合物
をSb源として充分利用することができる。
また、本発明の方法において用いられる基板
は、特に素材に関しては何ら限定されないが、絶
縁性を有し且つ結晶性であることが好ましい。か
かる物質としてはサフアイア、CaF2,NaCl、雲
母及びCrやCr―Oドープの半絶縁性GaAs等があ
り、これらは本発明の方法における基板として好
都合に使用できる。しかして基板としては汚染や
欠陥の少ないへき開面を出す必要があること及び
該面を出すための研摩やエツチング等のはん雑な
作業を考慮すれば雲母が特に好ましく、工業的に
も極めて有利である。
本発明の方法を実施する手段は、本発明の要旨
を逸脱しない限り如何なる方法を用いることもで
き、例えば通常の蒸着法(ヒーター加熱、EB加
熱、フラツシユ蒸着等)、スパツタ、MBE、イオ
ンビーム法等が有利に利用できる。また薄膜形成
速度は、例えば0.1〜1000Å/secの広範囲のもの
が適用できるが、AIn/ASbの制御のし易さ及び
製品の品質を含む工業的価値を考慮するときは1
〜10Å/secが特に好ましい。
以下具体例により本発明を一層詳細に説明す
る。
実施例 1
基板として雲母を、また装置には6枚のウエハ
ーが設置できる同心円周上に回転する基板ホルダ
ーを有する真空蒸着装置を使用した。基板温度は
ウエハー上10m/mの所に設けられたPt―Rdサ
ーモカツプルで検知され、また、別別のサーモカ
ツプルを制御上に設けた。検知された基板温度は
実際の基板温度とは異なるため、無回転の場合で
補正した。本発明にいう基板温度はかかる補正済
みの基板温度である。原料In,Sbは共にフルウ
チ化学社製6―Nのものを用いた。
真空度を1×10-6Torr、基板温度をまず380℃
に設定し、AIn/ASbが1.45になるようにInとSb
を飛ばし、30分間で厚み1.1μの蒸着膜を得た。そ
の間基板温度を460℃まで上昇しつつ蒸着した。
6枚のウエハーを第1図のようにパターニング
して特性を測定したところ、移動度は22500〜
24000cm2/Vsecであり、ホール係数も380〜400
cm3/Cと高いものであつた。また全ての膜は非常
に光沢があつた。
実施例 2
基板温度を420℃一定にする以外は、実施例1
と同様に蒸着したところ、移動度は16000〜18000
cm2/Vsecであり、ホール係数は270〜280cm3/C
であつた。
比較例 1
基板温度を480℃と極限の基板温度を超えて設
定し、他は実施例1と同様に操作した。得られた
膜の移動度は平均3000cm2/Vsecであり、ホール
係数は230〜250cm3/Cであつた。またこの場合に
は無光沢な膜でありかつ不平衡電圧が大きかつ
た。
実施例 3〜5
実施例1において、到達速度比AIn/ASbを
1.15,1.3及び1.6とした場合に得られたものにつ
いて移動度を測定した。その結果を下表に示す。
The present invention relates to a method for manufacturing an indium antimony-based composite crystal semiconductor, and more specifically, to a method for manufacturing an indium antimony-based composite crystal semiconductor having improved electrical properties, which is composed of an indium antimony compound crystal and an indium single crystal. Indium antimony (hereinafter abbreviated as InSb)
Compound crystalline thin films have extremely high mobility and far superior magnetoelectric conversion efficiency compared to other compound semiconductors, such as indium arsenide and potassium arsenide, so they are suitable as materials for Hall elements and magnetoresistive elements. It is known that there is. Recently, it has also gained attention in the electronics industry, especially as a position detection device for direct drive motors, and as a component for VTRs and audio equipment. InSb is a well-known substance as a - group compound semiconductor, and in order to be used as a Hall element or magnetoresistive element, the atomic ratio of indium element (In) to antimony element (Sb) is required.
1.00 crystal is an essential condition, and it has been thought that the properties are highly exhibited under such conditions, and many studies have been conducted based on this idea. For example, when considering the Hall effect, the Hall coefficient R H and the Hall mobility μ H are important parameters. Here, as shown in the pattern in Figure 1,
The InSb thin film was patterned and electrodes were attached as a measurement sample, and gold-plated electrodes a,
A′ is provided as an input electrode, electrodes b and b′ are provided as output electrodes, the voltage generated between the output electrodes when the input electrode is connected to a constant current power source I is V Hi , and the input electrode is connected to a constant voltage power source V. If the voltage generated between the output electrodes at this time is V Hv , V Hi and V Hv are given by the following equations. However, in Fig. 1, l is the length of the pattern, W is the width of the pattern, and t in the formula
is the film thickness of the sample. V Hi = R H BI/t・f (1) V Hv = μ H BV・W/l・f (2) In the above equations (1) and (2), B is the magnetic flux density of the applied external magnetic field, I is the current applied to the sample, V is the voltage applied to the sample, and f is the shape factor of the sample.
Further, R H is the Hall coefficient of the sample, and μ H is the Hall mobility of the sample. As can be seen from equation (1), the output voltage is inversely proportional to the thickness of the material through which the current flows, and it is better to use thin films when creating highly sensitive Hall elements and magnetoresistive elements. it is obvious. However, the present inventors have discovered that excellent devices are not obtained only when the atomic ratio of In and Sb is strictly controlled to 1:1, but also when In is in excess, especially when the Sb of In We found and proposed a new fact that could not have been predicted from conventional technical concepts: a composite crystal with excellent crystallinity and high mobility can be obtained if the atomic ratio is in the range of 1.1 to 1.7. The superior InSb-based composite crystal thin film based on this new knowledge is
In and Sb are the arrival speed ratio of Sb to In (arrival rate ratio, abbreviated as AIn/ASb)
can be produced by vapor deposition on a substrate under conditions of 1:1.1 to 1:1.7, and substantially
Obtained as a composite crystal consisting of InSb compound crystal and In single crystal. This manufacturing is similar to conventional AIn/ASb
It is industrially much easier to produce than InSb compound crystals with a value of 1.00, and is superior in that thin films with very little variation in composition and properties can be easily controlled and produced. Conventionally, it has been thought that the essential condition for compound semiconductors such as InSb is that the atomic ratio of group B elements and group Vb elements in the periodic table be 1:1 as described above. A method for producing InSb compound crystals was proposed based on this basic concept. For example, as a relatively simple method, Mr. KGGunther (KGGunther)
There is a so-called three-temperature method proposed by (U.S. Pat. No. 3,172,778). This three temperature method
By adjusting AIn/ASb to 1.0 or less and raising the substrate temperature higher than the decomposition temperature of InSb,
This is convenient for forming a compound crystal thin film with an atomic ratio of In and Sb of 1:1. However, AIn/ASb, which was proposed earlier by the present inventors,
In the method of manufacturing an InSb compound composite crystal semiconductor by keeping the temperature within the range of 1.1 to 1.7, the method of setting the substrate temperature higher than the decomposition temperature in the three-temperature method described above is essentially inapplicable due to excess In. I learned. If the substrate temperature is set higher than the decomposition temperature of the InSb compound semiconductor and the deposition is forced under the condition of AIn/ASb of 1.1 to 1.7, only a matte, non-uniform, and porous film will be obtained, which is especially important. Only films with a mobility of 10,000 cm 2 /Vsec or less can be obtained. Based on the above findings, the present inventors conducted further research on an improved manufacturing method for the previously proposed InSb composite crystal semiconductor that exhibits particularly improved mobility. Relatedly, we have found that an excellent composite crystal semiconductor with higher mobility can be obtained when the temperature of the substrate is set under certain conditions. That is, in the present invention, when depositing In and Sb under conditions where the attained velocity ratio of Sb to In (AIn/ASb) is 1:1.1 to 1:1.7, the substrate temperature at the initial stage of deposition is determined by the following formula; 1/T=9.98×10 -4 −5.66×10 -5 IogP (3) [Here, T is the ultimate substrate temperature (absolute temperature),
P is the degree of vacuum during deposition (Torr)] Provides a method for manufacturing an InSb composite crystal semiconductor consisting of an InSb compound crystal and an In single crystal, characterized in that the temperature is set lower than the ultimate substrate temperature given by do. The ultimate substrate temperature T given by the above formula (3) corresponds to the decomposition temperature of the InSb compound crystal, as described later, and in reality, the set temperature at the initial stage of vapor deposition is
It has also been found that it is desirable to set the temperature at least 20°C lower than this decomposition temperature. However, the substrate temperature set at the initial stage of vapor deposition must be controlled to a temperature lower than the upper limit of about 530° C., which is the MP of InSb, although the temperature rises during thin film formation. In consideration of the strain and brittleness of the resulting thin film, it is preferable for such control to be a continuous and uniform rate increase. In the method of the present invention, the ultimate substrate temperature is a temperature that depends on the degree of vacuum, as given by the above equation (3), and is a temperature that depends on the degree of vacuum (In
This is the temperature at which the amount of Sb attached to the substrate per unit area rapidly decreases. Therefore, it can be defined as the substrate temperature at which the value of adhesion amount/flying amount suddenly decreases at a certain degree of vacuum. The present inventors investigated the relationship between the extreme substrate temperature and the degree of vacuum and obtained the results shown in FIG. 2. In Figure 2, the vertical axis shows the pressure (10gP) and the horizontal axis shows the reciprocal of the substrate temperature, and 1 in the figure is based on equation (3).
The theoretical decomposition lines 2, 2', and 2'' given by are the points obtained in experiments with varying degrees of vacuum, and it is clear at first glance that each of these experimental points is almost on the theoretical decomposition line. .This experimental point is the InSb of Richter et al.
Thermal data [Trans.Metallurgical SOC.AIAE 24 5,
99'69)] and the thermal data of the elements by Stoll et al. [Thermodynamic Properties of the Elements]
It was found that the curve matches well with the theoretical curve of the decomposition pressure of InSb (approximated to Equation (3)) calculated using Elements ACS'56)]. That is, when the degree of vacuum during vapor deposition is fixed, the ultimate substrate temperature approximately corresponds to the decomposition temperature. In the method of the present invention, In and Sb are deposited under conditions such that the attained speed ratio of In to Sb is 1.1 to 1.7, and the preferable speed ratio is 1.2 to 1.5. In addition, as the evaporation source for vapor deposition, single In and
Although it is extremely preferable to use Sb, the power to the boat may be controlled so that AIn/ASb, which corresponds to the ratio of flight distance, is 1.1 to 1.7. Therefore, for example, Sb-containing compounds such as InSb and GaSb can also be used as the Sb source. Furthermore, since In and Ga have extremely low vapor pressures compared to Sb, these compounds can be fully utilized as Sb sources. Further, the substrate used in the method of the present invention is not particularly limited in terms of material, but it is preferably insulating and crystalline. Such materials include sapphire, CaF 2 , NaCl, mica and semi-insulating GaAs doped with Cr or Cr--O, which can be advantageously used as substrates in the method of the invention. However, considering the need to produce cleavage planes with less contamination and defects and the complicated operations such as polishing and etching required to produce such planes, mica is particularly preferable as a substrate, and is extremely advantageous from an industrial perspective. It is. Any method can be used to carry out the method of the present invention as long as it does not depart from the gist of the present invention, such as ordinary vapor deposition methods (heater heating, EB heating, flash vapor deposition, etc.), sputtering, MBE, and ion beam methods. etc. can be used to advantage. In addition, a wide range of thin film formation speeds, for example 0.1 to 1000 Å/sec, can be applied, but when considering the industrial value including ease of control of AIn/ASb and product quality,
~10 Å/sec is particularly preferred. The present invention will be explained in more detail below using specific examples. Example 1 Mica was used as a substrate, and a vacuum evaporation apparatus was used, which had a concentrically rotating substrate holder on which six wafers could be placed. The substrate temperature was sensed by a Pt--Rd thermocouple placed 10 m/m above the wafer, and another thermocouple was placed on the control. Since the detected substrate temperature differs from the actual substrate temperature, it was corrected for the case of no rotation. The substrate temperature referred to in the present invention is such a corrected substrate temperature. Both In and Sb used as raw materials were 6-N manufactured by Furuuchi Chemical Co., Ltd. The degree of vacuum is 1×10 -6 Torr, and the substrate temperature is 380℃.
and set In and Sb so that AIn/ASb is 1.45.
was removed, and a deposited film with a thickness of 1.1μ was obtained in 30 minutes. During the deposition, the substrate temperature was raised to 460°C. When we patterned six wafers as shown in Figure 1 and measured their characteristics, we found that the mobility was 22,500 ~
24000cm 2 /Vsec, and the Hall coefficient is 380-400
It was as high as cm 3 /C. All films were also very shiny. Example 2 Example 1 except that the substrate temperature was kept constant at 420°C.
When deposited in the same manner as above, the mobility was 16,000 to 18,000
cm 2 /Vsec, and the Hall coefficient is 270 to 280 cm 3 /C.
It was hot. Comparative Example 1 The substrate temperature was set at 480° C., which exceeds the ultimate substrate temperature, and the other operations were the same as in Example 1. The resulting film had an average mobility of 3000 cm 2 /Vsec and a Hall coefficient of 230 to 250 cm 3 /C. Further, in this case, the film was matte and the unbalanced voltage was large. Examples 3 to 5 In Example 1, the attained speed ratio AIn/ASb is
Mobility was measured for those obtained when the values were set to 1.15, 1.3, and 1.6. The results are shown in the table below.
【表】
比較例 2
実施例1において、AIn/ASbが0.9と1.8の場
合には、移動度は10000cm2/Vsecよりずつと小さ
く、それぞれ平均で6000cm2/V・secと3000cm2/
V・secであつた。またAIn/ASbが0.9のときに
は得られた膜の不平衡電圧が大きく、AIn/ASb
が1.8のときには得られた膜は不均一でぼつぼつ
穴があいていた。
実施例 6
基板温度380℃からスタートし、最終温度を500
℃にして、他は実施例1に同じように蒸着した。
移動度は1000cm2/V・sec程度上下にバラツクが、
実施例1及び3〜5と殆んど同じようなAIn/
ASbに対する傾向がえられた。
実施例 7〜10
AIn/ASb=1.45の場合について、最初の基板
温度をそれぞれ400℃、420℃、440℃または470℃
に設定し、最終の温度を480℃にして、真空度8
×10-7Torrで他は実施例1に準じて蒸着を行な
い、下表の結果を得た。[Table] Comparative Example 2 In Example 1, when AIn/ASb is 0.9 and 1.8, the mobility is smaller than 10000cm 2 /Vsec, and the average is 6000cm 2 /V・sec and 3000cm 2 /Vsec, respectively.
It was hot at Vsec. Moreover, when AIn/ASb is 0.9, the unbalanced voltage of the obtained film is large, and AIn/ASb
When the film was 1.8, the resulting film was non-uniform and had many holes. Example 6 Start with a substrate temperature of 380°C and increase the final temperature to 500°C.
℃, and vapor deposition was carried out in the same manner as in Example 1 except for the following.
The mobility varies up and down by about 1000cm 2 /V・sec,
AIn/ almost similar to Examples 1 and 3-5.
A trend toward ASb was obtained. Examples 7 to 10 For the case of AIn/ASb=1.45, the initial substrate temperature was set to 400℃, 420℃, 440℃ or 470℃, respectively.
, set the final temperature to 480℃, and set the vacuum level to 8.
Vapor deposition was carried out at ×10 −7 Torr in accordance with Example 1 except that the results shown in the table below were obtained.
【表】
実施例 11〜14
実施例7〜10の基板温度の平均値、すなわちそ
れぞれ440℃、450℃、460℃または475℃に一定に
保つて実施した場合の結果を下表に示す。[Table] Examples 11 to 14 The average substrate temperature of Examples 7 to 10, that is, the results obtained when the experiments were carried out while being kept constant at 440°C, 450°C, 460°C, or 475°C, are shown in the table below.
【表】
実施例 15
AIn/ASbが1.5で、最初の基板温度を380℃に
設定し10分間そのままで蒸着し、次の1分間で
420℃に昇温させてそのまま10分間この温度に保
ち、続く1分間で460℃に昇温させてそのまま10
分間この温度に保つといつた段階的基板温度上昇
法を用いた。真空度は1×10-6Torrであつた。
えられた6枚の膜の移動度は18000〜22000cm2/
V・Sでホール係数は330〜380cm3/Cであつた。
この膜は実施例1で得られた膜に比して光沢がい
くらか劣つていた。[Table] Example 15 AIn/ASb is 1.5, the initial substrate temperature is set to 380℃, the deposition is continued for 10 minutes, and the next minute is 380℃.
Raise the temperature to 420℃ and keep it at this temperature for 10 minutes, then increase the temperature to 460℃ for 1 minute and keep it for 10 minutes.
A stepwise substrate temperature increase method was used in which the substrate was held at this temperature for minutes. The degree of vacuum was 1×10 -6 Torr.
The mobility of the six membranes obtained is 18,000 to 22,000 cm 2 /
The Hall coefficient was 330 to 380 cm 3 /C at V.S.
This film had somewhat lower gloss than the film obtained in Example 1.
第1図は電気特性を測定するためのパターンを
示す平面図、第2図は蒸着における系の真空度と
極限の基板温度との関係を示すグラフである。
図中、符合a,a′は入力電極、b,b′は出力電
極であり、1は理論分解線、2,2′,2″は実測
点である。
FIG. 1 is a plan view showing a pattern for measuring electrical characteristics, and FIG. 2 is a graph showing the relationship between the vacuum degree of the system during vapor deposition and the ultimate substrate temperature. In the figure, a and a' are input electrodes, b and b' are output electrodes, 1 is a theoretical decomposition line, and 2, 2', and 2'' are actual measurement points.
Claims (1)
ンチモン対インジウムの到達速度比が1:1.1な
いし1:1.7となる条件下で蒸着させるに際し、
蒸着初期の基板温度を、式 1/T=9.98×10-4−5.66×10-5logP 〔ここに、Tは極限の基板温度(絶対温度)、
Pは蒸着中の真空度(Torr)である〕 で与えられる極限の基板温度よりも低い温度に設
定することを特徴とするインジウムアンチモン化
合物結晶とインジウム単体結晶から成るインジウ
ムアンチモン複合結晶半導体の製造法。[Claims] 1. When depositing indium and antimony under conditions such that the arrival speed ratio of antimony to indium on the substrate is 1:1.1 to 1:1.7,
The substrate temperature at the initial stage of vapor deposition is expressed by the formula 1/T=9.98×10 -4 −5.66×10 -5 logP [Here, T is the ultimate substrate temperature (absolute temperature),
P is the degree of vacuum during vapor deposition (Torr)] A method for manufacturing an indium-antimony composite crystal semiconductor consisting of an indium-antimony compound crystal and an indium elemental crystal, characterized by setting the temperature to be lower than the ultimate substrate temperature given by .
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56058724A JPS57173934A (en) | 1981-04-18 | 1981-04-18 | Manufacture of indium-antimony system compound crystal semiconductor |
| US06/361,939 US4468415A (en) | 1981-03-30 | 1982-03-25 | Indium-antimony complex crystal semiconductor and process for production thereof |
| AT82102605T ATE20629T1 (en) | 1981-03-30 | 1982-03-27 | INDIUM-ANTIMONY SEMICONDUCTOR WITH COMPLEX CRYSTALLINE STRUCTURE AND PROCESS FOR ITS PRODUCTION. |
| EP82102605A EP0062818B2 (en) | 1981-03-30 | 1982-03-27 | Process of producing a hall element or magnetoresistive element comprising an indium-antimony complex crystal semiconductor |
| DE8282102605T DE3271874D1 (en) | 1981-03-30 | 1982-03-27 | Indium-antimony complex crystal semiconductor and process for production thereof |
| KR8201347A KR860000161B1 (en) | 1981-03-30 | 1982-03-29 | Indium antimony composite crystal semiconductor and its manufacturing method |
| US06/620,645 US4539178A (en) | 1981-03-30 | 1984-06-14 | Indium-antimony complex crystal semiconductor and process for production thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56058724A JPS57173934A (en) | 1981-04-18 | 1981-04-18 | Manufacture of indium-antimony system compound crystal semiconductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57173934A JPS57173934A (en) | 1982-10-26 |
| JPH0113212B2 true JPH0113212B2 (en) | 1989-03-03 |
Family
ID=13092443
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56058724A Granted JPS57173934A (en) | 1981-03-30 | 1981-04-18 | Manufacture of indium-antimony system compound crystal semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57173934A (en) |
-
1981
- 1981-04-18 JP JP56058724A patent/JPS57173934A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57173934A (en) | 1982-10-26 |
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