JPH0113781B2 - - Google Patents
Info
- Publication number
- JPH0113781B2 JPH0113781B2 JP14959683A JP14959683A JPH0113781B2 JP H0113781 B2 JPH0113781 B2 JP H0113781B2 JP 14959683 A JP14959683 A JP 14959683A JP 14959683 A JP14959683 A JP 14959683A JP H0113781 B2 JPH0113781 B2 JP H0113781B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- circuit
- voltage
- comparator
- detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001514 detection method Methods 0.000 claims description 18
- 230000002265 prevention Effects 0.000 claims 1
- 238000006243 chemical reaction Methods 0.000 description 10
- 238000010586 diagram Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 239000006185 dispersion Substances 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M1/00—Substation equipment, e.g. for use by subscribers
- H04M1/60—Substation equipment, e.g. for use by subscribers including speech amplifiers
- H04M1/6033—Substation equipment, e.g. for use by subscribers including speech amplifiers for providing handsfree use or a loudspeaker mode in telephone sets
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、送話信号と受話信号の比較を行ない
ハウリング防止のため挿入した送話系、受話系の
損失回路を制御する拡声電話装置に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a loudspeaker telephone device that compares a transmitted signal and a received signal and controls loss circuits in the transmitting and receiving systems inserted to prevent howling. It is something.
(従来例の構成とその問題点)
この種の拡声電話装置としては、第1図のよう
に、マイクロフオン1、マイクアンプ2、送話可
変損失回路3、ハイブリツドトランス4、受話可
変損失回路5、スピーカアンプ6、スピーカ7、
送話検波整流回路8、受話検波整流回路9、音声
スイツチ制御回路10で構成されている。(Configuration of conventional example and its problems) As shown in FIG. , speaker amplifier 6, speaker 7,
It is composed of a transmitting call detection rectifier circuit 8, a receiving call detecting rectifier circuit 9, and an audio switch control circuit 10.
すなわちこの装置ではハウリングを防止するた
め、送話および受話の通話路に損失回路3,5を
挿入し、音声スイツチ制御回路10により送話検
波整流回路8の出力と受話検波整流回路9の出力
の大小を比較してその損失回路3,5を制御して
いる。 That is, in this device, in order to prevent howling, loss circuits 3 and 5 are inserted into the transmission and reception communication paths, and the audio switch control circuit 10 adjusts the output of the transmission detection rectifier circuit 8 and the output of the reception detection rectification circuit 9. The loss circuits 3 and 5 are controlled by comparing the sizes.
ここで送話、受話の検波整流回路8,9は、送
話受話音声信号の差が比例動作するように、第2
図のように主にダイオードD1,D2、演算増幅器
12から構成される対数変換回路11と整流回路
13から構成されている。この検波整流回路の問
題点として送話、受話検波整流回路8,9の入出
力特性はダイオードD1,D2の電気的特性により
左右されるため、送話及び受話検波整流回路に使
用するダイオードは特性を揃える必要があり、ま
た一般のダイオードを使用した場合、対数特性で
のダイナミツクレンジは狭く40dB前後である。
更にダイオードの特性は温度によつて大きく変化
するため、出力電圧,入出力特性の傾斜も大きく
変化する。これらの影響により、送話、受話信号
の差をとつて比較するには誤動作が生じ、正しい
制御が行なわれなくなる。 Here, the detection rectifier circuits 8 and 9 for transmitting and receiving are configured to operate in proportion to the difference between the transmitting and receiving audio signals.
As shown in the figure, it is composed of a logarithmic conversion circuit 11 mainly composed of diodes D 1 and D 2 and an operational amplifier 12, and a rectification circuit 13. The problem with this detection rectifier circuit is that the input/output characteristics of the transmitting and receiving detection rectifier circuits 8 and 9 are influenced by the electrical characteristics of the diodes D 1 and D 2 . It is necessary to make the characteristics uniform, and when using a general diode, the dynamic range in terms of logarithmic characteristics is narrow, around 40 dB.
Furthermore, since the characteristics of the diode change greatly depending on the temperature, the output voltage and the slope of the input/output characteristics also change greatly. Due to these influences, a malfunction occurs when the difference between the transmitted and received signals is determined and compared, and correct control is not performed.
(発明の目的)
本発明は上記従来例の問題点を解決するもので
あり、対数変換のダイナミツクレンジを拡張して
音声スイツチ動作が安定に行なわれるようにする
ことを目的とするものである。(Object of the Invention) The present invention solves the problems of the conventional example described above, and aims to extend the dynamic range of logarithmic conversion so that the voice switch operation can be performed stably. .
(発明の構成)
本発明は上記目的を達成するために、マイクロ
プロセツサ(以後CPUと略す)とラダー抵抗お
よびコンパレータを使用し、CPUのROM或は
RAMに用意した対数のテーブルを参照しながら
A/D変換を行なうもので、ラダー抵抗の出力を
抵抗により2分割し、この2つの出力電圧と、送
話或は受話信号の検波整流出力とをそれぞれコン
パレータにより比較し、この出力を受けてCPU
内部でA/D変換するとともに数値計算するもの
で、これにより従来の対数素子のバラツキを考慮
せずに、また、簡単な構成で対数変換のダイナミ
ツクレンジを拡張しようとするものである。(Structure of the Invention) In order to achieve the above object, the present invention uses a microprocessor (hereinafter abbreviated as CPU), a ladder resistor, and a comparator, and uses the CPU's ROM or
A/D conversion is performed while referring to a logarithm table prepared in RAM.The output of the ladder resistor is divided into two by a resistor, and these two output voltages and the detected and rectified output of the transmitting or receiving signal are Each is compared by a comparator, and the CPU receives this output.
It performs A/D conversion and numerical calculations internally, thereby expanding the dynamic range of logarithmic conversion with a simple configuration and without taking into account the dispersion of conventional logarithmic elements.
(実施例の説明)
以下、本発明を第3図に示す一実施例により説
明する。第3図において、14はCPU15の出
力を電圧の大きさに変換するラダー抵抗、R1,
R2はラダー抵抗14の出力を分割する分割抵抗、
16,17はそれぞれラダー抵抗14の出力A及
びBと、信号を直流電圧に変換する検波整流回路
である。ここで一例として60dBのダイナミツク
レンジを得ることにすると、今抵抗R1及びR2の
比はこのダイナミツクレンジの1/2の30dB(例え
ばA点が3VであればB点は0.1V)となるよう設
定する。ここでCPU15のROM或はRAMには
第4図のように0から30番地までの内容に1dB毎
に変化する16進数を設定する。ここで先づCPU
15から0番地の内容をラダー抵抗14に出力す
ると、検波整流回路18の出力電圧が0.1V以上
であればコンパレータ16及び17の出力はハイ
レベルとなり、0.1Vより小さければコンパレー
タ16の出力だけローレベルとなる。(Description of Embodiment) The present invention will be described below with reference to an embodiment shown in FIG. In Fig. 3, 14 is a ladder resistor that converts the output of the CPU 15 into voltage magnitude, R 1 ,
R 2 is a dividing resistor that divides the output of the ladder resistor 14;
Reference numerals 16 and 17 represent the outputs A and B of the ladder resistor 14, respectively, and a detection rectifier circuit that converts the signals into DC voltages. As an example, if we obtain a dynamic range of 60 dB, the ratio of resistors R 1 and R 2 is 30 dB, which is 1/2 of this dynamic range (for example, if point A is 3 V, point B is 0.1 V). Set it so that Here, in the ROM or RAM of the CPU 15, hexadecimal numbers that change every 1 dB are set in the contents from 0 to 30 as shown in FIG. First of all, CPU
When the contents of addresses 15 to 0 are output to the ladder resistor 14, if the output voltage of the detection rectifier circuit 18 is 0.1V or higher, the outputs of the comparators 16 and 17 will be high level, and if it is lower than 0.1V, only the output of the comparator 16 will be low. level.
このようなことから、コンパレータ16,17
の出力をCPU15の入力CH1,CH2で観測し、
CH1が大きい場合には、検波整流回路18の出力
とラダー抵抗14の出力Aをコンパレータ16で
比較しながらA/D変換し、その後、CPU15
内で30を加算する。すなわち、ラダー抵抗14の
A点と比較する場合にはA/D変換の値は30〜
60dB、ラダー抵抗14のB点と比較する場合に
は0〜30dBとなり、ダイナミツクレンジは60dB
に拡張される。 For this reason, comparators 16 and 17
Observe the output of the input channel CH 1 and CH 2 of the CPU 15,
When CH 1 is large, A/D conversion is performed while comparing the output of the detection rectifier circuit 18 and the output A of the ladder resistor 14 with the comparator 16, and then the CPU 15
Add 30 within. In other words, when comparing with point A of the ladder resistor 14, the A/D conversion value is 30~
60dB, when compared with point B of ladder resistor 14, it is 0 to 30dB, and the dynamic range is 60dB.
will be expanded to.
本発明の特徴を総括的に述べれば、本発明は、
検波整流回路18出力を第1のコンパレータ16
及び第2のコンパレータ17で比較することによ
り、検波整流回路の出力が0〜30dB範囲にある
か、
30〜60dBにあるかを判定し、0〜30dB範囲に
ある場合にはコンパレータ17出力をA/D変換
し、また30〜60dBの範囲にある場合には、コン
パレータ16出力をA/D変換するとともに所定
値を加算するものである。 To summarize the characteristics of the present invention, the present invention has the following features:
The detection rectifier circuit 18 output is sent to the first comparator 16
and the second comparator 17, it is determined whether the output of the detection rectifier circuit is in the range of 0 to 30 dB or 30 to 60 dB, and if it is in the range of 0 to 30 dB, the output of the comparator 17 is set to A. If it is within the range of 30 to 60 dB, the output of the comparator 16 is A/D converted and a predetermined value is added.
(発明の効果)
以上説明したように、本発明によれば、対数特
性はCPUのROM或はRAMに了じめ対数の値を
設定しているため、従来のように素子のバラツキ
を考慮せずまたダイナミツクレンジもCPUによ
つて計算されるため、安定した音声スイツチの動
作が得られるようになり、簡単な構成で優れた特
性の拡声電話装置を提供することができる。(Effects of the Invention) As explained above, according to the present invention, the logarithmic characteristic is set in the ROM or RAM of the CPU and the logarithm value is set, so it is no longer necessary to take into account the variation of elements as in the past. Furthermore, since the dynamic range is also calculated by the CPU, stable operation of the voice switch can be obtained, and a loudspeaker telephone device with excellent characteristics can be provided with a simple configuration.
第1図は従来の拡声電話装置の構成図、第2図
は第1図に示す検波整流回路の具体回路図、第3
図は本発明の一実施例における拡声電話装置の対
数変換のためのA/D変換回路、第4図は対数変
換のためのテーブルである。
14…ラダー抵抗、15…CPU、16,17
…コンパレータ、18…検波整流回路。
Figure 1 is a configuration diagram of a conventional loudspeaker telephone device, Figure 2 is a specific circuit diagram of the detection rectifier circuit shown in Figure 1, and Figure 3 is a diagram of the configuration of a conventional loudspeaker telephone device.
The figure shows an A/D conversion circuit for logarithmic conversion of a public address telephone device according to an embodiment of the present invention, and FIG. 4 is a table for logarithmic conversion. 14...Ladder resistance, 15...CPU, 16,17
...Comparator, 18...Detection rectifier circuit.
Claims (1)
ング防止のための損失回路と、送話信号、受話信
号のレベル差に応じて前記損失回路を制御する音
声スイツチ制御回路と、前記音声スイツチ制御回
路の入力側にそれぞれ設けられる検波整流回路
と、マイクロプロセツサと、このマイクロプロセ
ツサの出力を電圧の大きさに変換するラダー抵抗
と、前記ラダー抵抗出力を分割抵抗により2分割
して得られる第1の出力(全電圧)及び第2の出
力(分割電圧)と前記検波整流回路の出力電圧と
をそれぞれ比較する第1及び第2のコンパレータ
とを有し、前記検波整流回路の出力が上記第2の
出力より大きい場合には、前記第2のコンパレー
タの出力を上記マイクロプロセツサで対数テーブ
ルを参照してA/D変換し、前記検波整流回路の
出力が前記第1及び第2の出力より大きい場合に
は、上記第1のコンパレータの出力を上記マイク
ロプロセツサで対数テーブルを参照してA/D変
換するとともに所定値を加算することを特徴とす
る拡声電話装置。1. A loss circuit for howling prevention inserted into the transmitting system and the receiving system, respectively, an audio switch control circuit that controls the loss circuit according to the level difference between the transmitting signal and the receiving signal, and the audio switch control circuit. a detection rectifier circuit, a microprocessor, a ladder resistor for converting the output of the microprocessor into a voltage level, and a first voltage waveform obtained by dividing the output of the ladder resistor into two by a dividing resistor. 1 output (total voltage) and a second output (divided voltage) and the output voltage of the detection rectification circuit, the output of the detection rectification circuit is compared with the output voltage of the detection rectification circuit. 2, the output of the second comparator is A/D converted by the microprocessor with reference to the logarithmic table, and the output of the detection rectifier circuit is made larger than the first and second outputs. A loudspeaker telephone apparatus characterized in that if the output of the first comparator is large, the output of the first comparator is A/D converted by the microprocessor with reference to a logarithm table and a predetermined value is added.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58149596A JPS6041850A (en) | 1983-08-18 | 1983-08-18 | public address telephone equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58149596A JPS6041850A (en) | 1983-08-18 | 1983-08-18 | public address telephone equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6041850A JPS6041850A (en) | 1985-03-05 |
| JPH0113781B2 true JPH0113781B2 (en) | 1989-03-08 |
Family
ID=15478659
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58149596A Granted JPS6041850A (en) | 1983-08-18 | 1983-08-18 | public address telephone equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6041850A (en) |
-
1983
- 1983-08-18 JP JP58149596A patent/JPS6041850A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6041850A (en) | 1985-03-05 |
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