JPH0117176B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a variable-length code code conversion circuit that converts an input signal consisting of a variable-length code into a signal consisting of a fixed-length code and outputs the converted signal. It is something.

(2) Background of the technology Generally, in information transmission, variable-length codes are used, in which the number of bits in one word changes depending on the content of the information, and fixed-length codes, in which the number of bits in one word is always constant. It is being The variable length code system has the advantage that the total number of bits required to transmit the same amount of information can be reduced compared to the fixed length code system, and is used for transmitting image signals, audio signals, etc. However, since the number of bits differs for each word, it is inconvenient to process it as is, and the circuit becomes complicated. These drawbacks can be eliminated by converting the signal series consisting of codes of different lengths into parallel data divided into parts of a fixed number of bits. Against this background, it is desired to realize a circuit that converts variable length codes to fixed length codes.

(3) Prior Art and Problems A conventional code conversion circuit for variable length codes is shown in FIG. The code conversion circuit shown in FIG. 1 includes a matrix-type rotation circuit 11 that receives a variable-length code data input signal having a maximum number of bits n, and a first circuit that receives an n-bit output signal of the matrix-type rotation circuit 11.
a switching circuit 1 receiving the output signal of the first flip-flop circuit 12, the matrix-type rotation circuit 11, and the output signal of the first flip-flop circuit 12;
3. A second flip-flop circuit 14 that receives the output signal of the switching circuit 13, a third flip-flop circuit 15 that receives the output signal of the second flip-flop circuit 14, and receives the bit number information input signal of the data input signal. A control circuit 16 is provided to control the above-mentioned circuit.

In the code conversion circuit shown in FIG.
1 word is input in parallel. Rotating circuit 1
1 moves the bit position within each word by an arbitrary number of bits without changing the order of n-bit data input in parallel, that is, converts the bit position as if rotating n-bit data. It has a function to output in parallel. The above functions of the rotation circuit 11 are controlled by the control circuit 16 in accordance with the bit number information of the variable length code input data. The output signal of the rotation circuit 11 is written to the first flip-flop circuit 12 and at the same time the output signal is written to the switching circuit 13.
are written in parallel to the second flip-flop circuit 14 via the flip-flop circuit 14. In this case, if there is unwritten data that protrudes from n bits during the previous data writing, the first flip-flop circuit 12
The parallel data is written to the second flip-flop circuit 14 via the switching circuit 13 in the form of being added to the beginning of the parallel data. In this way, if the parallel data written to the second flip-flop circuit 14 does not reach n bits, the next variable-length code input data has the first bit written to the second flip-flop circuit 14. The data is converted so that it is located at the end of the data, and is written into the flip-flop circuit 14.

In this way, when the data written in the flip-flop circuit 14 reaches n bits, the contents are written into the third flip-flop 15 and output as fixed length code output data at a predetermined timing.

By the way, in the code conversion circuit shown in Fig. 1,
When a part of the variable-length code input data protrudes from n bits, that part of the bits is held in the first flip-flop circuit 12 and transferred to the second flip-flop circuit 13 via the switching circuit 13 when writing the next data. The bits are written into the flip-flop circuit 14, but at this time, it is necessary to selectively write only the unwritten bits in the flip-flop circuit 14. Also, the data written to the flip-flop circuit 14 is n
If the bit is not reached, flip-flop circuit 1
It is necessary to write new data only to the unwritten bits while retaining the data already written to bits 4. Therefore, in the code conversion circuit shown in FIG. 1, it is necessary to control the writing of data to the flip-flop circuit 14 on a bit-by-bit basis depending on the writing status of the flip-flop 14 and the code length of the variable-length code input data. There is a problem that the configuration of the control circuit and the control operation become complicated.

(4) Object of the Invention The main object of the present invention is to take into account the problems of the conventional type described above, and to develop the idea of feeding back the output of a flip-flop circuit for storing valid bits to the input of the flip-flop circuit via a switching circuit. Based on the above, it is an object of the present invention to provide a code conversion circuit for variable length codes, which can write data to the flip-flop circuit at once for all bits, thereby simplifying the configuration and control operation of a control circuit. It is in.

(5) Structure of the Invention The present invention provides a matrix-type rotation circuit that receives variable-length code input signals input in parallel and shifts the received input signal to shift the bit position, and the rotation circuit. a first flip-flop circuit that receives an output signal of the rotary circuit, a switching circuit that receives the output signal of the rotary circuit and an output signal of the first flip-flop circuit, and a second flip-flop circuit that receives the output signal of the switching circuit. and a third flip-flop circuit that receives the output signal of the second flip-flop circuit and outputs a fixed-length code output signal, the switching circuit further comprising: In the switching circuit, the received output signal of the rotary circuit and the output signals of the first and second flip-flop circuits are selectively outputted bit by bit. It is an object of the present invention to provide a variable length code code conversion circuit characterized in that a fixed length code output signal is created by writing all bits at once in a second flip-flop circuit.

(6) Embodiment of the Invention A variable length code code conversion circuit as an embodiment of the present invention is shown in FIG. The code conversion circuit shown in FIG. 2 includes a matrix-type rotation circuit 21 that receives variable-length code data input signals DI1, DI2, . . . DIn having a maximum number of bits n;
a first flip-flop circuit 22 that receives the n-bit output signal of the flip-flop circuit 22, a switching circuit 23 that receives the output signal of the rotation circuit 21 and the output signals of the first and second flip-flop circuits 22 and 24;
a second flip-flop circuit 24 receiving the output signal of the second flip-flop circuit 24; and a third flip-flop circuit 2 receiving the output signal of the second flip-flop circuit 24.
5, and input signal bit number information BI1, BI
2... Consists of a control circuit 26 that receives BIm and controls each of the circuits 21 to 25 described above. The code conversion circuit in FIG. 2 is a second flip-flop circuit 2.
This code conversion circuit differs from the code conversion circuit shown in FIG. 1 in that the output signal of No. 4 is fed back to the input side of the second flip-flop circuit 24 via a switching circuit 23.

An example of the configuration of the switching circuit 23 in the code conversion circuit of FIG. 2 is shown in FIG. The switching circuit 23 in FIG. A second stage switching unit 2 that receives the output signal of the stage switching unit 231
It has 32.

The operation of the code conversion circuit shown in FIGS. 2 and 3 will be explained below using the operation explanatory diagram of FIG. 4.

In the code conversion circuit shown in FIG. 2, the maximum bit of input data is set to 8 bits, for example, and S1
The variable length code data shown as (A), (B), (C)...
shall be input in this order. The input data S1 is rotated by the number of bits determined by the control of the control circuit 26 in the rotation circuit 21, and is supplied to the first flip-flop circuit 22 and the switching circuit 23 as converted output data S2.
For example, regarding the first data (A), the input data is output as is from the rotation circuit 21,
The output data of the rotation circuit 21 is also selected and outputted in the switching circuit 23 (S3), and written to the second flip-flop circuit 24 (S4). in this case,
Since only 6 bits are written as valid data in the second flip-flop circuit 24, it is necessary to add the first 2 bits of the next data (B) to the tail.

For this purpose, the second input data (B) is rotated by the rotation circuit 21 so that the first two bits are positioned at the tail and outputted as S2. In the switching circuit 23, the first stage switching unit 231 selects the output S1 (that is, A1) of the second flip-flop circuit 23 and supplies it to the second stage switching unit 232. 6
For the bit, the output S4 of the second flip-flop circuit is selected, and for the last two bits, the output S2 of the rotation circuit 21 is selected, and the output S3 of the switching circuit 23 is selected as the output S4 of the second flip-flop circuit 24.
supplied to The output S3 of this switching circuit 23 is
Since all bits of valid data have been written to the second flip-flop circuit 24, the data is written to the third flip-flop circuit 25 as output data.

Next, the third input data (C) is rotated by one bit in the rotation circuit 21 and supplied to the switching circuit 23 in order to be added to the tail of the one bit b3 left unwritten in the previous data. In the switching circuit 23, the previous output data (i.e. A2) of the rotation circuit 21 stored in the first flip-flop circuit 22 is selected by the first stage switching unit 231 and is supplied to the second stage switching unit 232. Then, in the second stage switching section 232, the output data of the second flip-flop circuit 22 is selected for the first bit, and the output data of the rotation circuit 21 is selected for the last seven bits. The output of this switching circuit 23 is transferred to the second flip-flop circuit 2 as before.
4 to the third flip-flop circuit 25 as output data.

Similarly, if there are unwritten bits in the previous input data, new data is added to the end, and if the valid data written to the second flip-flop circuit 24 does not reach 8 bits, New data is added to the end of the already written data, and when it reaches 8 bits, it is output from the third flip-flop circuit 25 as output data.

In this way, in the code conversion circuit shown in FIG. Second
By feeding back to the input of the second flip-flop circuit 24, all bits can be written to the second flip-flop circuit 24 at the same time.

(7) Effects of the Invention According to the present invention, in a code conversion circuit that converts variable-length code input data and outputs it as fixed-length code data, data is written in a flip-flop circuit that holds valid data by writing all bits at once. Therefore, it is possible to perform code conversion with simple control and circuit configuration.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a conventional code conversion circuit for variable length codes, FIG. 2 is a circuit diagram of a code conversion circuit for variable length codes as an embodiment of the present invention, and FIG.
FIG. 4 is a circuit diagram showing an example of the configuration of the switching circuit in FIG. 2, and FIG. 4 is an explanatory diagram of the operation of the code conversion circuit in FIG. Explanation of symbols: 11, 21: matrix type rotation circuit, 12, 22: first flip-flop circuit, 13, 23: switching circuit, 14, 24: second flip-flop circuit, 15, 25: third flip-flop circuit, 16, 26: control circuit, 23
1: first switching section, 232: second switching section.

Claims (1)

[Claims] 1. A matrix-type rotation circuit that receives variable-length code input signals input in parallel and shifts the received input signals to shift the bit position;
a first flip-flop circuit that receives the output signal of the rotation circuit; a switching circuit that receives the output signal of the rotation circuit and the output signal of the first flip-flop circuit; and a second flip-flop circuit that receives the output signal of the switching circuit. A variable length code code conversion circuit comprising: a flip-flop circuit; and a third flip-flop circuit that receives an output signal of the second flip-flop circuit and outputs a fixed-length code output signal; receiving the output signal of the second flip-flop circuit; in the switching circuit, the received output signal of the rotary circuit and the output signals of the first and second flip-flop circuits are selectively outputted bit by bit; A code conversion circuit for variable length codes, characterized in that a fixed length code output signal is created by writing all bits at once in the second flip-flop circuit.