JPH0118455B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention can be accessed using both the JIS 7-bit character code used in displays and keyboards, and the JIS 8-bit character code. In order to do this, when accessing with JIS 7 bit character code system, use this
It relates to a code conversion method that converts to JIS 8-bit character code so that it can be used in any case.

[Technical Background, Prior Art and Problems] For example, as shown in FIG. The character that was
The results of calculations that are displayed on the CRT 4 or processed by the CPU 1 are output from a printer 5 or the like. At this time, there are two types of character codes in the JIS standard: 7-bit codes and 8-bit codes.

When the character code is composed of 8 bits, 256 types of characters can be represented, so the printer 5 is configured to be controlled using this 8-bit code. However, with Keyboard 3, it was not possible to have 256 keys, so one key had multiple functions, and it also had a shift out (SO) key and a shift in (SI) key, and when one of these keys was pressed. It is configured to operate other keys later.

In other words, on the keyboard, as shown in Figure 3,
If you operate the SO key and press key A, the upper 3 bit strings (in the example of A, 4=
"100") is the lower 4 bits of the row ((in the example of A, 1 =
A character code in which "0001") is displayed is output, and "A" is displayed on the CRT 4, for example. Also, if you operate the SI key and operate the same key as A, you will also receive "1000001" as shown in Figure 2 A.
A 7-bit output is output, but since the SI key was pressed first, "chi" is output as shown in FIG. 3B, and "chi" is output to the CRT4.
It is also clear from Figure 3 A and B that when the SO key is pressed, "0001110" is output, and when the SI key is pressed, "0001111" is output.

By the way, the JIS 8-bit standard is structured as shown in FIG. And this 8 bit is the second
As shown in Figure B, the upper 4 bits indicate the column, and the lower 4 bits indicate the row.

Therefore, when a 7-bit code is transmitted to something controlled by an 8-bit code, such as the printer 5, the printer interface 8
For example, 7 bits stored in main memory 2 - 8
By referring to the bit comparison table, it determines whether the first input is an SO code or an SI code, decodes the next character code, and obtains the corresponding 8-bit code. Na8
I had to enter the bitcode. Therefore, a system that controls using two types of codes, a 7-bit code and an 8-bit code, has the disadvantage that the conversion from 7 to 8 requires a considerable amount of effort.
Note that some CRT4's have two types of CRT interfaces 7, one for 8-bit control and one for 7-bit control, and this approach has the disadvantage of considerably increasing the amount of hardware.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a code conversion system that can automatically convert a 7-bit code to a JIS 8-bit code for a device that accesses the code in order to overcome these drawbacks.

[Structure of the invention]

To achieve this objective, the code conversion method of the present invention inputs a 7-bit shift-in code or shift-out code and other JIS 7-bit codes, converts them into 8-bit codes, and converts them into 256
A device for representing a character code of a type, comprising a shift code discriminating means for discriminating whether an input 7-bit code is a shift-out code or a shift-in code, a discrimination result of the shift code discriminating means, and the input. additional code generating means that generates different output bits depending on either the shift-out code or the shift-in code, and the output from the additional code generating means and the external a bit adding means for adding the output from the switching means to the input bit code as the most significant bit; and inputting the output from the shift code determining means and a write signal; In the case of a shift code input, a gate means is provided for aligning the write time of the input information to the bit addition means, and in the case of a 7-bit code input, the switching means adds 1 bit to the 7-bit code and latches it, and in the case of an 8-bit code input. In this case, by latching this as is, 7
The present invention is characterized in that access can be made in both a bit code system and an 8-bit code system.

[Summary of the invention]

Before explaining the present invention in detail based on one embodiment, an outline of the present invention will be explained based on FIGS. 3 and 4.

As is clear from comparing Figure 3 A and B with Figure 4, the codes in columns 2 to 7 in Figure 3 B are the same as those in Figure 4.
Columns 10 to 15 in JIS 8-bit character code
Rows are embedded in columns unchanged. Therefore, when the SI key is operated on a 7-bit device, "1" is added to the beginning of the next 7-bit code input, and when the SO key is operated, "1" is added to the beginning of the next 7-bit code input. If "0" is assigned, it can be directly converted to JIS 8-bit code. The present invention realizes this with a simple hardware configuration.

[Embodiments of the invention]

An embodiment of the present invention will be described based on FIGS. 5 and 6.

FIG. 5 is a configuration diagram of an embodiment of the present invention, and FIG. 6 is an explanatory diagram of its operation.

In the figure, 10 to 12 are AND gates, and 13 is
DC flip-flop (hereinafter referred to as FF), 14
is a latch, 15 is a driver, 16 to 20 are inverters, and SW is a changeover switch.

The AND gate 10 identifies whether the input 7-bit code (ID6 to ID0) is either an SO code or an SI code, or another code. In other words, Figure 3 A and B
The SO code has a zero column and 14 rows, so it is represented as "0001110," and the SI code has a zero column and 15 rows, so it is represented as "0001111." The upper three bits are applied to the AND gate 10 via inverters 16 to 18, the least significant bit is not input, and the write signal WRT is applied. Therefore, when the above SO code or SI code is input when WRT is "1", inverters 16 to 18 all output "1", and as shown in FIG.
Gate 10 will output "1". When this AND gate 10 outputs "1" to the FF 13, the least significant bit of the 7-bit input data
Since ID0 is applied to FF13, the output of FF13 is zero when the input code is an SO code, and the output of FF13 is "1" when the input code is an SI code.

The above write signal WRT is applied to the AND gate 11. At this time, since a time constant circuit consisting of a resistor R and a capacitor C is connected to one input side of the AND gate 11, this write signal WRT
When is applied, the AND gate 11 sends out the output a after a delay of time _T0 determined by the CR time constant circuit. Therefore, when the AND gate 10 outputs zero, the AND gate 12 inputs the JIS 7-bit SO code and SI to the AND gate 10.
When a code other than the code is transmitted, and when "1" is output from the AND gate 11, an output b shown in FIG. 6 is sent to the latch 14. This CR time constant circuit aligns the write times to the latch 14.

The changeover switch SW is connected to either fixed contact _S7 or _S8 , and when accessed with a 7-bit code system, it is connected to the _S7 side, and when accessed with an 8-bit code system, it is connected to the _S8 side. Connected.

A clear signal CLR is input to the inverter 19, and the FF 13 is initialized by this clear signal CLR, and its output becomes zero.

Next, the operation of the present invention will be explained.

(1) When accessing with 7-bit code system When accessing with 7-bit code system,
Connect the changeover switch SW to the fixed contact _S7 side.

In the case of a 7-bit code system, the SO key or SI key is first touched to indicate whether the code is A or B in Figure 3, so the SO or SI code is entered first, and then the other 7 Bit code is input. Therefore, for example, SI
When the code is entered, AND gate 10
The output of FF13 becomes "1", and at this time, the "1" of the lowest bit ID0 of the SI code is input to the D terminal of FF13, so the output of FF13 becomes "1".
This is then sent to latch 14. but
In the case of SI code (or SO code),
Since the output of AND gate 10 is "1", inverter 20 outputs zero, and AND gate 1
2 also outputs a zero, so the write clock CLK to latch 14 is not transmitted.

When other codes D ₆ to _{D 0} are input next to the above SI code as shown in FIG. 6A, at least one of the inverters 16 to 18 outputs zero, so the AND gate 10 outputs It becomes zero. At this time, the codes D ₆ to _{D 0} are transmitted to the latch 14, and the latch 14 also has the above-mentioned signals.
Due to the previous transmission of the SI code, "1" is transmitted via FF13 and _S7 . Then, as shown in FIG. 6B, the output of the AND gate 11 becomes "1" due to the write signal WRT. At this time, since the output of the AND gate 10 is zero as described above, the output of the AND gate 12 becomes "1" as shown in FIG. The “1” transmitted from the FF 13 and the 7 bits D ₆ to D ₀ are latched to the latch 14.
A JIS 8-bit code is created. This is then output via the driver 15 as a JIS 8-bit code. then clear signal
When the CLR is transmitted, both the FF 13 and the latch 14 are cleared and return to the initial state. In this way, the 7-bit code following the SI code or SO code is converted into an 8-bit code by adding 1 bit to the most significant bit by the latch 14. However, if the first bit is an SI code, "1" is added to the most significant bit, but if it is an SO code, "0" is added.

(2) When accessing with 8-bit code system When accessing with 8-bit code system,
Connect the changeover switch SW to the fixed contact _S8 side.

The 8-bit code D ₇ ~
D ₀ will be input to latch 14 as is. By the way, as is clear from Figure 4, when "1" is output from the AND gate 10,
D ₇ ~ D ₁ bit requires “000111”, but
This only applies to the two cases SO and SI because column 08 is undefined. However, since there is no need to use this code, the AND gate 10 normally outputs zero, and the write signal WRT sets these 8 bits _D7 to _D0 as they are in the latch 14, and the driver 15 outputs zero. It will be output as is as JIS 8-bit code.

Therefore, if a code conversion circuit like the one shown in Figure 5 is installed in the terminal control device of a terminal device that outputs JIS 7-bit code, the entire system can be operated with 8-bit code, greatly reducing the burden on the software. It can be made lighter.

〔Effect of the invention〕

According to the present invention, JIS7 can be achieved with a simple hardware configuration.
Even devices that access with bit codes can generate JIS 8-bit codes, and can also be used as is for devices that access with JIS 8-bit devices. Therefore, if this is used in a terminal control device, etc., it can be applied to terminal devices with 8-bit code access or terminal devices with 7-bit code access by simply controlling the changeover switch manually or automatically. As a result, the entire system can be accessed using an 8-bit code system, and data processing efficiency can be greatly improved.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of a data processing system, FIGS. 2 to 4 are explanatory diagrams of JIS bit code and JIS 8-bit code, and FIG. 5 is a configuration diagram of an embodiment of the present invention.
FIG. 6 is an explanatory diagram of the operation. In the figure, 10 to 12 are AND gates, and 13 is
A DC flip-flop, 14 is a latch, 15 is a driver, and 16 to 20 are inverters.

Claims (1)

[Claims] 1. A device that inputs a 7-bit shift-in code or shift-out code and other JIS 7-bit codes and converts them into 8-bit codes to represent 256 types of character codes. a shift code discriminating means for discriminating whether the 7-bit code input is a shift-out code or a shift-in code; and a discrimination result of the shift code discriminating means and the least significant bit of the input 7-bit code output. additional code generating means for generating different output bits depending on either the shift-out code or the shift-in code; and a switching means for switching between the output from the additional code generating means and the most significant bit of an external input. and a bit adding means for adding the output from the switching means to the input bit code as the most significant bit; and inputting the output from the shift code determining means and a write signal, and adding the output to the bit adding means in the case of a shift code input. A gate means is provided for aligning the write times of input information, and the switching means adds one bit to the 7-bit code and latches it when a 7-bit code is input, and latches it as is when an 8-bit code is input. A code conversion method characterized by making it possible to access both a bit code system and an 8-bit code system.