JPH0118582B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a semiconductor device, and particularly to a method for forming an electrode wiring layer of a transistor, an integrated circuit, etc.

(2) Prior Art and Problems Electrode wiring has conventionally been formed by depositing an electrode material such as aluminum (Al) on a substrate using a sputter deposition method or the like. However, in the case of a substrate with a step such as an electrode window, for example, a substrate with a step such as a MOS transistor with a source/drain electrode window of about 2 μm in width and about 1 μm in height, the ratio of the width of the step is The difference in level is larger than that in comparison, and it is difficult to form a wiring layer with a uniform thickness regardless of the irregularities of the substrate using conventional forming methods. However, there is a drawback that wire breakage is likely to occur. On the other hand, in the conventional formation method, even if an electrode wiring layer is formed, the surface of the electrode wiring layer is not flat, but rather the height difference increases due to the formation of the wiring layer. There is a problem in that each time an electrode wiring layer is stacked on top, disconnection becomes more likely to occur.

(3) Object of the Invention In order to solve the above-mentioned conventional drawbacks, it is an object of the present invention to provide a method for forming an electrode wiring layer in which disconnection does not occur in single-layer and multilayer wiring.

(4) Structure of the Invention The purpose is to provide a step of depositing a layer of electrode material on a substrate having steps, and irradiating the layer of electrode material with ions from an oblique direction with respect to the plane of the substrate. This is achieved by alternately repeating the steps of ion milling and ion milling to form an electrode wiring layer with a flattened surface.

When ions are irradiated from an oblique direction onto the surface of a substrate using the ion milling method, it is difficult for the ions to enter the narrow recesses provided in the substrate, and therefore the amount of milling in the recesses is smaller than that in other parts. less than that of . The present invention utilizes this feature to ion-mill the electrode wiring layer from a diagonal direction with respect to the plane of the substrate when forming an electrode wiring layer on an uneven substrate by sputter deposition or the like. be. In the electrode wiring layer provided in this way, the amount of the electrode wiring layer formed in the area other than the recessed part is milled more than the electrode wiring layer formed in the recessed part of the substrate, and therefore, the amount of the electrode wiring layer formed in the area other than the recessed part is milled. In other words, the level difference after ion milling is smaller than the level difference before ion milling. By alternately repeating the formation of the electrode material layer by this sputter evaporation method and the ion milling from the diagonal direction with respect to the plane of the substrate, the level difference gradually disappears each time this process is repeated. The surface of the electrode wiring layer can be flattened. If the surface of the electrode wiring layer can be flattened in this manner, the problem that the thickness of the wiring layer becomes thinner at the corner portion of the step will not occur, and disconnection of the electrode wiring layer can be prevented. In addition, in multilayer wiring, the surface of the first electrode wiring layer is flat, so even if the second, third, etc. wiring layers are sequentially formed, there will be no difference in level, and even if the layers are stacked, No disconnection occurs.

(5) Examples of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a cross-sectional view of a semiconductor device showing various steps of manufacturing an electrode wiring layer in this embodiment.

Aluminum (Al) was sputter-evaporated onto a silicon (Si) substrate (Fig. 1a) on which a phosphosilicate glass (PSG) layer 1 with a thickness of 1 μm was formed and a window 2 with a width of 2 μm was provided. According to
When the Al wiring layer 3 is formed so that the layer thickness on the PSG layer 1 is 1 μm, the layer thickness of the Al wiring layer 3 at the window 2 is also 1 μm (FIG. 1b). Next, while rotating the board, from a straight line perpendicular to the plane of the board,
Argon (Ar) ion 4 was irradiated at an angle of 70°.
Ion milling is performed to 1/2 the layer thickness of the Al wiring layer 3 formed on the PSG layer 1, that is, 5000 Å. At this time, the Al wiring layer 3 formed in the window 2 has a thickness of about 1000 Å.
only milled. Therefore, the layer thickness of the Al wiring layer 3 is 5000 Å on the PSG layer 1 and 9000 Å on the window 2, which is 6000 Å from the 1 μm step difference before Al sputter deposition.
This means that the difference in height has become smaller (Figure 1c).
The ion irradiation angle was set at 60 to 70 degrees because milling efficiency is the best at this angle.
Next, an additional 5000 Å of Al was sputter-deposited on the Al wiring layer 3, so that the thickness of the Al wiring layer 3 was 1 μm on the PSG layer 1 and 1.4 μm at the window 2 (FIG. 1d). Ar ions 4 are irradiated again at the same angle as mentioned above, and the Al wiring layer 3 on the PSG layer 1 is irradiated with 5000
Å When ion milled, the Al wiring layer 3 of the window 2 will be approximately
Only 1000Å is milled, therefore Al wiring layer 3
This means that the step difference has become even smaller to about 2000 Å (Fig. 1e). After this, by repeating this process, that is, the process of alternately performing Al sputter deposition and ion milling, several times, the recessed part corresponding to window 2 will be filled by multiple Al depositions, and the Al wiring will be formed. The height difference in the layer 3 gradually becomes smaller, and an Al wiring layer 3 with a flat surface is obtained. At this time PSG
The layer thickness of Al wiring layer 3 on layer 1 is 1 μm (first
Figure t). In this example, Al was first sputter-evaporated to a thickness almost equal to the depth of the window.
In the present invention, since the recessed portion is filled by depositing Al multiple times, there is no need to deposit Al or the like to completely fill the window portion prior to ion milling. Therefore, even if there is a recess formed in the substrate that cannot be filled sufficiently by one sputter deposition because the width is narrow and the depth is deep, it is possible to fill the recess and the like. An electrode wiring layer with a flattened surface can be formed.

(6) Effects of the Invention According to the present invention, it is possible to form an electrode wiring layer that fills the level difference in the substrate and has a flat surface, regardless of the level of the level difference in the substrate. It is possible to prevent disconnections from occurring at the corners of the steps provided on the substrate, and in multilayer wiring, the surface of the first electrode wiring layer is flat, so even if the wiring layers are formed one after another, the steps will not occur. Therefore, there is an effect that disconnection does not occur even when layers are stacked.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a semiconductor device showing various steps of manufacturing an electrode wiring layer in this embodiment. 1...PSG layer, 2...window, 3...Al wiring layer,
4...Ar ion.

Claims (1)

[Claims] 1 Alternating the steps of depositing and forming a layer of electrode material on a substrate having steps, and ion milling by irradiating the layer of electrode material with ions from an oblique direction with respect to the plane of the substrate. 1. A method of manufacturing a semiconductor device, comprising the step of repeatedly performing the step of forming an electrode wiring layer having a planarized surface.