JPH0121616B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pattern forming method using an electron beam, and in particular to a heat treatment process as a condition for directly drawing a fine pattern of an integrated circuit on a wafer with high precision using an electron beam lithography system. This invention relates to a pattern forming method using electron beam lithography for correcting pattern misalignment caused by warpage of a flat wafer.

As the pattern dimensions of integrated circuits become smaller year by year, it becomes impossible to manufacture them using the mask manufacturing method that relies on conventional optical exposure technology, and for this reason, fine pattern writing technology using electron beam writing equipment becomes indispensable. ing. In the integrated circuit fabrication process using electron beam writing technology, this can be achieved by directly irradiating the wafer with an electron beam, bypassing the conventional process of mask fabrication. The manufacturing process by direct wafer writing using an electron beam will be explained as follows.

An etching material, usually an oxide film or a metal film, is placed on the wafer, and a resist film is applied on top of the etching material, and the material to be processed is placed on a sample stage inside the electron beam housing.
The beam is moved to a portion corresponding to the pattern under the control of an electronic computer and irradiated onto the material to be processed. The irradiated areas undergo a polymerization reaction with the resist, and if the resist material is positive, it becomes soluble in the developer, and if it is a negative resist, it becomes insoluble. The etching material in the soluble region is etched, and selective diffusion or vapor deposition is performed using that region as a window. Integrated circuits are realized by repeating processes such as oxidation, etching, and diffusion.

In the above manufacturing process, alignment with the pattern formed up to the previous process is important. Wafers are warped due to the heat treatment performed in each process. This appears as pattern distortion and positional deviation. Therefore, if pattern formation is performed without taking this pattern shift into consideration, alignment accuracy between each process will not be compensated, and a highly accurate integrated circuit will not be realized.

Therefore, when forming a pattern using an electron beam writing device, the deflection position of the electron beam is determined from positional information for each graphic unit obtained from a computer.

FIG. 2 is a diagram explaining the processing procedure of the conventional method. One of the alignment marks placed on the wafer
Based on the position mark detection procedure 4, which determines the position from the reflected electrons or secondary electron signals of the electron beam by scanning the two, rotation correction 5 and stage movement 6 are performed to achieve accurate positioning, and direct writing 7 do.

By the way, in such a processing method, if there is no warpage on the wafer set in the housing of the electron beam lithography system, the coordinate system of the electron beam deflection can be adjusted by keeping several reference points on the wafer constant. Alignment is possible just by changing the position. However, if the wafer has warpage, a method is used in which alignment marks are placed all over the wafer and each mark is detected and corrected one by one. Typically, this alignment mark is placed on every chip. Furthermore, the time required for the alignment mark detection by the electron beam drawing device is considerably longer than the beam irradiation time. Therefore, it takes a very long time to perform alignment while detecting marks on all chips. Also, if the chip size is large or there are many shapes to be drawn, it will take a lot of time to draw if you align each shape individually. (500 to 1000 on wafer
It is made up of a large number of chips. ), but also at several representative points within the chip, and all figures within the chip are corrected by adding or subtracting a fixed value from that position. It is known that alignment takes up one-third of the time required to form a pattern on a single wafer. Therefore, it is necessary to minimize the number of times the alignment mark is detected.

An object of the present invention is to develop an electron beam lithography technology that can improve overlay accuracy by shifting the electron beam irradiation position in advance according to the shape of the wafer's warp in order to reduce the number of times alignment marks are detected. The object of the present invention is to provide a pattern forming method based on the present invention.

According to the present invention, focusing on the fact that wafer warpage has a substantially similar shape for each process,
A functional form representing the shape is stored in a computer, and based on this functional form, the positional deviation of the pattern over the entire wafer is calculated from the positional deviation when the mark is actually detected in the electron beam lithography system using an interpolation approximation method. It can be estimated. Therefore, the number of mark detections can be extremely small.

The present invention will be described in detail below with reference to the drawings.

Figure 1 compares the shape of warpage of a normal wafer with no warpage, a typical wafer stored in a computer in advance (called a model wafer), and the shape of warpage of the wafer to be drawn (called an actual wafer). This figure shows how the patterns on the wafer are misaligned. Position P ₀ on normal wafer 1 without warping is P ₁ on model wafer 2
Assume that the actual wafer 3 corresponds to the position _P2 .

Note that it is known that the state (shape) of warpage on a model wafer can be determined by a computer if the _wafer manufacturing process is given. The position of point P ₁ is estimated by a computer.

By the way, when trying to move the stage so that point P ₀ on wafer 1, which has no warpage, becomes the center of electron beam deflection, if the wafer has warp, the position of point P ₂ will be at the center of electron beam deflection during writing. It is necessary to move the stage so that it is centered. However, since the actual point P ₂ on the wafer must be slightly shifted from P ₁ whose position can be estimated, the position data of P ₁ cannot be used as is, and the difference P ₂ - _{P 1} is We need to ask for more.

Next, a method for determining the difference between the position of point P ₁ on the model wafer and the position of point P ₂ on the actual wafer will be described. In the present invention, several representative points (usually about 10 points) where alignment marks are set are selected from the entire area of the actual wafer 3, and accurate positions on the actual wafer are detected. Next, the deviation between the position on the model wafer and the actual position on the wafer is determined from the position of each representative point and the position on the model wafer of the point corresponding to each representative point determined by the computer. Based on the state of the deviation, the actual positions of all points on the wafer 3 are calculated. According to this method, it is only necessary to detect the actual positions of several representative points on the wafer, and drawing can be performed without detecting any more positions. An interpolation approximation method is used to calculate the actual positions of all the figures on the wafer. P ₀ on a wafer without warpage
Assume that the position of is the point to be aligned. The corresponding position P ₁ on the model wafer is determined by calculation, and the position P ₂ is detected by the alignment operation of the alignment marks on the actual wafer. If there are three positions corresponding to such P ₀ , P ₁ , and P ₂ , the actual positions of all points in the vicinity can be found. The method of calculating the positions of points in this vicinity is the interpolation approximation method, and the calculation method is shown in FIG. Now, it is assumed that points Q ₁ , Q ₂ , and Q ₃ on the wafer 1 without warpage are points whose positions on the wafer can actually be detected. Points Z ₁ , Z ₂ , and Z ₃ on the model wafer corresponding to the positions of Q ₁ , Q ₂ , and Q ₃ are given as data in the computer. From the positional deviation of these three points, that is, the relationship between Q ₁ , Q ₂ , Q ₃ and Z ₁ , Z ₂ , Z ₃ ,
The positions on the model wafer for points X in the vicinity of three points on the wafer without warpage are determined by the positional interpolation approximation method.

Since the positions on the actual wafer corresponding to the above-mentioned Z ₁ , Z ₂ , and Z ₃ have been found, the points Q ₁ , Q ₂ , and Q ₃ on the wafer without warpage mentioned above can be set on the model wafer. If the points Z ₁ , Z ₂ , and Z ₃ are replaced, nearby points on the wafer can actually be found using the same method.

FIG. 3 is a diagram explaining the processing procedure of the present invention, in which the positional deviation of the entire wafer is determined by an interpolation approximation method 10 using the position mark detection signal 8 from the wafer and the wafer warp shape function 9, and Correction is performed by beam rotation correction 11 and stage movement 12, and a wafer is manufactured by direct writing 13. The electron beam rotation correction 11 and the stage movement 12 are repeated until the drawing of a large number of points determined by the interpolation approximation method is completed.

According to the pattern forming method of the present invention, highly accurate patterns can be drawn at high speed not only on wafers without warpage but also on wafers with warpage. becomes possible. Moreover, it not only helps dramatically improve the performance of integrated circuits, but also greatly contributes to improving reliability.

[Brief explanation of drawings]

FIG. 1 is a diagram showing how pattern position shifts occur due to wafer warpage. In the figure, 1 indicates a wafer without warpage, 2 indicates a model wafer, and 3 indicates a drawing wafer. Figure 2 is a diagram showing the procedure of the direct writing method based on the conventional method, in which 4 indicates the position mark detection procedure, and 5
6 indicates a rotation correction procedure, 6 indicates a stage movement procedure, and 7 indicates a direct drawing procedure. FIG. 3 is a diagram showing the processing procedure according to the present invention.
In the figure, reference numeral 8 indicates a position mark detection procedure, 9 indicates a wafer warpage function generation procedure, 10 indicates an interpolation approximation procedure, 11 indicates a rotation correction procedure, 12 indicates a stage movement procedure, and 13 indicates a direct writing procedure. FIG. 4 is a conceptual diagram explaining the interpolation approximation method.

Claims (1)

[Claims] 1 In a pattern forming method using an electron beam lithography system that determines the irradiation position of the electron beam by taking into account the positional deviation of overlapping patterns due to wafer warping that occurs during the integrated circuit manufacturing process, Using the data representing the shape of the warp and the position signal detected from the alignment mark, the overlay pattern shift over the entire wafer is estimated in advance in the electron beam lithography system, and the electron beam irradiation position is shifted to perform lithography. A pattern forming method using an electron beam, which is characterized by reducing the number of times alignment mark detection is performed in an electron beam writing apparatus and shortening writing time.