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JPH0121627B2 - - Google Patents
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JPH0121627B2 - - Google Patents

Info

Publication number
JPH0121627B2
JPH0121627B2 JP56164590A JP16459081A JPH0121627B2 JP H0121627 B2 JPH0121627 B2 JP H0121627B2 JP 56164590 A JP56164590 A JP 56164590A JP 16459081 A JP16459081 A JP 16459081A JP H0121627 B2 JPH0121627 B2 JP H0121627B2
Authority
JP
Japan
Prior art keywords
envelope
lead frame
resin
semiconductor device
thermoplastic resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56164590A
Other languages
Japanese (ja)
Other versions
JPS5864052A (en
Inventor
Rikuro Sono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56164590A priority Critical patent/JPS5864052A/en
Publication of JPS5864052A publication Critical patent/JPS5864052A/en
Publication of JPH0121627B2 publication Critical patent/JPH0121627B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/20Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H10W42/25Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons against alpha rays, e.g. for outer space applications
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/682Shapes or dispositions thereof comprising holes having chips therein
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07551Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 〔概要〕 樹脂封止形半導体装置とその製造方法に関し、 ソフトエラーの発生が非常に少いモールドパツ
ケージを有する半導体装置に構成することを目的
とし、 その構造は、少なくともリードを導出する外囲
器の周囲側壁が熱可塑性樹脂から構成され、内部
に無機物フイラーを含まない高純度樹脂を充填し
て、金属キヤツプによつて封止したパツケージ構
造に構成する。
[Detailed Description of the Invention] [Summary] The present invention relates to a resin-molded semiconductor device and a method for manufacturing the same, and aims to configure a semiconductor device having a molded package in which the occurrence of soft errors is extremely small. The peripheral side wall of the envelope from which the leads are led out is made of thermoplastic resin, and the inside is filled with high-purity resin containing no inorganic filler and sealed with a metal cap to form a package structure.

その製造方法は、連続した帯状のリードフレー
ムに、予め熱可塑性樹脂を射出成形して外囲器を
連続的に形成する工程と、次いで、リードフレー
ムに半導体チツプを接着し、ワイヤー付けした
後、無機物フイラーを含まない高純度樹脂を外囲
器内部にドロツピングして同時に金属キヤツプを
接着する工程とが含まれることを特徴とする。
The manufacturing method consists of a step of injecting a thermoplastic resin into a continuous band-shaped lead frame in advance to continuously form an envelope, and then bonding a semiconductor chip to the lead frame and attaching wires. The method is characterized in that it includes a step of dropping a high-purity resin containing no inorganic filler into the inside of the envelope and bonding a metal cap at the same time.

〔産業上の利用分野〕[Industrial application field]

本発明は放射線照射によるソフトエラーが発生
しない構造にした樹脂封止形半導体装置とその製
造方法に関する。
The present invention relates to a resin-sealed semiconductor device having a structure in which soft errors due to radiation irradiation do not occur, and a method for manufacturing the same.

〔従来の技術と発明が解決しようとする課題〕[Problems to be solved by conventional technology and invention]

従来より、半導体記憶装置にα線が照射される
と、メモリセルの記憶を狂わせるいわゆるソフト
エラーが知られており、これは記憶装置としては
致命的な問題となつている。α線は例えばセラミ
ツクパツケージを構成するアルミナ(Al2O3)や
シリカ(SiO2)などの無機材料に極く微量に含
まれる放射性元素から放射され、そのためセラミ
ツク製パツケージ内部にはα線を遮蔽するような
対策がなされている。一方、量産品として汎用さ
れている樹脂封止形(モールド)パツケージは樹
脂材料にフイラーと称して同じくアルミナ、シリ
カやガラスなどの無機物を70%程度も含有させて
あり、しかもこれらの樹脂材料は半導体チツプに
密着する構造であるから、それらの無機物から絶
えずα線に照射されて、ソフトエラーを発生する
恐れがあり、そのため、超高集積度記憶装置には
殆んどモールドパツケージが使用されていない状
況である。又、使用する場合には、素子表面に保
護膜を形成する等の配慮がなされている。
Conventionally, it has been known that when a semiconductor memory device is irradiated with alpha rays, a so-called soft error occurs, which disrupts the memory of a memory cell, and this is a fatal problem for memory devices. Alpha rays are emitted from radioactive elements that are contained in extremely small amounts in inorganic materials such as alumina (Al 2 O 3 ) and silica (SiO 2 ) that make up ceramic packages. Measures are being taken to do so. On the other hand, resin-sealed (mold) packages, which are widely used as mass-produced products, contain about 70% of inorganic substances such as alumina, silica, and glass called filler in the resin material. Since the structure is in close contact with the semiconductor chip, there is a risk that soft errors may occur due to constant irradiation with alpha rays from these inorganic materials.For this reason, molded packages are rarely used in ultra-high-density storage devices. There is no such situation. Further, when using the device, consideration is given to forming a protective film on the surface of the device.

しかしながら、大量生産に最も適しているモー
ルドパツケージを使用しない半導体記憶装置は低
価格化が困難な問題がある。
However, semiconductor memory devices that do not use a molded package, which are most suitable for mass production, have the problem of being difficult to reduce in price.

本発明はこのような問題点を解消させて、ソフ
トエラーの発生が非常に少いモールドパツケージ
を有する半導体装置とその製造方法を提案するも
のである。
The present invention solves these problems and proposes a semiconductor device having a molded package and a method for manufacturing the same in which the occurrence of soft errors is extremely small.

〔課題を解決するための手段〕[Means to solve the problem]

その課題は、少なくともリードを導出する外囲
器の周囲側壁が熱可塑性樹脂から構成され、内部
に無機物フイラーを含まない高純度樹脂を充填し
て、金属キヤツプによつて封止したパツケージ構
造を有する半導体装置によつて解決される。
The problem is that it has a package structure in which at least the peripheral side wall of the envelope from which the leads are led is made of thermoplastic resin, the inside is filled with high-purity resin that does not contain inorganic fillers, and the package is sealed with a metal cap. The problem is solved by semiconductor devices.

且つ、その製造方法として、連続した帯状のリ
ードフレームに、予め熱可塑性樹脂を射出成形し
て外囲器を連続的に形成する工程と、次いで、リ
ードフレームに半導体チツプを接着し、ワイヤー
付けした後、無機物フイラーを含まない高純度樹
脂を外囲器内部にドロツピングして同時に金属キ
ヤツプを接着する工程とが含まれることを特徴と
する。
In addition, the manufacturing method includes a step of injecting thermoplastic resin into a continuous band-shaped lead frame in advance to continuously form an envelope, and then adhering a semiconductor chip to the lead frame and attaching wires. After that, the method includes a step of dropping a high-purity resin containing no inorganic filler into the inside of the envelope and simultaneously bonding a metal cap.

〔作用〕[Effect]

従来は、リードフレームに半導体チツプを接着
してワイヤー付けした半導体素子を熱硬化性樹脂
で固めてモールドパツケージからなる半導体装置
を作成していたが、本発明では、外囲器の周囲側
壁を熱可塑性樹脂で構成して内部に高純度樹脂を
充填し、金属キヤツプによつて封止した半導体装
置の構造にする。
Conventionally, a semiconductor device was created by bonding a semiconductor chip to a lead frame and attaching wires to the semiconductor element and hardening it with thermosetting resin to create a molded package.However, in the present invention, the peripheral side wall of the envelope is heated The structure of the semiconductor device is made of plastic resin, filled with high-purity resin, and sealed with a metal cap.

そうすると、ソフトエラーの発生を抑制でき
て、且つ、従来のモールドパツケージと同様に量
産化の容易な製造工程として低価格化することが
できる。
In this way, the occurrence of soft errors can be suppressed, and as with conventional molded packages, the manufacturing process can be easily mass-produced and the cost can be reduced.

〔実施例〕〔Example〕

以下、実施例によつて図面を参照して詳しく説
明する。
Hereinafter, embodiments will be described in detail with reference to the drawings.

第1図は本発明にかかる半導体装置の透視平面
図で、1はリードフレーム、2はリードフレーム
のタイバー、3はリードフレームの外枠、4は半
導体チツプ、5は熱可塑性樹脂からなる外囲器の
側壁、6は高純度樹脂、9はワイヤーである。本
図はリードフレーム1のタイバー2、外枠3を切
断除去する前工程を図示している。
FIG. 1 is a perspective plan view of a semiconductor device according to the present invention, in which 1 is a lead frame, 2 is a tie bar of the lead frame, 3 is an outer frame of the lead frame, 4 is a semiconductor chip, and 5 is an outer enclosure made of thermoplastic resin. On the side wall of the vessel, 6 is a high-purity resin, and 9 is a wire. This figure shows the pre-process of cutting and removing the tie bars 2 and outer frame 3 of the lead frame 1.

次の第2図はそれを拡大した半導体装置の一実
施例の横断面図を示しており、図において1はリ
ード(リードフレームが切断されてリードとな
る)、4は半導体チツプ、5は熱可塑性樹脂から
なる外囲器の周囲側壁、6は内部に充填した高純
度樹脂、7は金属キヤツプ、8は外囲器の底面を
構成する金属板、9はワイヤーで、本例は底面に
金属板を設けた構造である。このような構成にす
ると、半導体チツプ4は高純度樹脂に被覆され
て、その高純度樹脂はアルミナやシリカのような
無機物を含んでいないからα線放射によりソフト
エラーを生ずる心配がない。高純度樹脂として
は、例えば無機物フイラーを含有しない純粋なエ
ポキシ樹脂を用い、これを溶融し内部に流し込ん
でキユアーさせる。このような高純度樹脂で厚く
被覆されていると、たとえ外囲器とした熱可塑性
樹脂から僅かのα線を放射しても、内部を充填し
た高純度樹脂で阻まれてソフトエラーを発生する
ことがない、通常、300〔μm〕程度の厚さの樹脂
で充分にα線が阻止される。
The following Figure 2 shows an enlarged cross-sectional view of one embodiment of the semiconductor device. In the figure, 1 is a lead (the lead frame is cut to become a lead), 4 is a semiconductor chip, and 5 is a The peripheral side wall of the envelope made of plastic resin, 6 is a high-purity resin filled inside, 7 is a metal cap, 8 is a metal plate forming the bottom of the envelope, 9 is a wire, and in this example, the bottom is made of metal. It has a structure with a board. With this structure, the semiconductor chip 4 is coated with a high purity resin, and since the high purity resin does not contain inorganic substances such as alumina and silica, there is no concern that soft errors will occur due to alpha radiation. As the high-purity resin, for example, a pure epoxy resin containing no inorganic filler is used, which is melted, poured into the interior, and cured. If the device is coated with such a thick layer of high-purity resin, even if a small amount of alpha rays are emitted from the thermoplastic resin used as the envelope, it will be blocked by the high-purity resin filled inside and cause a soft error. Normally, a resin with a thickness of about 300 [μm] is sufficient to block alpha rays.

次に、本発明にかかる半導体装置は出来るだけ
低価格化することが重要で、構造と同様に製造方
法も重要である。それを第3図に示す製造工程図
によつて工程順に説明する。第3図は左側に工程
断面図、右側に工程名を記載しており、まず、リ
ードフレーム1(a参照)はテープ状に巻いたフ
ープ材として連続して供給され、送られたリード
フレームの表と裏とに金型をセツトし、溶融した
熱可塑性樹脂を注入し外囲器の周囲側壁5を成形
させる(b参照)。このように、順次連続的にプ
レモールドした後、接着剤によつて底面に金属板
8を接着する(c参照)。
Next, it is important to make the semiconductor device according to the present invention as low in price as possible, and the manufacturing method is as important as the structure. This will be explained step by step with reference to the manufacturing process diagram shown in FIG. In Figure 3, the process sectional view is shown on the left, and the process name is shown on the right.First, lead frame 1 (see a) is continuously supplied as a hoop material wound into a tape shape, and the lead frame is fed. Molds are set on the front and back sides, and molten thermoplastic resin is injected to form the peripheral side wall 5 of the envelope (see b). After the premolding is carried out one after another in this manner, the metal plate 8 is adhered to the bottom surface with an adhesive (see c).

次いで、形成した外囲器の内部のリードフレー
ムに半導体チツプ4を半田付又はペースト等で接
着する(d参照)が、チツプ付けは200℃の低温
度でおこなう。次いで、取り付けた半導体チツプ
が破壊されないように、8個ないし10個を1シー
トとしたリードフレームに荒分割した後、公知の
自動ボンデング装置でワイヤー9をボンデイング
する(e参照)。次いで、高純度樹脂、例えばフ
イラーを含まない純粋なエポキシ樹脂を150℃に
溶融し、外囲器内にドロツピング(f参照)して
キユアーさせる。そうすると、樹脂は浸透性良く
隅々まで充填して固化する。この工程の途中、即
ち高純度樹脂の半溶融状態で、金属キヤツプを載
せて、同時に接着凝固させる(g参照)。次いで、
公知の方法でリードフレームの外枠、タイバーを
切断除去し、リード曲げ加工して個々に分離した
半導体装置に完成する。これらの製造工程は従来
法を改善すれば容易に自動化できる製造方法であ
り、また、工程初期に外囲器を作成するプレモー
ルド工程を設定している理由は、信頼性を高めて
量産化を容易にするためで、従来のように、半導
体チツプやワイヤーを取り付けした後にモールド
すれば、モールド工程で高圧が加わつたり、振動
が起こつたりして半導体チツプやワイヤーを傷つ
ける心配があるが、本発明にかかる製造方法では
プレモールド工程を終了した後に、半導体チツプ
を取付けし、ワイヤーボンデイングするために、
その問題点が軽減される効果がある。
Next, the semiconductor chip 4 is bonded to the lead frame inside the formed envelope by soldering or paste (see d), and the chip attachment is performed at a low temperature of 200°C. Next, in order to prevent the attached semiconductor chips from being destroyed, the lead frame is roughly divided into 8 to 10 lead frames in one sheet, and wires 9 are bonded using a known automatic bonding device (see e). Next, a high-purity resin, such as a pure epoxy resin without fillers, is melted at 150° C., dropped into the envelope (see f), and cured. Then, the resin will penetrate into every corner and solidify with good permeability. In the middle of this process, that is, while the high-purity resin is in a semi-molten state, a metal cap is placed on it and simultaneously bonded and solidified (see g). Then,
The outer frame and tie bars of the lead frame are cut and removed using a known method, and the leads are bent to complete individual semiconductor devices. These manufacturing processes can be easily automated by improving conventional methods, and the reason why we use a pre-molding process to create the envelope at the beginning of the process is to improve reliability and facilitate mass production. This is to make it easier.If you attach the semiconductor chips and wires and then mold them as in the past, there is a risk of damage to the semiconductor chips or wires due to high pressure being applied during the molding process or vibrations occurring. In the manufacturing method according to the present invention, after the pre-molding process is completed, in order to attach the semiconductor chip and perform wire bonding,
This has the effect of alleviating this problem.

次に、第4図は本発明にかかる製造方法の重要
な工程のプレモールド工程図を図示しており、自
動的に送られるテープ状に巻いたリードフレーム
1を金型の上型11と下型12の間に停止させ
(a参照)、その金型を上下より動作させてリード
フレームを挟持し、300℃に加熱して溶融した熱
可塑性樹脂を注入し成形する(b参照)。その後、
金型を外すと外囲器の側壁5ができあがる(c参
照)。このようなプレモールド工程の処理はリー
ドフレームの1個ずつ、又は複数個同時に連続し
てプレモールドすることができて量産的である。
且つ、このインジエクシヨンモールド(射出成
形)方式は温度管理がたやすくて低コスト化が容
易である。又、熱可塑性樹脂としては例えば
PEEK(ポリエーテルエーテルケトン)などを使
用し、PEEKは極めて接着性の良い樹脂である。
なお、上下金型に挟まれたリードフレームには間
隙が生じるが、精々0.1〜0.2〔mm〕と狭いので、
漏れることなく樹脂の表面張力で保持されて、容
易に成形される。
Next, FIG. 4 shows a pre-molding process diagram of an important step of the manufacturing method according to the present invention, in which the automatically fed lead frame 1 wound in the form of a tape is connected to the upper mold 11 of the mold and the lower part. It is stopped between the molds 12 (see a), and the molds are moved from above and below to sandwich the lead frame, and a thermoplastic resin heated to 300° C. and melted is injected and molded (see b). after that,
When the mold is removed, the side wall 5 of the envelope is completed (see c). This pre-molding process can be used for mass production since lead frames can be pre-molded one at a time or a plurality of lead frames can be successively pre-molded at the same time.
In addition, this injection molding method allows easy temperature control and easy cost reduction. In addition, examples of thermoplastic resins include
PEEK (polyetheretherketone) is used, and PEEK is a resin with extremely good adhesive properties.
Note that there is a gap between the lead frame sandwiched between the upper and lower molds, but it is narrow, at most 0.1 to 0.2 [mm], so
It is held by the surface tension of the resin without leaking and is easily molded.

次の第5図は本発明にかかる他の実施例の横断
面図を示しており、図中の記号は同一部位に同一
記号が付けてある。本実施例は金属板8を底面に
用いず、金属キヤツプ以外の底部を含む外囲器1
5をすべて熱可塑性樹脂で作成した例である。こ
の外囲器15のプレモールド工程は底部を予め作
成した熱可塑性樹脂で接着する方法を採れば上記
の製造工程と同様に作成できる。
The following FIG. 5 shows a cross-sectional view of another embodiment of the present invention, and the same symbols are attached to the same parts in the figure. In this embodiment, the metal plate 8 is not used on the bottom surface, and the envelope 1 includes the bottom portion other than the metal cap.
This is an example in which all parts 5 are made of thermoplastic resin. The pre-molding process for the envelope 15 can be performed in the same manner as the above-mentioned manufacturing process by adhering the bottom part with a previously prepared thermoplastic resin.

なお、本発明にかかる半導体装置を構成する金
属キヤツプや金属板は、リードフレームと同程度
に熱膨張の小さい鉄・ニツケル合金材が適当であ
るが、必ずしもそれに拘わらなくても問題はな
い。
It should be noted that the metal cap and metal plate constituting the semiconductor device according to the present invention are suitably made of an iron-nickel alloy material that has a thermal expansion as low as that of the lead frame, but there is no problem even if the material is not limited to this.

〔発明の効果〕〔Effect of the invention〕

以上の実施例から明らかなように、本発明にか
かる半導体装置はソフトエラーの発生が極めて軽
減されて、且つ、製造工程の自動化が容易で、材
料費も安価であり低コストで製造できるものであ
る。しかも、熱放散性も良く、従来のソフトエラ
ー対策のようにレジンなどを厚く塗布する必要が
なく、製造工程においても半導体チツプにストレ
スが加わることも少ない。したがつて、大形チツ
プの収容にも問題がなく、半導体記憶装置などに
適用して、そのコストダウンに極めて効果のある
構造といえる。
As is clear from the above embodiments, the semiconductor device according to the present invention can greatly reduce the occurrence of soft errors, can easily automate the manufacturing process, and can be manufactured at low cost due to low material costs. be. Moreover, it has good heat dissipation properties, eliminates the need to apply thick resin or the like as required in conventional soft error countermeasures, and reduces stress on semiconductor chips during the manufacturing process. Therefore, there is no problem in accommodating large chips, and the structure can be said to be extremely effective in reducing costs when applied to semiconductor memory devices and the like.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明にかかる半導体装置の透視平面
図、第2図は本発明にかかる半導体装置の一実施
例の横断面図、第3図は製造工程図、第4図はプ
レモールド工程図、第5図は本発明にかかる半導
体装置の他の実施例の横断面図である。 図において、1はリードフレーム、または、リ
ード、2はリードフレームのタイバー、3はリー
ドフレームの外枠、4は半導体チツプ、5は熱可
塑性樹脂からなる外囲器の周囲側壁、6は充填す
る高純度樹脂、7は金属キヤツプ、8は外囲器底
面の金属板、9はワイヤー、11は金型の上型、
12は金型の下型、15は熱可塑性樹脂からなる
外囲器を示している。
FIG. 1 is a perspective plan view of a semiconductor device according to the present invention, FIG. 2 is a cross-sectional view of an embodiment of the semiconductor device according to the present invention, FIG. 3 is a manufacturing process diagram, and FIG. 4 is a pre-molding process diagram. , FIG. 5 is a cross-sectional view of another embodiment of the semiconductor device according to the present invention. In the figure, 1 is a lead frame or a lead, 2 is a tie bar of the lead frame, 3 is an outer frame of the lead frame, 4 is a semiconductor chip, 5 is a peripheral side wall of an envelope made of thermoplastic resin, and 6 is a filling material. High purity resin, 7 is a metal cap, 8 is a metal plate on the bottom of the envelope, 9 is a wire, 11 is an upper mold of a mold,
Reference numeral 12 indicates a lower mold of the mold, and reference numeral 15 indicates an envelope made of thermoplastic resin.

Claims (1)

【特許請求の範囲】 1 少なくともリードを導出する外囲器の周囲側
壁が熱可塑性樹脂から構成され、内部に無機物フ
イラーを含まない高純度樹脂を充填して、金属キ
ヤツプによつて封止したパツケージ構造を有する
ことを特徴とする半導体装置。 2 連続した帯状のリードフレームに、予め熱可
塑性樹脂を射出成形して外囲器を連続的に形成す
る工程と、次いで、リードフレームに半導体チツ
プを接着し、ワイヤー付けした後、無機物フイラ
ーを含まない高純度樹脂を外囲器内部にドロツピ
ングして同時に金属キヤツプを接着する工程とが
含まれることを特徴とする半導体装置の製造方
法。
[Claims] 1. A package in which at least the peripheral side wall of the envelope from which the leads are led is made of thermoplastic resin, the interior is filled with high purity resin containing no inorganic filler, and the package is sealed with a metal cap. A semiconductor device characterized by having a structure. 2 A process of continuously forming an envelope by injection molding a thermoplastic resin onto a continuous belt-shaped lead frame, and then adhering a semiconductor chip to the lead frame and attaching wires to the lead frame. 1. A method for manufacturing a semiconductor device, comprising the steps of: dropping high-purity resin inside an envelope and simultaneously bonding a metal cap.
JP56164590A 1981-10-14 1981-10-14 Semiconductor device and manufacture thereof Granted JPS5864052A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56164590A JPS5864052A (en) 1981-10-14 1981-10-14 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56164590A JPS5864052A (en) 1981-10-14 1981-10-14 Semiconductor device and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS5864052A JPS5864052A (en) 1983-04-16
JPH0121627B2 true JPH0121627B2 (en) 1989-04-21

Family

ID=15796064

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56164590A Granted JPS5864052A (en) 1981-10-14 1981-10-14 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS5864052A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4352593B2 (en) * 2000-07-13 2009-10-28 株式会社デンソー Resin-sealed circuit device
DE10221857A1 (en) * 2002-05-16 2003-11-27 Osram Opto Semiconductors Gmbh Process for applying a semiconductor chip on a thermal and/or electrically conducting connecting part arranged in or on a plastic housing body comprises using a soft soldering process

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5623759A (en) * 1979-08-01 1981-03-06 Hitachi Ltd Resin-sealed semiconductor device and manufacture thereof
JPS5658249A (en) * 1979-10-19 1981-05-21 Hitachi Ltd Package for integrated circuit

Also Published As

Publication number Publication date
JPS5864052A (en) 1983-04-16

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